From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 19/26] sunxi: H3/A64: fix non-ODT setting
Date: Tue, 20 Dec 2016 11:49:17 +0100 [thread overview]
Message-ID: <20161220104917.kfbbz5bhgjyfcqtl@lukather> (raw)
In-Reply-To: <ed0b75ce-3604-d55f-1934-66c7f84ef0d8@gmail.com>
On Mon, Dec 19, 2016 at 03:32:31PM +0100, Jens Kuske wrote:
> On 19.12.2016 11:33, Andre Przywara wrote:
> > Hi,
> >
> > On 19/12/16 10:01, Maxime Ripard wrote:
> >> On Mon, Dec 19, 2016 at 01:50:09AM +0000, Andre Przywara wrote:
> >>> According to Jens disabling the on-die-termination should set bit 5,
> >>> not bit 1 in the respective register. Fix this.
> >>>
> >>> Reported-by: Jens Kuske <jenskuske@gmail.com>
> >>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> >>> ---
> >>> arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +-
> >>> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c
> >>> index 6ee73ae..1bdd738 100644
> >>> --- a/arch/arm/mach-sunxi/dram_sun8i_h3.c
> >>> +++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c
> >>> @@ -438,7 +438,7 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para)
> >>> clrsetbits_le32(&mctl_ctl->dx[i].gcr, (0x3 << 4) |
> >>> (0x1 << 1) | (0x3 << 2) | (0x3 << 12) |
> >>> (0x3 << 14),
> >>> - IS_ENABLED(CONFIG_DRAM_ODT_EN) ? 0x0 : 0x2);
> >>> + IS_ENABLED(CONFIG_DRAM_ODT_EN) ? 0x0 : 0x20);
> >>
> >> You should use a define here if that bit function is known.
> >
> > I agree, and I tried but I failed to find one. That part seems to differ
> > from the Keystone documentation, which doesn't know an ODT _dis_able bit
> > at all.
> >
> > Maybe Jens can add his source?
>
> I think DXnGCR bits 5:4 mean:
>
> 0x0 = dynamic ODT
> 0x1 = ODT always on
> 0x2 = ODT off
>
> But its only guessed, there is no documentation.
> Compare to A83 boot0 code [1], setting dram_odt_en parameter in H3
> boot0 to these values results in matching changes in bits 5:4.
Then we can just add a comment on top of those defines saying that
we're not quite sure.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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next prev parent reply other threads:[~2016-12-20 10:49 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-19 1:49 [U-Boot] [PATCH v3 00/26] sunxi: Allwinner A64: SPL support Andre Przywara
2016-12-19 1:49 ` [U-Boot] [PATCH v3 01/26] sun6i: Restrict some register initialization to Allwinner A31 SoC Andre Przywara
2016-12-19 1:49 ` [U-Boot] [PATCH v3 02/26] armv8: prevent using THUMB Andre Przywara
2016-12-19 1:49 ` [U-Boot] [PATCH v3 03/26] armv8: add lowlevel_init.S Andre Przywara
2016-12-26 5:23 ` Simon Glass
2016-12-19 1:49 ` [U-Boot] [PATCH v3 04/26] SPL: tiny-printf: add "l" modifier Andre Przywara
2016-12-19 1:49 ` [U-Boot] [PATCH v3 05/26] SPL: tiny-printf: ignore "-" modifier Andre Przywara
2016-12-26 5:23 ` Simon Glass
2016-12-19 1:49 ` [U-Boot] [PATCH v3 06/26] move UL() macro from armv8/mmu.h into common.h Andre Przywara
2016-12-19 1:49 ` [U-Boot] [PATCH v3 07/26] SPL: make struct spl_image 64-bit safe Andre Przywara
2016-12-19 1:49 ` [U-Boot] [PATCH v3 08/26] armv8: add simple sdelay implementation Andre Przywara
2016-12-19 1:49 ` [U-Boot] [PATCH v3 09/26] armv8: move reset branch into boot hook Andre Przywara
2016-12-19 1:50 ` [U-Boot] [PATCH v3 10/26] ARM: boot0 hook: remove macro, include whole header file Andre Przywara
2016-12-30 20:41 ` Steve Rae
2016-12-19 1:50 ` [U-Boot] [PATCH v3 11/26] sunxi: introduce extra config option for boot0 header Andre Przywara
2016-12-19 1:50 ` [U-Boot] [PATCH v3 12/26] sunxi: A64: do an RMR switch if started in AArch32 mode Andre Przywara
2016-12-19 9:43 ` Maxime Ripard
2016-12-19 1:50 ` [U-Boot] [PATCH v3 13/26] sunxi: provide default DRAM config for sun50i in Kconfig Andre Przywara
2016-12-19 9:43 ` Maxime Ripard
2016-12-19 1:50 ` [U-Boot] [PATCH v3 14/26] sunxi: H3: Rework MBUS priority setup Andre Przywara
2016-12-19 9:44 ` Maxime Ripard
2016-12-19 1:50 ` [U-Boot] [PATCH v3 15/26] sunxi: H3: add and rename some DRAM contoller registers Andre Przywara
2016-12-19 1:50 ` [U-Boot] [PATCH v3 16/26] sunxi: H3: add DRAM controller single bit delay support Andre Przywara
2016-12-19 9:57 ` Maxime Ripard
2016-12-19 10:53 ` Andre Przywara
2016-12-20 13:48 ` Maxime Ripard
2016-12-19 1:50 ` [U-Boot] [PATCH v3 17/26] sunxi: clocks: Use the correct pattern register for PLL11 Andre Przywara
2016-12-19 9:58 ` Maxime Ripard
2016-12-19 1:50 ` [U-Boot] [PATCH v3 18/26] sunxi: A64: use H3 DRAM initialization code for A64 as well Andre Przywara
2016-12-19 10:00 ` Maxime Ripard
2016-12-19 1:50 ` [U-Boot] [PATCH v3 19/26] sunxi: H3/A64: fix non-ODT setting Andre Przywara
2016-12-19 10:01 ` Maxime Ripard
2016-12-19 10:33 ` Andre Przywara
2016-12-19 14:32 ` Jens Kuske
2016-12-20 10:49 ` Maxime Ripard [this message]
2016-12-19 1:50 ` [U-Boot] [PATCH v3 20/26] sunxi: DRAM: fix H3 DRAM size display on aarch64 Andre Przywara
2016-12-19 10:01 ` Maxime Ripard
2016-12-19 1:50 ` [U-Boot] [PATCH v3 21/26] sunxi: A64: enable SPL Andre Przywara
2016-12-19 10:01 ` Maxime Ripard
2016-12-26 5:23 ` Simon Glass
2016-12-19 1:50 ` [U-Boot] [PATCH v3 22/26] SPL: read and store arch property from U-Boot image Andre Przywara
2016-12-19 1:50 ` [U-Boot] [PATCH v3 23/26] Makefile: use "arm64" architecture for U-Boot image files Andre Przywara
2016-12-19 1:50 ` [U-Boot] [PATCH v3 24/26] ARM: SPL/FIT: differentiate between arm and arm64 arch properties Andre Przywara
2016-12-19 1:50 ` [U-Boot] [PATCH v3 25/26] sunxi: introduce RMR switch to enter payloads in 64-bit mode Andre Przywara
2016-12-19 10:03 ` Maxime Ripard
2016-12-19 1:50 ` [U-Boot] [PATCH v3 26/26] sunxi: A64: add 32-bit SPL support Andre Przywara
2016-12-19 10:05 ` Maxime Ripard
2017-01-01 19:02 ` [U-Boot] [PATCH v3 00/26] sunxi: Allwinner A64: " Jagan Teki
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