* [U-Boot] [PATCH 0/2] stm32 pinctrl improvements
@ 2017-06-20 15:04 patrice.chotard at st.com
2017-06-20 15:04 ` [U-Boot] [PATCH 1/2] pinctrl: stm32: handle a configuration list patrice.chotard at st.com
2017-06-20 15:04 ` [U-Boot] [PATCH 2/2] pinctrl: stm32: add set_state ops patrice.chotard at st.com
0 siblings, 2 replies; 5+ messages in thread
From: patrice.chotard at st.com @ 2017-06-20 15:04 UTC (permalink / raw)
To: u-boot
From: Patrice Chotard <patrice.chotard@st.com>
This series improves the stm32 pinctrl driver by adding:
_ pinmux list support
_ set_state ops callback support
Christophe Kerello (2):
pinctrl: stm32: handle a configuration list
pinctrl: stm32: add set_state ops
drivers/pinctrl/pinctrl_stm32.c | 62 ++++++++++++++++++++++++++++++++---------
1 file changed, 49 insertions(+), 13 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH 1/2] pinctrl: stm32: handle a configuration list
2017-06-20 15:04 [U-Boot] [PATCH 0/2] stm32 pinctrl improvements patrice.chotard at st.com
@ 2017-06-20 15:04 ` patrice.chotard at st.com
2017-07-11 12:40 ` [U-Boot] [U-Boot, " Tom Rini
2017-06-20 15:04 ` [U-Boot] [PATCH 2/2] pinctrl: stm32: add set_state ops patrice.chotard at st.com
1 sibling, 1 reply; 5+ messages in thread
From: patrice.chotard at st.com @ 2017-06-20 15:04 UTC (permalink / raw)
To: u-boot
From: Christophe Kerello <christophe.kerello@st.com>
This patch handles a configuration list behind pinctrl-0
like pinctrl-0 = <&qspi_clk_a &qspi_bk1_a &qspi_bk2_a>;
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
---
drivers/pinctrl/pinctrl_stm32.c | 51 ++++++++++++++++++++++++++++++-----------
1 file changed, 38 insertions(+), 13 deletions(-)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 5bee7fb..6183103 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -93,39 +93,31 @@ static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, int node)
return 0;
}
-static int stm32_pinctrl_set_state_simple(struct udevice *dev,
- struct udevice *periph)
+static int stm32_pinctrl_config(int offset)
{
u32 pin_mux[MAX_PINS_ONE_IP];
- struct fdtdec_phandle_args args;
int rv, len;
- /* Get node pinctrl-0 */
- rv = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(periph),
- "pinctrl-0", 0, 0, 0, &args);
- if (rv)
- return rv;
/*
* check for "pinmux" property in each subnode (e.g. pins1 and pins2 for
* usart1) of pin controller phandle "pinctrl-0"
* */
- fdt_for_each_subnode(args.node, gd->fdt_blob, args.node) {
+ fdt_for_each_subnode(offset, gd->fdt_blob, offset) {
struct stm32_gpio_dsc gpio_dsc;
struct stm32_gpio_ctl gpio_ctl;
int i;
- len = fdtdec_get_int_array_count(gd->fdt_blob, args.node,
+ len = fdtdec_get_int_array_count(gd->fdt_blob, offset,
"pinmux", pin_mux,
ARRAY_SIZE(pin_mux));
- debug("%s: periph->name = %s, no of pinmux entries= %d\n",
- __func__, periph->name, len);
+ debug("%s: no of pinmux entries= %d\n", __func__, len);
if (len < 0)
return -EINVAL;
for (i = 0; i < len; i++) {
struct gpio_desc desc;
debug("%s: pinmux = %x\n", __func__, *(pin_mux + i));
prep_gpio_dsc(&gpio_dsc, *(pin_mux + i));
- prep_gpio_ctl(&gpio_ctl, *(pin_mux + i), args.node);
+ prep_gpio_ctl(&gpio_ctl, *(pin_mux + i), offset);
rv = uclass_get_device_by_seq(UCLASS_GPIO,
gpio_dsc.port, &desc.dev);
if (rv)
@@ -141,6 +133,39 @@ static int stm32_pinctrl_set_state_simple(struct udevice *dev,
return 0;
}
+static int stm32_pinctrl_set_state_simple(struct udevice *dev,
+ struct udevice *periph)
+{
+ const void *fdt = gd->fdt_blob;
+ const fdt32_t *list;
+ uint32_t phandle;
+ int config_node;
+ int size, i, ret;
+
+ list = fdt_getprop(fdt, dev_of_offset(periph), "pinctrl-0", &size);
+ if (!list)
+ return -EINVAL;
+
+ debug("%s: periph->name = %s\n", __func__, periph->name);
+
+ size /= sizeof(*list);
+ for (i = 0; i < size; i++) {
+ phandle = fdt32_to_cpu(*list++);
+
+ config_node = fdt_node_offset_by_phandle(fdt, phandle);
+ if (config_node < 0) {
+ error("prop pinctrl-0 index %d invalid phandle\n", i);
+ return -EINVAL;
+ }
+
+ ret = stm32_pinctrl_config(config_node);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static struct pinctrl_ops stm32_pinctrl_ops = {
.set_state_simple = stm32_pinctrl_set_state_simple,
};
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH 2/2] pinctrl: stm32: add set_state ops
2017-06-20 15:04 [U-Boot] [PATCH 0/2] stm32 pinctrl improvements patrice.chotard at st.com
2017-06-20 15:04 ` [U-Boot] [PATCH 1/2] pinctrl: stm32: handle a configuration list patrice.chotard at st.com
@ 2017-06-20 15:04 ` patrice.chotard at st.com
2017-07-11 12:40 ` [U-Boot] [U-Boot,2/2] " Tom Rini
1 sibling, 1 reply; 5+ messages in thread
From: patrice.chotard at st.com @ 2017-06-20 15:04 UTC (permalink / raw)
To: u-boot
From: Christophe Kerello <christophe.kerello@st.com>
set_state_ops is kept under PINCTRL_FULL flag in order
to decrease memory footprint in some configuration.
PINCTRL_FULL can be enabled for debug purpose.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
drivers/pinctrl/pinctrl_stm32.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 6183103..fb2593c 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -133,6 +133,12 @@ static int stm32_pinctrl_config(int offset)
return 0;
}
+#if CONFIG_IS_ENABLED(PINCTRL_FULL)
+static int stm32_pinctrl_set_state(struct udevice *dev, struct udevice *config)
+{
+ return stm32_pinctrl_config(dev_of_offset(config));
+}
+#else /* PINCTRL_FULL */
static int stm32_pinctrl_set_state_simple(struct udevice *dev,
struct udevice *periph)
{
@@ -165,9 +171,14 @@ static int stm32_pinctrl_set_state_simple(struct udevice *dev,
return 0;
}
+#endif /* PINCTRL_FULL */
static struct pinctrl_ops stm32_pinctrl_ops = {
+#if CONFIG_IS_ENABLED(PINCTRL_FULL)
+ .set_state = stm32_pinctrl_set_state,
+#else /* PINCTRL_FULL */
.set_state_simple = stm32_pinctrl_set_state_simple,
+#endif /* PINCTRL_FULL */
};
static const struct udevice_id stm32_pinctrl_ids[] = {
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [U-Boot, 1/2] pinctrl: stm32: handle a configuration list
2017-06-20 15:04 ` [U-Boot] [PATCH 1/2] pinctrl: stm32: handle a configuration list patrice.chotard at st.com
@ 2017-07-11 12:40 ` Tom Rini
0 siblings, 0 replies; 5+ messages in thread
From: Tom Rini @ 2017-07-11 12:40 UTC (permalink / raw)
To: u-boot
On Tue, Jun 20, 2017 at 05:04:18PM +0200, Patrice Chotard wrote:
> From: Christophe Kerello <christophe.kerello@st.com>
>
> This patch handles a configuration list behind pinctrl-0
> like pinctrl-0 = <&qspi_clk_a &qspi_bk1_a &qspi_bk2_a>;
>
> Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
> Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Applied to u-boot/master, thanks!
--
Tom
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* [U-Boot] [U-Boot,2/2] pinctrl: stm32: add set_state ops
2017-06-20 15:04 ` [U-Boot] [PATCH 2/2] pinctrl: stm32: add set_state ops patrice.chotard at st.com
@ 2017-07-11 12:40 ` Tom Rini
0 siblings, 0 replies; 5+ messages in thread
From: Tom Rini @ 2017-07-11 12:40 UTC (permalink / raw)
To: u-boot
On Tue, Jun 20, 2017 at 05:04:19PM +0200, Patrice Chotard wrote:
> From: Christophe Kerello <christophe.kerello@st.com>
>
> set_state_ops is kept under PINCTRL_FULL flag in order
> to decrease memory footprint in some configuration.
> PINCTRL_FULL can be enabled for debug purpose.
>
> Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Applied to u-boot/master, thanks!
--
Tom
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2017-06-20 15:04 [U-Boot] [PATCH 0/2] stm32 pinctrl improvements patrice.chotard at st.com
2017-06-20 15:04 ` [U-Boot] [PATCH 1/2] pinctrl: stm32: handle a configuration list patrice.chotard at st.com
2017-07-11 12:40 ` [U-Boot] [U-Boot, " Tom Rini
2017-06-20 15:04 ` [U-Boot] [PATCH 2/2] pinctrl: stm32: add set_state ops patrice.chotard at st.com
2017-07-11 12:40 ` [U-Boot] [U-Boot,2/2] " Tom Rini
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