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* [U-Boot] [GIT PULL] Xilinx fixes for v2018.01-rc2
@ 2017-12-15 14:33 Michal Simek
  2017-12-16  1:54 ` Tom Rini
  0 siblings, 1 reply; 3+ messages in thread
From: Michal Simek @ 2017-12-15 14:33 UTC (permalink / raw)
  To: u-boot

Hi Tom, +Stephen

please pull these changes to your tree. Travis is not showing any issue.
https://travis-ci.org/michalsimek-test/u-boot/builds/316577925

Buildman was also fine over all patches and tests on board looks good too.

I have included one patch from Stephen which we discussed for fixing
zynq_cse_qspi configuration which doesn't use HUSH.

Thanks,
Michal


The following changes since commit 659208da4703de50826a469cbb38bf6afb938978:

  README: update the kernel coding style reference (2017-12-12 21:34:10
-0500)

are available in the git repository at:

  git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.01-rc2

for you to fetch changes up to 956a1340c8677e96f9eb364fb0070c152d591a4a:

  test/py: Setup variables based on HUSH selection (2017-12-14 20:09:04
+0100)

----------------------------------------------------------------
Xilinx changes for v2018.01-rc2

fpga:
- Enable loading bitstream via fit image for !xilinx platforms

zynq:
- Fix SPL SD boot mode

zynqmp:
- Not not reset in panic
- Do not use simple allocator because of fat changes
- Various dt chagnes
- modeboot variable setup
- Fix fpga loading on automotive devices
- Fix coverity issues

test:
- Fix env test for !hush case - Stephen's patch

----------------------------------------------------------------
Goldschmidt Simon (1):
      fpga: allow programming fpga from FIT image for all FPGA drivers

Javier Martinez Canillas (1):
      arm64: zynqmp: Add generic compatible string for I2C EEPROM

Michal Simek (19):
      arm: zynq: Fix SPL SD boot mode
      arm64: zynqmp: Do not perform reset in case of panic
      arm64: zynqmp: Do not use SPL_SYS_MALLOC_SIMPLE allocator
      arm64: zynqmp: Add reference to pmu firmware node
      arm64: zynqmp: Add support for generic QSPI boot
      arm64: zynqmp: Enable SPL_CLK when SPL is enabled
      arm64: zynqmp: Setup modeboot variable based on bootmode
      arm64: zynqmp: Enable phys for zcu102
      arm64: zynqmp: Enable clock command for all boards
      arm64: zynqmp: Remove undocumented dma properties
      arm64: zynqmp: Use only earlycon bootargs instead of full one
      arm64: zynqmp: Add missing zynq_board_read_rom_ethaddr() prototype
      arm64: zynqmp: Add support for zynqmp automotive silicons
      arm64: zynqmp: Enable misc devices
      arm64: zynqmp: Enable SPL ram support
      arm64: zynqmp: Enable fpga bitstream loading
      arm64: zynqmp: Enable AES command
      arm64: zynqmp: Enable spi flashes
      tools: zynqmpimage: Check return values from file functions

Siva Durga Prasad Paladugu (3):
      arm64: zynqmp: Read boot mode register using zynqmp_mmio_read
      arm64: zynqmp: Dont use 4K sector erase by default for spi-flashes
      arm64: zynqmp: Access timestamp_ref_ctrl register only if running
in el3

Stephen Warren (1):
      test/py: Setup variables based on HUSH selection

 arch/arm/Kconfig                                 |  2 +-
 arch/arm/dts/zynqmp-ep108.dts                    |  4 ++--
 arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts         |  9 ---------
 arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts         |  9 ---------
 arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts         |  9 ---------
 arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts         | 11 +----------
 arch/arm/dts/zynqmp-zcu102-revA.dts              | 20 +++++++++++---------
 arch/arm/dts/zynqmp.dtsi                         |  3 ++-
 arch/arm/include/asm/arch-zynqmp/sys_proto.h     |  1 +
 board/xilinx/zynqmp/zynqmp.c                     | 23
+++++++++++++++++++----
 common/bootm.c                                   |  2 +-
 common/image.c                                   |  6 ++----
 configs/syzygy_hub_defconfig                     |  2 ++
 configs/topic_miami_defconfig                    |  2 ++
 configs/topic_miamilite_defconfig                |  2 ++
 configs/topic_miamiplus_defconfig                |  2 ++
 configs/xilinx_zynqmp_ep_defconfig               |  7 ++++++-
 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 10 +++++++++-
 configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig |  8 +++++++-
 configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 15 ++++++++++++++-
 configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig |  8 +++++++-
 configs/xilinx_zynqmp_zcu102_rev1_0_defconfig    | 10 +++++++++-
 configs/xilinx_zynqmp_zcu102_revA_defconfig      | 10 +++++++++-
 configs/xilinx_zynqmp_zcu102_revB_defconfig      | 10 +++++++++-
 configs/zynq_cc108_defconfig                     |  2 ++
 configs/zynq_cse_qspi_defconfig                  |  2 ++
 configs/zynq_microzed_defconfig                  |  2 ++
 configs/zynq_picozed_defconfig                   |  2 ++
 configs/zynq_z_turn_defconfig                    |  2 ++
 configs/zynq_zc702_defconfig                     |  2 ++
 configs/zynq_zc706_defconfig                     |  2 ++
 configs/zynq_zc770_xm010_defconfig               |  2 ++
 configs/zynq_zc770_xm011_defconfig               |  2 ++
 configs/zynq_zc770_xm012_defconfig               |  2 ++
 configs/zynq_zc770_xm013_defconfig               |  2 ++
 configs/zynq_zed_defconfig                       |  2 ++
 configs/zynq_zybo_defconfig                      |  2 ++
 drivers/fpga/fpga.c                              |  9 +++++++++
 drivers/fpga/xilinx.c                            | 13 +++++++++++++
 include/configs/xilinx_zynqmp.h                  | 16 +++++++++++++---
 include/configs/zynq-common.h                    |  7 ++-----
 include/fpga.h                                   |  1 +
 test/py/tests/test_env.py                        | 11 ++++++++++-
 tools/zynqmpimage.c                              | 32
+++++++++++++++++++++++++++-----
 44 files changed, 219 insertions(+), 81 deletions(-)

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs


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2017-12-15 14:33 [U-Boot] [GIT PULL] Xilinx fixes for v2018.01-rc2 Michal Simek
2017-12-16  1:54 ` Tom Rini
2017-12-18  9:06   ` Michal Simek

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