From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] armv7r: K3: Allow SPL to run only on core 0
Date: Thu, 15 Nov 2018 16:04:14 -0500 [thread overview]
Message-ID: <20181115210414.GS11247@bill-the-cat> (raw)
In-Reply-To: <20181115053450.17555-1-lokeshvutla@ti.com>
On Thu, Nov 15, 2018 at 11:04:50AM +0530, Lokesh Vutla wrote:
> Based on the MCU R5 efuse settings, R5F cores in MCU domain
> either work in split mode or in lock step mode.
>
> If efuse settings are in lockstep mode: ROM release R5 cores
> and SPL continues to run on the R5 core is lockstep mode.
>
> If efuse settings are in split mode: ROM releases both the R5
> cores simultaneously and allow SPL to run on both the cores.
> In this case it is bootloader's responsibility to detect core
> 1 and park it. Else both the core will be running bootloader
> independently which might result in an unexpected behaviour.
>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
--
Tom
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next prev parent reply other threads:[~2018-11-15 21:04 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-15 5:34 [U-Boot] [PATCH] armv7r: K3: Allow SPL to run only on core 0 Lokesh Vutla
2018-11-15 21:04 ` Tom Rini [this message]
2018-11-27 18:47 ` [U-Boot] " Tom Rini
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