From: Keerthy <j-keerthy@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 4/6] arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately before hw leveling
Date: Fri, 12 Apr 2019 12:08:18 +0530 [thread overview]
Message-ID: <20190412063820.25924-5-j-keerthy@ti.com> (raw)
In-Reply-To: <20190412063820.25924-1-j-keerthy@ti.com>
From: Brad Griffis <bgriffis@ti.com>
In case of RTC+DDR resume, need to restore EMIF context
before initiating hardware leveling.
Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
arch/arm/mach-omap2/am33xx/board.c | 3 ---
arch/arm/mach-omap2/am33xx/ddr.c | 10 ++++++++++
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index fe7b8e1e55..5507348981 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -481,9 +481,6 @@ static void rtc_only(void)
rtc_only_prcm_init();
sdram_init();
- /* Disable EMIF_DEVOFF for normal operation and to exit self-refresh */
- writel(0, &prm_device->emif_ctrl);
-
/* Check EMIF4D_SDRAM_CONFIG[31:29] SDRAM_TYPE */
/* Only perform leveling if SDRAM_TYPE = 3 (DDR3) */
sdrc = readl(AM43XX_EMIF_BASE + AM43XX_SDRAM_CONFIG_OFFSET);
diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index 5d947a68c3..e6e6ef8e9a 100644
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -80,6 +80,9 @@ static void configure_mr(int nr, u32 cs)
*/
void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
{
+ struct prm_device_inst *prm_device =
+ (struct prm_device_inst *)PRM_DEVICE_INST;
+
writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl);
writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl_shdw);
writel(regs->zq_config, &emif_reg[nr]->emif_zq_config);
@@ -126,6 +129,13 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
+ /*
+ * Disable EMIF_DEVOFF
+ * -> Cold Boot: This is just rewriting the default register value.
+ * -> RTC Resume: Must disable DEVOFF before leveling.
+ */
+ writel(0, &prm_device->emif_ctrl);
+
/* Perform hardware leveling for DDR3 */
if (emif_sdram_type(regs->sdram_config) == EMIF_SDRAM_TYPE_DDR3) {
writel(readl(&emif_reg[nr]->emif_ddr_ext_phy_ctrl_36) |
--
2.17.1
next prev parent reply other threads:[~2019-04-12 6:38 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-12 6:38 [U-Boot] [PATCH 0/6] board: ti: am43xx: Enable hardware leveling Keerthy
2019-04-12 6:38 ` [U-Boot] [PATCH 1/6] arm: mach-omap2: am33xx: ddr: programming of EXT_PHY_CTRL1 and EXT_PHY_CTRL1_SHADOW Keerthy
2019-04-12 6:38 ` [U-Boot] [PATCH 2/6] arm: mach-omap2: am33xx: ddr: Add 1ms delay to avoid L3 error Keerthy
2019-04-12 6:38 ` [U-Boot] [PATCH 3/6] arm: mach-omap2: am33xx: Enable HW Leveling in the rtc+ddr path Keerthy
2019-04-12 6:38 ` Keerthy [this message]
2019-04-26 11:16 ` [U-Boot] [U-Boot, 4/6] arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately before hw leveling Tom Rini
2019-04-26 11:53 ` Lokesh Vutla
2019-04-26 12:55 ` Tom Rini
2019-04-26 16:44 ` Keerthy
2019-04-26 16:46 ` Tom Rini
2019-04-26 16:50 ` Keerthy
2019-04-26 16:39 ` Keerthy
2019-04-26 14:11 ` Keerthy
2019-04-12 6:38 ` [U-Boot] [PATCH 5/6] arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36 Keerthy
2019-04-12 6:38 ` [U-Boot] [PATCH 6/6] board: ti: am43xx: Enable hardware leveling Keerthy
2019-04-13 13:02 ` [U-Boot] [PATCH 0/6] " Tom Rini
2019-04-15 0:49 ` keerthy
2019-04-15 1:05 ` Tom Rini
2019-04-15 2:13 ` keerthy
2019-04-15 8:56 ` Keerthy
2019-04-15 9:22 ` Tero Kristo
2019-04-15 11:28 ` Tom Rini
2019-04-15 12:10 ` Keerthy
2019-04-15 12:14 ` Tom Rini
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