From: Ley Foon Tan <ley.foon.tan@intel.com>
To: u-boot@lists.denx.de
Subject: [PATCH 5/7] ddr: altera: arria10: Add RAM size check
Date: Wed, 15 Apr 2020 17:00:28 +0800 [thread overview]
Message-ID: <20200415090030.128489-6-ley.foon.tan@intel.com> (raw)
In-Reply-To: <20200415090030.128489-1-ley.foon.tan@intel.com>
Add call to get_ram_size() function to check memory range
for valid RAM.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
drivers/ddr/altera/sdram_arria10.c | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c
index 6b74423ea789..e3f11984a978 100644
--- a/drivers/ddr/altera/sdram_arria10.c
+++ b/drivers/ddr/altera/sdram_arria10.c
@@ -8,6 +8,7 @@
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
+#include <hang.h>
#include <malloc.h>
#include <ram.h>
#include <reset.h>
@@ -17,7 +18,7 @@
#include <asm/arch/fpga_manager.h>
#include <asm/arch/misc.h>
#include <dm/device_compat.h>
-#include <linux/kernel.h>
+#include <linux/sizes.h>
#include "sdram_arria10.h"
@@ -671,6 +672,27 @@ static int ddr_calibration_sequence(struct altera_sdram_platdata *plat)
return 0;
}
+static void sdram_size_check(struct ram_info *ram)
+{
+ phys_size_t ram_check = 0;
+ phys_size_t size = ram->size;
+ phys_addr_t base = ram->base;
+
+ debug("DDR: Running SDRAM size sanity check\n");
+
+ while (ram_check < size) {
+ ram_check += get_ram_size((void *)(base + ram_check),
+ (phys_size_t)SZ_1G);
+ }
+
+ if (ram_check != size) {
+ puts("DDR: SDRAM size check failed!\n");
+ hang();
+ }
+
+ debug("DDR: SDRAM size check passed!\n");
+}
+
static int altera_sdram_ofdata_to_platdata(struct udevice *dev)
{
struct altera_sdram_platdata *plat = dev->platdata;
@@ -715,6 +737,7 @@ static int altera_sdram_probe(struct udevice *dev)
priv->info.base = gd->bd->bi_dram[0].start;
priv->info.size = gd->ram_size;
+ sdram_size_check(&priv->info);
return 0;
failed:
--
2.19.0
next prev parent reply other threads:[~2020-04-15 9:00 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-15 9:00 [PATCH 0/7] ddr: altera: arria10: Convert SDRAM driver to DM Ley Foon Tan
2020-04-15 9:00 ` [PATCH 1/7] ddr: altera: arria10: Fix incorrect address for mpu1 Ley Foon Tan
2020-04-15 12:37 ` Marek Vasut
2020-04-16 1:23 ` Tan, Ley Foon
2020-04-15 9:00 ` [PATCH 2/7] ddr: altera: arria10: Move SDRAM driver to DM Ley Foon Tan
2020-04-15 12:42 ` Marek Vasut
2020-04-16 1:41 ` Tan, Ley Foon
2020-04-16 8:51 ` Marek Vasut
2020-04-15 9:00 ` [PATCH 3/7] ddr: altera: arria10: Change to use reset DM function Ley Foon Tan
2020-04-15 12:43 ` Marek Vasut
2020-04-16 1:42 ` Tan, Ley Foon
2020-04-15 9:00 ` [PATCH 4/7] arm: socfpga: arria10: Move sdram_arria10.h to drivers/ddr/altera Ley Foon Tan
2020-04-15 9:00 ` Ley Foon Tan [this message]
2020-04-15 12:44 ` [PATCH 5/7] ddr: altera: arria10: Add RAM size check Marek Vasut
2020-04-16 1:34 ` Tan, Ley Foon
2020-04-16 8:52 ` Marek Vasut
2020-04-16 9:18 ` Tan, Ley Foon
2020-04-15 9:00 ` [PATCH 6/7] ddr: altera: arria10: Change %i to %u for printf Ley Foon Tan
2020-04-15 12:45 ` Marek Vasut
2020-04-15 14:56 ` Tom Rini
2020-04-15 14:58 ` Marek Vasut
2020-04-15 15:14 ` Tom Rini
2020-04-15 15:16 ` Marek Vasut
2020-04-15 17:44 ` Tom Rini
2020-04-15 18:06 ` Marek Vasut
2020-04-16 12:55 ` Tom Rini
2020-04-16 13:11 ` Marek Vasut
2020-04-16 13:21 ` Tom Rini
2020-04-16 13:39 ` Marek Vasut
2020-04-16 18:02 ` Tom Rini
2020-04-16 19:33 ` Marek Vasut
2020-04-15 9:00 ` [PATCH 7/7] ddr: altera: arria10: Remove call to dram_init_banksize() Ley Foon Tan
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