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From: Ley Foon Tan <ley.foon.tan@intel.com>
To: u-boot@lists.denx.de
Subject: [PATCH] cache: l2x0: Fix missing write to Auxiliary Control Register
Date: Mon,  4 May 2020 18:41:55 +0800	[thread overview]
Message-ID: <20200504104155.51123-1-ley.foon.tan@intel.com> (raw)

commit f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override
bit")

Commit above removed writel to regs->pl310_aux_ctrl by accidentally,
restore it back.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
 drivers/cache/cache-l2x0.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/cache/cache-l2x0.c b/drivers/cache/cache-l2x0.c
index 226824c2832e..a1556fbf1740 100644
--- a/drivers/cache/cache-l2x0.c
+++ b/drivers/cache/cache-l2x0.c
@@ -36,6 +36,8 @@ static void l2c310_of_parse_and_init(struct udevice *dev)
 	if (dev_read_bool(dev, "arm,shared-override"))
 		saved_reg |= L310_SHARED_ATT_OVERRIDE_ENABLE;
 
+	writel(saved_reg, &regs->pl310_aux_ctrl);
+
 	saved_reg = readl(&regs->pl310_tag_latency_ctrl);
 	if (!dev_read_u32_array(dev, "arm,tag-latency", tag, 3))
 		saved_reg |= L310_LATENCY_CTRL_RD(tag[0] - 1) |
-- 
2.19.0

             reply	other threads:[~2020-05-04 10:41 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-04 10:41 Ley Foon Tan [this message]
2020-05-07 13:04 ` [PATCH] cache: l2x0: Fix missing write to Auxiliary Control Register Tom Rini

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