From: Chee Hong Ang <chee.hong.ang@intel.com>
To: u-boot@lists.denx.de
Subject: [PATCH v1 1/3] fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox
Date: Fri, 7 Aug 2020 11:50:03 +0800 [thread overview]
Message-ID: <20200807035005.73459-2-chee.hong.ang@intel.com> (raw)
In-Reply-To: <20200807035005.73459-1-chee.hong.ang@intel.com>
Rename Stratix10 FPGA driver to Intel FPGA SDM Mailbox driver
because it is using generic SDM (Secure Device Manager) Mailbox
interface shared by other platform (e.g. Agilex) as well.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
---
arch/arm/mach-socfpga/Kconfig | 2 +-
arch/arm/mach-socfpga/misc_s10.c | 2 +-
drivers/fpga/Kconfig | 12 ++++++------
drivers/fpga/Makefile | 2 +-
drivers/fpga/altera.c | 7 ++++---
drivers/fpga/{stratix10.c => intel_sdm_mb.c} | 2 +-
include/altera.h | 9 +++++----
7 files changed, 19 insertions(+), 17 deletions(-)
rename drivers/fpga/{stratix10.c => intel_sdm_mb.c} (98%)
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index a3699e82a1..32549913cc 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -79,7 +79,7 @@ config TARGET_SOCFPGA_STRATIX10
select ARMV8_MULTIENTRY
select ARMV8_SET_SMPEN
select ARMV8_SPIN_TABLE
- select FPGA_STRATIX10
+ select FPGA_INTEL_SDM_MAILBOX
choice
prompt "Altera SOCFPGA board select"
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index 670bfa1a31..1d658f5c60 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
static Altera_desc altera_fpga[] = {
{
/* Family */
- Intel_FPGA_Stratix10,
+ Intel_FPGA_SDM_Mailbox,
/* Interface type */
secure_device_manager_mailbox,
/* No limitation as additional data will be ignored */
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index fe398a1d49..dd0b39a8d1 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -31,16 +31,16 @@ config FPGA_CYCLON2
Enable FPGA driver for loading bitstream in BIT and BIN format
on Altera Cyclone II device.
-config FPGA_STRATIX10
- bool "Enable Altera FPGA driver for Stratix 10"
+config FPGA_INTEL_SDM_MAILBOX
+ bool "Enable Intel FPGA Full Reconfiguration SDM Mailbox driver"
depends on TARGET_SOCFPGA_STRATIX10
select FPGA_ALTERA
help
- Say Y here to enable the Altera Stratix 10 FPGA specific driver
+ Say Y here to enable the Intel FPGA Full Reconfig SDM Mailbox driver
- This provides common functionality for Altera Stratix 10 devices.
- Enable FPGA driver for writing bitstream into Altera Stratix10
- device.
+ This provides common functionality for Intel FPGA devices.
+ Enable FPGA driver for writing full bitstream into Intel FPGA
+ devices through SDM (Secure Device Manager) Mailbox.
config FPGA_XILINX
bool "Enable Xilinx FPGA drivers"
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 04e6480f20..83243fb107 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -16,9 +16,9 @@ ifdef CONFIG_FPGA_ALTERA
obj-y += altera.o
obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
+obj-$(CONFIG_FPGA_INTEL_SDM_MAILBOX) += intel_sdm_mb.o
obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
-obj-$(CONFIG_FPGA_STRATIX10) += stratix10.o
obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o
obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += socfpga_arria10.o
diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index bb27b3778f..10c0475d25 100644
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -40,12 +40,13 @@ static const struct altera_fpga {
#if defined(CONFIG_FPGA_STRATIX_V)
{ Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
#endif
-#if defined(CONFIG_FPGA_STRATIX10)
- { Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL },
-#endif
#if defined(CONFIG_FPGA_SOCFPGA)
{ Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
#endif
+#if defined(CONFIG_FPGA_INTEL_SDM_MAILBOX)
+ { Intel_FPGA_SDM_Mailbox, "Intel SDM Mailbox", intel_sdm_mb_load, NULL,
+ NULL },
+#endif
};
static int altera_validate(Altera_desc *desc, const char *fn)
diff --git a/drivers/fpga/stratix10.c b/drivers/fpga/intel_sdm_mb.c
similarity index 98%
rename from drivers/fpga/stratix10.c
rename to drivers/fpga/intel_sdm_mb.c
index da8fa315e3..3508231191 100644
--- a/drivers/fpga/stratix10.c
+++ b/drivers/fpga/intel_sdm_mb.c
@@ -247,7 +247,7 @@ static int send_reconfig_data(const void *rbf_data, size_t rbf_size,
* This is the interface used by FPGA driver.
* Return 0 for success, non-zero for error.
*/
-int stratix10_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
+int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
{
int ret;
u32 resp_len = 2;
diff --git a/include/altera.h b/include/altera.h
index 22d55cfd73..946413c66e 100644
--- a/include/altera.h
+++ b/include/altera.h
@@ -56,10 +56,10 @@ enum altera_family {
Altera_StratixII,
/* StratixV Family */
Altera_StratixV,
- /* Stratix10 Family */
- Intel_FPGA_Stratix10,
/* SoCFPGA Family */
Altera_SoCFPGA,
+ /* Intel FPGA Family with SDM (Secure Device Manager) Mailbox */
+ Intel_FPGA_SDM_Mailbox,
/* Add new models here */
@@ -120,8 +120,9 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
#endif
-#ifdef CONFIG_FPGA_STRATIX10
-int stratix10_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
+#ifdef CONFIG_FPGA_INTEL_SDM_MAILBOX
+int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data,
+ size_t rbf_size);
#endif
#endif /* _ALTERA_H_ */
--
2.13.0
next prev parent reply other threads:[~2020-08-07 3:50 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-07 3:50 [PATCH v1 0/3] Rename Stratix10 FPGA driver and support Agilex Chee Hong Ang
2020-08-07 3:50 ` Chee Hong Ang [this message]
2020-08-11 2:08 ` [PATCH v1 1/3] fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox Tan, Ley Foon
2020-08-07 3:50 ` [PATCH v1 2/3] fpga: intel_sdm_mb: Add watchdog reset Chee Hong Ang
2020-08-11 2:09 ` Tan, Ley Foon
2020-08-07 3:50 ` [PATCH v1 3/3] arm: socfpga: agilex: Enable FPGA Full Reconfiguration support Chee Hong Ang
2020-08-11 2:06 ` Tan, Ley Foon
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