[PATCH v2 0/5] Add spi boot support to am335x-icev2

[PATCH v2 0/5] Add spi boot support to am335x-icev2

[Faiz Abbas]

The following patches add spi boot support to TI's am335x-icev2 platform

v2:
1. Changed order of patches to avoid breaking build
2. Changed SPI_OFFSET to SPI0_OFFSET and moved the define
   arch/arm/mach-omap2/am335x/board.c
3. Updated MAINTAINERS list with the new defconfig.


Faiz Abbas (5):
  arm: dts: am335x-icev2: Add spi node
  spi: spi-uclass: Block dm_scan_fdt_dev with OF_CONTROL to prevent
    build failures
  arm: mach-omap2: am33xx: Add device structure for spi
  spi: omap3_spi: Read platform data in ofdata_to_platdata()
  configs: Add spiboot support for am335x

 arch/arm/dts/am335x-icev2.dts        |  50 +++++++++++++
 arch/arm/mach-omap2/am33xx/board.c   |  18 +++++
 board/ti/am335x/MAINTAINERS          |   1 +
 configs/am335x_evm_spiboot_defconfig |  93 +++++++++++++++++++++++
 drivers/spi/omap3_spi.c              | 107 +++++++--------------------
 drivers/spi/spi-uclass.c             |   2 +-
 include/configs/am335x_evm.h         |   2 -
 include/omap3_spi.h                  |  78 +++++++++++++++++++
 8 files changed, 268 insertions(+), 83 deletions(-)
 create mode 100644 configs/am335x_evm_spiboot_defconfig
 create mode 100644 include/omap3_spi.h

-- 
2.17.1

[PATCH v2 1/5] arm: dts: am335x-icev2: Add spi node

[Faiz Abbas]

Add spi and spi nor flash nodes for am335x-icev2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
 arch/arm/dts/am335x-icev2.dts | 50 +++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/dts/am335x-icev2.dts b/arch/arm/dts/am335x-icev2.dts
index 37484cb6f5..2a1b3a53e9 100644
--- a/arch/arm/dts/am335x-icev2.dts
+++ b/arch/arm/dts/am335x-icev2.dts
@@ -436,3 +436,53 @@
 		reg = <3>;
 	};
 };
+
+&spi0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pins_default>;
+
+	sn65hvs882 at 1 {
+		compatible = "pisosr-gpio";
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
+
+		reg = <1>;
+		spi-max-frequency = <1000000>;
+		spi-cpol;
+	};
+
+	spi_nor: flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64", "jedec,spi-nor";
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
+		reg = <0>;
+
+		partition at 0 {
+			label = "u-boot-spl";
+			reg = <0x0 0x80000>;
+			read-only;
+		};
+
+		partition at 1 {
+			label = "u-boot";
+			reg = <0x80000 0x100000>;
+			read-only;
+		};
+
+		partition at 2 {
+			label = "u-boot-env";
+			reg = <0x180000 0x20000>;
+			read-only;
+		};
+
+		partition at 3 {
+			label = "misc";
+			reg = <0x1A0000 0x660000>;
+		};
+	};
+};
-- 
2.17.1

[PATCH v2 2/5] spi: spi-uclass: Block dm_scan_fdt_dev with OF_CONTROL to prevent build failures

[Faiz Abbas]

There are devices which don't use OF_CONTROL or OF_PLATDATA but instead
rely on statically defined platdata. Block dm_scan_fdt_dev() with both
configs to avoid build failures under this condition.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
---
 drivers/spi/spi-uclass.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index cffd9cf0b0..55a8eed890 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -497,7 +497,7 @@ UCLASS_DRIVER(spi) = {
 	.id		= UCLASS_SPI,
 	.name		= "spi",
 	.flags		= DM_UC_FLAG_SEQ_ALIAS,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.post_bind	= dm_scan_fdt_dev,
 #endif
 	.post_probe	= spi_post_probe,
-- 
2.17.1

[PATCH v2 3/5] arm: mach-omap2: am33xx: Add device structure for spi

[Faiz Abbas]

Add platform data and a device structure for the spi device
present on am335x-icev2. This requires moving all omap3_spi
platform data structures and symbols to an omap3_spi.h so that
the board file can access them.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
 arch/arm/mach-omap2/am33xx/board.c | 18 +++++++
 drivers/spi/omap3_spi.c            | 70 +--------------------------
 include/configs/am335x_evm.h       |  2 -
 include/omap3_spi.h                | 78 ++++++++++++++++++++++++++++++
 4 files changed, 97 insertions(+), 71 deletions(-)
 create mode 100644 include/omap3_spi.h

diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index a7b56b6bb3..2888390d24 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -14,6 +14,7 @@
 #include <init.h>
 #include <net.h>
 #include <ns16550.h>
+#include <omap3_spi.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
@@ -49,6 +50,12 @@
 #define AM43XX_READ_WRITE_LEVELING_CTRL_OFFSET		0xDC
 #define AM43XX_RDWRLVLFULL_START			0x80000000
 
+/* SPI flash. */
+#if CONFIG_IS_ENABLED(DM_SPI) && !CONFIG_IS_ENABLED(OF_CONTROL)
+#define AM33XX_SPI0_BASE	0x48030000
+#define AM33XX_SPI0_OFFSET	(AM33XX_SPI0_BASE + OMAP4_MCSPI_REG_OFFSET)
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init(void)
@@ -142,6 +149,17 @@ U_BOOT_DEVICES(am33xx_gpios) = {
 #endif
 };
 #endif
+#if CONFIG_IS_ENABLED(DM_SPI) && !CONFIG_IS_ENABLED(OF_CONTROL)
+static const struct omap3_spi_plat omap3_spi_pdata = {
+	.regs = (struct mcspi *)AM33XX_SPI0_OFFSET,
+	.pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT,
+};
+
+U_BOOT_DEVICE(am33xx_spi) = {
+	.name = "omap3_spi",
+	.platdata = &omap3_spi_pdata,
+};
+#endif
 #endif
 
 #if !CONFIG_IS_ENABLED(DM_GPIO)
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index fbf9575851..fb1cf360fc 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -22,82 +22,14 @@
 #include <malloc.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
+#include <omap3_spi.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define OMAP4_MCSPI_REG_OFFSET	0x100
-
 struct omap2_mcspi_platform_config {
 	unsigned int regs_offset;
 };
 
-/* per-register bitmasks */
-#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
-#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2)
-#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE	BIT(0)
-#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1)
-
-#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0)
-
-#define OMAP3_MCSPI_MODULCTRL_SINGLE	BIT(0)
-#define OMAP3_MCSPI_MODULCTRL_MS	BIT(2)
-#define OMAP3_MCSPI_MODULCTRL_STEST	BIT(3)
-
-#define OMAP3_MCSPI_CHCONF_PHA		BIT(0)
-#define OMAP3_MCSPI_CHCONF_POL		BIT(1)
-#define OMAP3_MCSPI_CHCONF_CLKD_MASK	GENMASK(5, 2)
-#define OMAP3_MCSPI_CHCONF_EPOL		BIT(6)
-#define OMAP3_MCSPI_CHCONF_WL_MASK	GENMASK(11, 7)
-#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY	BIT(12)
-#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY	BIT(13)
-#define OMAP3_MCSPI_CHCONF_TRM_MASK	GENMASK(13, 12)
-#define OMAP3_MCSPI_CHCONF_DMAW		BIT(14)
-#define OMAP3_MCSPI_CHCONF_DMAR		BIT(15)
-#define OMAP3_MCSPI_CHCONF_DPE0		BIT(16)
-#define OMAP3_MCSPI_CHCONF_DPE1		BIT(17)
-#define OMAP3_MCSPI_CHCONF_IS		BIT(18)
-#define OMAP3_MCSPI_CHCONF_TURBO	BIT(19)
-#define OMAP3_MCSPI_CHCONF_FORCE	BIT(20)
-
-#define OMAP3_MCSPI_CHSTAT_RXS		BIT(0)
-#define OMAP3_MCSPI_CHSTAT_TXS		BIT(1)
-#define OMAP3_MCSPI_CHSTAT_EOT		BIT(2)
-
-#define OMAP3_MCSPI_CHCTRL_EN		BIT(0)
-#define OMAP3_MCSPI_CHCTRL_DIS		(0 << 0)
-
-#define OMAP3_MCSPI_WAKEUPENABLE_WKEN	BIT(0)
-#define MCSPI_PINDIR_D0_IN_D1_OUT	0
-#define MCSPI_PINDIR_D0_OUT_D1_IN	1
-
-#define OMAP3_MCSPI_MAX_FREQ		48000000
-#define SPI_WAIT_TIMEOUT		10
-
-/* OMAP3 McSPI registers */
-struct mcspi_channel {
-	unsigned int chconf;		/* 0x2C, 0x40, 0x54, 0x68 */
-	unsigned int chstat;		/* 0x30, 0x44, 0x58, 0x6C */
-	unsigned int chctrl;		/* 0x34, 0x48, 0x5C, 0x70 */
-	unsigned int tx;		/* 0x38, 0x4C, 0x60, 0x74 */
-	unsigned int rx;		/* 0x3C, 0x50, 0x64, 0x78 */
-};
-
-struct mcspi {
-	unsigned char res1[0x10];
-	unsigned int sysconfig;		/* 0x10 */
-	unsigned int sysstatus;		/* 0x14 */
-	unsigned int irqstatus;		/* 0x18 */
-	unsigned int irqenable;		/* 0x1C */
-	unsigned int wakeupenable;	/* 0x20 */
-	unsigned int syst;		/* 0x24 */
-	unsigned int modulctrl;		/* 0x28 */
-	struct mcspi_channel channel[4];
-	/* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */
-	/* channel1: 0x40 - 0x50, bus 0 & 1 */
-	/* channel2: 0x54 - 0x64, bus 0 & 1 */
-	/* channel3: 0x68 - 0x78, bus 0 */
-};
-
 struct omap3_spi_priv {
 	struct mcspi *regs;
 	unsigned int cs;
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 9c4ef369c5..0767927376 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -280,8 +280,6 @@
 #define CONFIG_SYS_ENV_SECT_SIZE	CONFIG_SYS_NAND_BLOCK_SIZE
 #endif
 
-/* SPI flash. */
-
 /* Network. */
 /* Enable Atheros phy driver */
 
diff --git a/include/omap3_spi.h b/include/omap3_spi.h
new file mode 100644
index 0000000000..cae3770583
--- /dev/null
+++ b/include/omap3_spi.h
@@ -0,0 +1,78 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+#ifndef __OMAP3_SPI_H_
+#define __OMAP3_SPI_H_
+
+/* per-register bitmasks */
+#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
+#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2)
+#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE	BIT(0)
+#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1)
+
+#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0)
+
+#define OMAP3_MCSPI_MODULCTRL_SINGLE	BIT(0)
+#define OMAP3_MCSPI_MODULCTRL_MS	BIT(2)
+#define OMAP3_MCSPI_MODULCTRL_STEST	BIT(3)
+
+#define OMAP3_MCSPI_CHCONF_PHA		BIT(0)
+#define OMAP3_MCSPI_CHCONF_POL		BIT(1)
+#define OMAP3_MCSPI_CHCONF_CLKD_MASK	GENMASK(5, 2)
+#define OMAP3_MCSPI_CHCONF_EPOL		BIT(6)
+#define OMAP3_MCSPI_CHCONF_WL_MASK	GENMASK(11, 7)
+#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY	BIT(12)
+#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY	BIT(13)
+#define OMAP3_MCSPI_CHCONF_TRM_MASK	GENMASK(13, 12)
+#define OMAP3_MCSPI_CHCONF_DMAW		BIT(14)
+#define OMAP3_MCSPI_CHCONF_DMAR		BIT(15)
+#define OMAP3_MCSPI_CHCONF_DPE0		BIT(16)
+#define OMAP3_MCSPI_CHCONF_DPE1		BIT(17)
+#define OMAP3_MCSPI_CHCONF_IS		BIT(18)
+#define OMAP3_MCSPI_CHCONF_TURBO	BIT(19)
+#define OMAP3_MCSPI_CHCONF_FORCE	BIT(20)
+
+#define OMAP3_MCSPI_CHSTAT_RXS		BIT(0)
+#define OMAP3_MCSPI_CHSTAT_TXS		BIT(1)
+#define OMAP3_MCSPI_CHSTAT_EOT		BIT(2)
+
+#define OMAP3_MCSPI_CHCTRL_EN		BIT(0)
+#define OMAP3_MCSPI_CHCTRL_DIS		(0 << 0)
+
+#define OMAP3_MCSPI_WAKEUPENABLE_WKEN	BIT(0)
+#define MCSPI_PINDIR_D0_IN_D1_OUT	0
+#define MCSPI_PINDIR_D0_OUT_D1_IN	1
+
+#define OMAP3_MCSPI_MAX_FREQ		48000000
+#define SPI_WAIT_TIMEOUT		10
+
+#define OMAP4_MCSPI_REG_OFFSET	0x100
+
+/* OMAP3 McSPI registers */
+struct mcspi_channel {
+	unsigned int chconf;		/* 0x2C, 0x40, 0x54, 0x68 */
+	unsigned int chstat;		/* 0x30, 0x44, 0x58, 0x6C */
+	unsigned int chctrl;		/* 0x34, 0x48, 0x5C, 0x70 */
+	unsigned int tx;		/* 0x38, 0x4C, 0x60, 0x74 */
+	unsigned int rx;		/* 0x3C, 0x50, 0x64, 0x78 */
+};
+
+struct mcspi {
+	unsigned char res1[0x10];
+	unsigned int sysconfig;		/* 0x10 */
+	unsigned int sysstatus;		/* 0x14 */
+	unsigned int irqstatus;		/* 0x18 */
+	unsigned int irqenable;		/* 0x1C */
+	unsigned int wakeupenable;	/* 0x20 */
+	unsigned int syst;		/* 0x24 */
+	unsigned int modulctrl;		/* 0x28 */
+	struct mcspi_channel channel[4];
+	/* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */
+	/* channel1: 0x40 - 0x50, bus 0 & 1 */
+	/* channel2: 0x54 - 0x64, bus 0 & 1 */
+	/* channel3: 0x68 - 0x78, bus 0 */
+};
+
+struct omap3_spi_plat {
+	struct mcspi *regs;
+	unsigned int pin_dir:1;
+};
+#endif
-- 
2.17.1

[PATCH v2 4/5] spi: omap3_spi: Read platform data in ofdata_to_platdata()

[Faiz Abbas]

Add an ofdata_to_platdata() callback to access dts in U-boot and
access all platform data in it. This prepares the driver for supporting
both device tree as well as static platform data structures in SPL.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
 drivers/spi/omap3_spi.c | 37 ++++++++++++++++++++++++++-----------
 1 file changed, 26 insertions(+), 11 deletions(-)

diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index fb1cf360fc..56cb217486 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -414,17 +414,10 @@ static int omap3_spi_set_wordlen(struct udevice *dev, unsigned int wordlen)
 static int omap3_spi_probe(struct udevice *dev)
 {
 	struct omap3_spi_priv *priv = dev_get_priv(dev);
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(dev);
+	struct omap3_spi_plat *plat = dev_get_platdata(dev);
 
-	struct omap2_mcspi_platform_config* data =
-		(struct omap2_mcspi_platform_config*)dev_get_driver_data(dev);
-
-	priv->regs = (struct mcspi *)(dev_read_addr(dev) + data->regs_offset);
-	if (fdtdec_get_bool(blob, node, "ti,pindir-d0-out-d1-in"))
-		priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN;
-	else
-		priv->pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT;
+	priv->regs = plat->regs;
+	priv->pin_dir = plat->pin_dir;
 	priv->wordlen = SPI_DEFAULT_WORDLEN;
 
 	spi_reset(priv->regs);
@@ -476,6 +469,7 @@ static const struct dm_spi_ops omap3_spi_ops = {
 	 */
 };
 
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 static struct omap2_mcspi_platform_config omap2_pdata = {
 	.regs_offset = 0,
 };
@@ -484,16 +478,37 @@ static struct omap2_mcspi_platform_config omap4_pdata = {
 	.regs_offset = OMAP4_MCSPI_REG_OFFSET,
 };
 
+static int omap3_spi_ofdata_to_platdata(struct udevice *dev)
+{
+	struct omap2_mcspi_platform_config *data =
+		(struct omap2_mcspi_platform_config *)dev_get_driver_data(dev);
+	struct omap3_spi_plat *plat = dev_get_platdata(dev);
+
+	plat->regs = (struct mcspi *)(dev_read_addr(dev) + data->regs_offset);
+
+	if (dev_read_bool(dev, "ti,pindir-d0-out-d1-in"))
+		plat->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN;
+	else
+		plat->pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT;
+
+	return 0;
+}
+
 static const struct udevice_id omap3_spi_ids[] = {
 	{ .compatible = "ti,omap2-mcspi", .data = (ulong)&omap2_pdata },
 	{ .compatible = "ti,omap4-mcspi", .data = (ulong)&omap4_pdata },
 	{ }
 };
-
+#endif
 U_BOOT_DRIVER(omap3_spi) = {
 	.name   = "omap3_spi",
 	.id     = UCLASS_SPI,
+	.flags	= DM_FLAG_PRE_RELOC,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.of_match = omap3_spi_ids,
+	.ofdata_to_platdata = omap3_spi_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct omap3_spi_plat),
+#endif
 	.probe = omap3_spi_probe,
 	.ops    = &omap3_spi_ops,
 	.priv_auto_alloc_size = sizeof(struct omap3_spi_priv),
-- 
2.17.1

[PATCH v2 5/5] configs: Add spiboot support for am335x

[Faiz Abbas]

am335x internal SRAM is too small to support the addition of
SPI bootmode to the default defconfig. Add a separate spiboot_defconfig

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
 board/ti/am335x/MAINTAINERS          |  1 +
 configs/am335x_evm_spiboot_defconfig | 93 ++++++++++++++++++++++++++++
 2 files changed, 94 insertions(+)
 create mode 100644 configs/am335x_evm_spiboot_defconfig

diff --git a/board/ti/am335x/MAINTAINERS b/board/ti/am335x/MAINTAINERS
index e100adfd68..219c8715bf 100644
--- a/board/ti/am335x/MAINTAINERS
+++ b/board/ti/am335x/MAINTAINERS
@@ -5,3 +5,4 @@ F:	board/ti/am335x/
 F:	include/configs/am335x_evm.h
 F:	configs/am335x_boneblack_vboot_defconfig
 F:	configs/am335x_evm_defconfig
+F:	configs/am335x_evm_spiboot_defconfig
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
new file mode 100644
index 0000000000..d71a7ce75c
--- /dev/null
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -0,0 +1,93 @@
+CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
+CONFIG_SPL_DM_SPI=y
+CONFIG_AM33XX=y
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd"
+CONFIG_LOGLEVEL=3
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_FIT_IMAGE_TINY=y
+# CONFIG_SPL_FS_EXT4 is not set
+CONFIG_SPL_MTD_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_DM_SPI_FLASH=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_CMD_SPL=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_DNS2=y
+CONFIG_CMD_MTDPARTS=y
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2 am335x-pocketbeagle"
+CONFIG_ENV_OVERWRITE=y
+# CONFIG_ENV_IS_IN_FAT is not set
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_ENV_IS_NOWHERE=y
+CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_CLK=y
+CONFIG_CLK_CDCE9XX=y
+CONFIG_DFU_TFTP=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_NAND=y
+CONFIG_DFU_RAM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_I2C=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
+# CONFIG_SPL_DM_MMC is not set
+# CONFIG_MMC_HW_PARTITIONING is not set
+CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
+# CONFIG_SPL_NAND_AM33XX_BCH is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_SMSC=y
+CONFIG_DM_ETH=y
+CONFIG_MII=y
+CONFIG_DRIVER_TI_CPSW=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_OMAP3_SPI=y
+CONFIG_TIMER=y
+CONFIG_OMAP_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_MUSB_TI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
+CONFIG_WDT=y
+# CONFIG_SPL_WDT is not set
+CONFIG_DYNAMIC_CRC_TABLE=y
+CONFIG_RSA=y
+CONFIG_LZO=y
+# CONFIG_OF_LIBFDT_OVERLAY is not set
-- 
2.17.1

[PATCH v2 0/5] Add spi boot support to am335x-icev2

[Lokesh Vutla]

On 14/09/20 12:11 pm, Faiz Abbas wrote:
> The following patches add spi boot support to TI's am335x-icev2 platform
> 
> v2:
> 1. Changed order of patches to avoid breaking build
> 2. Changed SPI_OFFSET to SPI0_OFFSET and moved the define
>    arch/arm/mach-omap2/am335x/board.c
> 3. Updated MAINTAINERS list with the new defconfig.

Applied to u-boot-ti next branch.

Thanks and regards,
Lokesh