From: JaimeLiao <jaimeliao.tw@gmail.com>
To: u-boot@lists.denx.de, jagan@amarulasolutions.com,
vigneshr@ti.com, p.yadav@ti.com
Cc: zhengxunli@mxic.com.tw, ycllin@mxic.com.tw,
jaimeliao@mxic.com.tw, JaimeLiao <jaimeliao.tw@gmail.com>
Subject: [PATCH 3/4] mtd: spi-nor-core: set 4byte opcode when possible
Date: Fri, 13 Aug 2021 15:25:51 +0800 [thread overview]
Message-ID: <20210813072552.21772-4-jaimeliao.tw@gmail.com> (raw)
In-Reply-To: <20210813072552.21772-1-jaimeliao.tw@gmail.com>
Following linux kernel to check address width and 4byte flag to enable
4byte opcode setting.
Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
---
drivers/mtd/spi/spi-nor-core.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index be6c58ad40..1bddfc10a2 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3919,6 +3919,10 @@ int spi_nor_scan(struct spi_nor *nor)
return -EINVAL;
}
+ /* Set 4byte opcodes when possible. */
+ if (nor->addr_width == 4 && info->flags & SPI_NOR_4B_OPCODES)
+ spi_nor_set_4byte_opcodes(nor, info);
+
/* Send all the required SPI flash commands to initialize device */
ret = spi_nor_init(nor);
if (ret)
--
2.17.1
next prev parent reply other threads:[~2021-08-13 12:20 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-13 7:25 [PATCH 0/4] Add octal DTR support for Macronix flash JaimeLiao
2021-08-13 7:25 ` [PATCH 1/4] mtd: spi-nor: macronix: add support for Macronix octaflash JaimeLiao
2021-08-13 18:06 ` Pratyush Yadav
2021-08-23 1:12 ` liao jaime
2021-08-13 7:25 ` [PATCH 2/4] mtd: spi-nor-core: Adding different type of command extension in Soft Reset JaimeLiao
2021-08-13 7:25 ` JaimeLiao [this message]
2021-08-13 7:25 ` [PATCH 4/4] mtd: spi-nor-core: Add support for Macronix Octal flash JaimeLiao
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