From: Tom Rini <trini@konsulko.com>
To: "Stefan Mätje" <Stefan.Maetje@esd.eu>
Cc: "u-boot@lists.denx.de" <u-boot@lists.denx.de>,
"jagan@amarulasolutions.com" <jagan@amarulasolutions.com>
Subject: Re: [PATCH 1/1] Fix wrong QSPI clock calculation for AM4372
Date: Tue, 30 Nov 2021 07:51:38 -0500 [thread overview]
Message-ID: <20211130125138.GW24579@bill-the-cat> (raw)
In-Reply-To: <e77a60aae82f3b73474f4f4ba053b3d8148e3edc.camel@esd.eu>
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On Tue, Nov 30, 2021 at 12:14:12PM +0000, Stefan Mätje wrote:
> Am Montag, den 29.11.2021, 22:58 -0500 schrieb Tom Rini:
> > On Tue, Nov 30, 2021 at 01:06:56AM +0100, Stefan Mätje wrote:
> >
> > > On AM4372 the SPI_GCLK input gets its clock from the PRCM module which
> > > divides the PER_CLKOUTM2 frequency (192MHz) by a fixed factor of 4.
> > > See AM437x Reference Manual in section 27 QSPI >> 27.2 Integration.
> > >
> > > The QSPI_FCLK therefore needs to take this factor into account and
> > > becomes (192000000 / 4).
> > >
> > > Signed-off-by: Stefan Mätje <stefan.maetje@esd.eu>
> > > ---
> > > drivers/spi/ti_qspi.c | 3 ++-
> > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
> > > index 664b9cad79..bccdeeaf82 100644
> > > --- a/drivers/spi/ti_qspi.c
> > > +++ b/drivers/spi/ti_qspi.c
> > > @@ -25,7 +25,8 @@ DECLARE_GLOBAL_DATA_PTR;
> > >
> > > /* ti qpsi register bit masks */
> > > #define QSPI_TIMEOUT 2000000
> > > -#define QSPI_FCLK 192000000
> > > +/* AM4372: QSPI gets SPI_GCLK from PRCM unit as PER_CLKOUTM2 divided by 4.
> > > */
> > > +#define QSPI_FCLK (192000000 / 4)
> > > #define QSPI_DRA7XX_FCLK 76800000
> > > #define QSPI_WLEN_MAX_BITS 128
> > > #define QSPI_WLEN_MAX_BYTES (QSPI_WLEN_MAX_BITS >> 3)
> >
> > How is this treated in the kernel? Thanks.
> >
> The current driver in mainline Linux @drivers/spi/spi-ti-qspi.c still has
> the wrong QSPI_FCLK define, but it seems to be used nowhere any more.
>
> The driver gets its "fclk" from the device tree. But the device tree
> (arch/arm/boot/dts/am4372.dtsi) was broken till this patch on the
> mainline kernel:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/arm/boot/dts/am4372.dtsi?id=f60c41257fa06d496c9653d3f77d34b7426d9274
>
> It seems to me that there the first time a valid "fclk" property
> was provided to the qspi module.
OK, thanks for checking!
--
Tom
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next prev parent reply other threads:[~2021-11-30 12:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-30 0:06 [PATCH 0/1] Provide a fix for wrong QSPI clock calculation on AM4372 Stefan Mätje
2021-11-30 0:06 ` [PATCH 1/1] Fix wrong QSPI clock calculation for AM4372 Stefan Mätje
2021-11-30 3:58 ` Tom Rini
2021-11-30 12:14 ` Stefan Mätje
2021-11-30 12:51 ` Tom Rini [this message]
2022-01-17 18:36 ` Tom Rini
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