* [PATCH v3 0/2] riscv: Support booting SiFive Unmatched from SPI flash. @ 2021-11-24 22:32 Thomas Skibo 2021-11-24 22:32 ` [PATCH v3 1/2] riscv: Support booting SiFive Unmatched from SPI Thomas Skibo 2021-11-24 22:32 ` [PATCH v3 2/2] riscv: Enable SPI flash env for SiFive Unmatched Thomas Skibo 0 siblings, 2 replies; 5+ messages in thread From: Thomas Skibo @ 2021-11-24 22:32 UTC (permalink / raw) To: u-boot; +Cc: ycliang, Thomas Skibo This patch set adds support for booting the SiFive Unmatched board from SPI flash memory and saving the environment to flash. Thomas Skibo (2): riscv: Support booting SiFive Unmatched from SPI. riscv: Enable SPI flash env for SiFive Unmatched. arch/riscv/cpu/fu740/Kconfig | 13 ++++++++ .../dts/hifive-unmatched-a00-u-boot.dtsi | 11 +++++++ board/sifive/unmatched/Kconfig | 1 + board/sifive/unmatched/spl.c | 3 ++ configs/sifive_unmatched_defconfig | 6 ++++ doc/board/sifive/unmatched.rst | 31 +++++++++++++++++++ 6 files changed, 65 insertions(+) -- 2.25.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 1/2] riscv: Support booting SiFive Unmatched from SPI. 2021-11-24 22:32 [PATCH v3 0/2] riscv: Support booting SiFive Unmatched from SPI flash Thomas Skibo @ 2021-11-24 22:32 ` Thomas Skibo 2021-12-02 8:41 ` Leo Liang 2021-11-24 22:32 ` [PATCH v3 2/2] riscv: Enable SPI flash env for SiFive Unmatched Thomas Skibo 1 sibling, 1 reply; 5+ messages in thread From: Thomas Skibo @ 2021-11-24 22:32 UTC (permalink / raw) To: u-boot; +Cc: ycliang, Thomas Skibo Configure SPI flash devices into SPL. Add SPI boot option to spl.c. Document how to format flash for booting. Signed-off-by: Thomas Skibo <thomas-git@skibo.net> --- .../dts/hifive-unmatched-a00-u-boot.dtsi | 11 +++++++ board/sifive/unmatched/spl.c | 3 ++ configs/sifive_unmatched_defconfig | 6 ++++ doc/board/sifive/unmatched.rst | 31 +++++++++++++++++++ 4 files changed, 51 insertions(+) diff --git a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi index c5475aa149..1ee8ab1868 100644 --- a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi @@ -16,6 +16,10 @@ u-boot,dm-spl; }; + config { + u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */ + }; + hfclk { u-boot,dm-spl; }; @@ -30,6 +34,13 @@ clocks = <&rtcclk>; }; +&qspi0 { + u-boot,dm-spl; + flash@0 { + u-boot,dm-spl; + }; +}; + &spi0 { mmc@0 { u-boot,dm-spl; diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c index d5663274cd..7c0beedc08 100644 --- a/board/sifive/unmatched/spl.c +++ b/board/sifive/unmatched/spl.c @@ -22,6 +22,7 @@ #define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12) #define MODE_SELECT_REG 0x1000 +#define MODE_SELECT_SPI 0x6 #define MODE_SELECT_SD 0xb #define MODE_SELECT_MASK GENMASK(3, 0) @@ -123,6 +124,8 @@ u32 spl_boot_device(void) u32 boot_device = mode_select & MODE_SELECT_MASK; switch (boot_device) { + case MODE_SELECT_SPI: + return BOOT_DEVICE_SPI; case MODE_SELECT_SD: return BOOT_DEVICE_MMC1; default: diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 9cc18b029c..d400ed0b23 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00" CONFIG_SPL_MMC=y CONFIG_SPL=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_AHCI=y CONFIG_TARGET_SIFIVE_UNMATCHED=y @@ -23,17 +24,22 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ID_EEPROM=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y +CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_PWM=y CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y +CONFIG_USE_ENV_SPI_BUS=y +CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_SPL_CLK=y +CONFIG_SPI_FLASH_ISSI=y CONFIG_SYS_I2C_EEPROM_ADDR=0x54 CONFIG_E1000=y CONFIG_NVME=y diff --git a/doc/board/sifive/unmatched.rst b/doc/board/sifive/unmatched.rst index 6b024f07f6..b52a1f690c 100644 --- a/doc/board/sifive/unmatched.rst +++ b/doc/board/sifive/unmatched.rst @@ -534,3 +534,34 @@ Sample boot log from HiFive Unmatched board OpenEmbedded nodistro.0 unmatched ttySIF0 unmatched login: + + +Booting from SPI +---------------- + +Use Building steps from "Booting from uSD using U-Boot SPL" section. + +Partition the SPI in Linux via mtdblock. The partition types here are +"HiFive Unleashed FSBL", "HiFive Unleashed BBL", and "U-Boot environment" +for partitions one through three respectively. + +.. code-block:: none + + sgdisk --clear -a 1 \ + --new=1:40:2087 --change-name=1:spl --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ + --new=2:2088:10279 --change-name=2:uboot --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ + --new=3:10280:10535 --change-name=3:env --typecode=3:3DE21764-95BD-54BD-A5C3-4ABE786F38A8 \ + /dev/mtdblock0 + +Write U-boot SPL and U-boot to their partitions. + +.. code-block:: none + + dd if=u-boot-spl.bin of=/dev/mtdblock0 bs=4096 seek=5 conv=sync + dd if=u-boot.itb of=/dev/mtdblock0 bs=4096 seek=261 conv=sync + +Power off the board. + +Change DIP switches MSEL[3:0] to 0110. + +Power up the board. -- 2.25.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v3 1/2] riscv: Support booting SiFive Unmatched from SPI. 2021-11-24 22:32 ` [PATCH v3 1/2] riscv: Support booting SiFive Unmatched from SPI Thomas Skibo @ 2021-12-02 8:41 ` Leo Liang 0 siblings, 0 replies; 5+ messages in thread From: Leo Liang @ 2021-12-02 8:41 UTC (permalink / raw) To: Thomas Skibo; +Cc: u-boot On Wed, Nov 24, 2021 at 02:32:09PM -0800, Thomas Skibo wrote: > Configure SPI flash devices into SPL. Add SPI boot option to spl.c. > Document how to format flash for booting. > > Signed-off-by: Thomas Skibo <thomas-git@skibo.net> > --- > .../dts/hifive-unmatched-a00-u-boot.dtsi | 11 +++++++ > board/sifive/unmatched/spl.c | 3 ++ > configs/sifive_unmatched_defconfig | 6 ++++ > doc/board/sifive/unmatched.rst | 31 +++++++++++++++++++ > 4 files changed, 51 insertions(+) Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 2/2] riscv: Enable SPI flash env for SiFive Unmatched. 2021-11-24 22:32 [PATCH v3 0/2] riscv: Support booting SiFive Unmatched from SPI flash Thomas Skibo 2021-11-24 22:32 ` [PATCH v3 1/2] riscv: Support booting SiFive Unmatched from SPI Thomas Skibo @ 2021-11-24 22:32 ` Thomas Skibo 2021-12-02 8:42 ` Leo Liang 1 sibling, 1 reply; 5+ messages in thread From: Thomas Skibo @ 2021-11-24 22:32 UTC (permalink / raw) To: u-boot; +Cc: ycliang, Thomas Skibo Enable saving environment to SPI flash memory on SiFive Unmatched. Signed-off-by: Thomas Skibo <thomas-git@skibo.net> --- arch/riscv/cpu/fu740/Kconfig | 13 +++++++++++++ board/sifive/unmatched/Kconfig | 1 + 2 files changed, 14 insertions(+) diff --git a/arch/riscv/cpu/fu740/Kconfig b/arch/riscv/cpu/fu740/Kconfig index 049a0a0584..3e0c1fddc8 100644 --- a/arch/riscv/cpu/fu740/Kconfig +++ b/arch/riscv/cpu/fu740/Kconfig @@ -40,3 +40,16 @@ config SIFIVE_FU740 imply DM_I2C imply SYS_I2C_OCORES imply SPL_I2C + +if ENV_IS_IN_SPI_FLASH + +config ENV_OFFSET + default 0x505000 + +config ENV_SIZE + default 0x20000 + +config ENV_SECT_SIZE + default 0x10000 + +endif # ENV_IS_IN_SPI_FLASH diff --git a/board/sifive/unmatched/Kconfig b/board/sifive/unmatched/Kconfig index fb2c1fbb58..fe213fd504 100644 --- a/board/sifive/unmatched/Kconfig +++ b/board/sifive/unmatched/Kconfig @@ -26,6 +26,7 @@ config SPL_OPENSBI_LOAD_ADDR config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select SIFIVE_FU740 + select ENV_IS_IN_SPI_FLASH select SUPPORT_SPL select RESET_SIFIVE select BINMAN -- 2.25.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v3 2/2] riscv: Enable SPI flash env for SiFive Unmatched. 2021-11-24 22:32 ` [PATCH v3 2/2] riscv: Enable SPI flash env for SiFive Unmatched Thomas Skibo @ 2021-12-02 8:42 ` Leo Liang 0 siblings, 0 replies; 5+ messages in thread From: Leo Liang @ 2021-12-02 8:42 UTC (permalink / raw) To: Thomas Skibo; +Cc: u-boot On Wed, Nov 24, 2021 at 02:32:10PM -0800, Thomas Skibo wrote: > Enable saving environment to SPI flash memory on SiFive > Unmatched. > > Signed-off-by: Thomas Skibo <thomas-git@skibo.net> > --- > arch/riscv/cpu/fu740/Kconfig | 13 +++++++++++++ > board/sifive/unmatched/Kconfig | 1 + > 2 files changed, 14 insertions(+) Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-12-02 8:43 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2021-11-24 22:32 [PATCH v3 0/2] riscv: Support booting SiFive Unmatched from SPI flash Thomas Skibo 2021-11-24 22:32 ` [PATCH v3 1/2] riscv: Support booting SiFive Unmatched from SPI Thomas Skibo 2021-12-02 8:41 ` Leo Liang 2021-11-24 22:32 ` [PATCH v3 2/2] riscv: Enable SPI flash env for SiFive Unmatched Thomas Skibo 2021-12-02 8:42 ` Leo Liang
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