From: Tom Rini <trini@konsulko.com>
To: haibo.chen@nxp.com, Jaehoon Chung <jh80.chung@samsung.com>,
Peng Fan <peng.fan@nxp.com>, Stefano Babic <sbabic@denx.de>
Cc: peng.fan@nxp.com, jh80.chung@samsung.com, festevam@gmail.com,
sean.anderson@seco.com, u-boot@lists.denx.de, marex@denx.de,
aford173@gmail.com, tharvey@gateworks.com,
andrey.zhizhikin@leica-geosystems.com, uboot-imx@nxp.com
Subject: Re: [PATCH v2] mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON when necessary
Date: Wed, 9 Mar 2022 11:10:52 -0500 [thread overview]
Message-ID: <20220309161052.GA2128647@bill-the-cat> (raw)
In-Reply-To: <1645500498-5500-1-git-send-email-haibo.chen@nxp.com>
[-- Attachment #1: Type: text/plain, Size: 2573 bytes --]
On Tue, Feb 22, 2022 at 11:28:18AM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
>
> After commit f132aab40327 ("Revert "mmc: fsl_esdhc_imx: use
> VENDORSPEC_FRC_SDCLK_ON to control card clock output""), it
> involve issue in mmc_switch_voltage(), because of the special
> design of usdhc.
>
> For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN,
> these are reserved bits(Though RM contain the definition of these bits,
> but actually internal IC logic do not implement, already confirm with
> IC team). Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the card
> clock output. Here is the definition of this bit in RM:
>
> [8] FRC_SDCLK_ON
> Force CLK output active
> Do not set this bit to 1 unless it is necessary. Also, make sure that
> this bit is cleared when uSDHC’s clock is about to be changed (frequency
> change, clock source change, or delay chain tuning).
> 0b - CLK active or inactive is fully controlled by the hardware.
> 1b - Force CLK active
>
> In default, the FRC_SDCLK_ON is 0. This means, when there is no command
> or data transfer on bus, hardware will gate off the card clock. But in
> some case, we need the card clock keep on. Take IO voltage 1.8v switch
> as example, after IO voltage change to 1.8v, spec require gate off the
> card clock for 5ms, and gate on the clock back, once detect the card
> clock on, then the card will draw the dat0 to high immediately. If there
> is not clock gate off/on behavior, some card will keep the dat0 to low
> level. This is the reason we fail in mmc_switch_voltage().
>
> To fix this issue, and concern that this is only the fsl usdhc hardware
> design limitation, set the bit FRC_SDCLK_ON in the beginning of the
> wait_dat0() and clear it in the end. To make sure the 1.8v IO voltage
> switch process align with SD specification.
>
> For standard tuning process, usdhc specification also require the card
> clock keep on, so also add these behavior in fsl_esdhc_execute_tuning().
>
> Reviewed-by: Marek Vasut <marex@denx.de>
> Tested-by: Fabio Estevam <festevam@gmail.com>
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
> ---
> drivers/mmc/fsl_esdhc_imx.c | 25 ++++++++++++++++++++++---
> include/fsl_esdhc_imx.h | 2 ++
> 2 files changed, 24 insertions(+), 3 deletions(-)
Is this going to get picked up in the imx or mmc trees soon, or should I
take this directly? Thanks!
--
Tom
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]
next prev parent reply other threads:[~2022-03-09 16:11 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20220222033658epcas1p4d233f0d3c4a5c59f50609c7589c72379@epcas1p4.samsung.com>
2022-02-22 3:28 ` [PATCH v2] mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON when necessary haibo.chen
2022-02-23 5:28 ` Peng Fan (OSS)
2022-02-24 0:03 ` Jaehoon Chung
2022-03-09 16:10 ` Tom Rini [this message]
2022-03-14 9:31 ` Jaehoon Chung
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220309161052.GA2128647@bill-the-cat \
--to=trini@konsulko.com \
--cc=aford173@gmail.com \
--cc=andrey.zhizhikin@leica-geosystems.com \
--cc=festevam@gmail.com \
--cc=haibo.chen@nxp.com \
--cc=jh80.chung@samsung.com \
--cc=marex@denx.de \
--cc=peng.fan@nxp.com \
--cc=sbabic@denx.de \
--cc=sean.anderson@seco.com \
--cc=tharvey@gateworks.com \
--cc=u-boot@lists.denx.de \
--cc=uboot-imx@nxp.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox