From: Alexander Dahl <ada@thorsis.com>
To: u-boot@lists.denx.de
Cc: Michal Simek <michal.simek@amd.com>, Simon Glass <sjg@chromium.org>
Subject: [PATCH v2 8/8] fpga: virtex2: Use logging feature instead of FPGA_DEBUG
Date: Wed, 21 Sep 2022 15:22:16 +0200 [thread overview]
Message-ID: <20220921132216.7089-9-ada@thorsis.com> (raw)
In-Reply-To: <20220921132216.7089-1-ada@thorsis.com>
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
---
drivers/fpga/virtex2.c | 37 +++++++++++++++----------------------
1 file changed, 15 insertions(+), 22 deletions(-)
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index 51b8d31205..fddf8ac4ce 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -12,21 +12,14 @@
* on spartan2.c (Rich Ireland, rireland@enterasys.com).
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include <common.h>
#include <console.h>
+#include <log.h>
#include <virtex2.h>
#include <linux/delay.h>
-#if 0
-#define FPGA_DEBUG
-#endif
-
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt, args...) printf(fmt, ##args)
-#else
-#define PRINTF(fmt, args...)
-#endif
-
/*
* If the SelectMap interface can be overrun by the processor, define
* CONFIG_SYS_FPGA_CHECK_BUSY and/or CONFIG_FPGA_DELAY in the board
@@ -89,12 +82,12 @@ static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
switch (desc->iface) {
case slave_serial:
- PRINTF("%s: Launching Slave Serial Load\n", __func__);
+ log_debug("%s: Launching Slave Serial Load\n", __func__);
ret_val = virtex2_ss_load(desc, buf, bsize);
break;
case slave_selectmap:
- PRINTF("%s: Launching Slave Parallel Load\n", __func__);
+ log_debug("%s: Launching Slave Parallel Load\n", __func__);
ret_val = virtex2_ssm_load(desc, buf, bsize);
break;
@@ -111,12 +104,12 @@ static int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
switch (desc->iface) {
case slave_serial:
- PRINTF("%s: Launching Slave Serial Dump\n", __func__);
+ log_debug("%s: Launching Slave Serial Dump\n", __func__);
ret_val = virtex2_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF("%s: Launching Slave Parallel Dump\n", __func__);
+ log_debug("%s: Launching Slave Parallel Dump\n", __func__);
ret_val = virtex2_ssm_dump(desc, buf, bsize);
break;
@@ -150,8 +143,8 @@ static int virtex2_slave_pre(xilinx_virtex2_slave_fns *fn, int cookie)
{
unsigned long ts;
- PRINTF("%s:%d: Start with interface functions @ 0x%p\n",
- __func__, __LINE__, fn);
+ log_debug("%s:%d: Start with interface functions @ 0x%p\n",
+ __func__, __LINE__, fn);
if (!fn) {
printf("%s:%d: NULL Interface function table!\n",
@@ -160,7 +153,7 @@ static int virtex2_slave_pre(xilinx_virtex2_slave_fns *fn, int cookie)
}
/* Gotta split this one up (so the stack won't blow??) */
- PRINTF("%s:%d: Function Table:\n"
+ log_debug("%s:%d: Function Table:\n"
" base 0x%p\n"
" struct 0x%p\n"
" pre 0x%p\n"
@@ -169,7 +162,7 @@ static int virtex2_slave_pre(xilinx_virtex2_slave_fns *fn, int cookie)
" error 0x%p\n",
__func__, __LINE__,
&fn, fn, fn->pre, fn->pgm, fn->init, fn->err);
- PRINTF(" clock 0x%p\n"
+ log_debug(" clock 0x%p\n"
" cs 0x%p\n"
" write 0x%p\n"
" rdata 0x%p\n"
@@ -330,8 +323,8 @@ static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize)
#endif
if ((*fn->done)(cookie) == FPGA_SUCCESS) {
- PRINTF("%s:%d:done went active early, bytecount = %d\n",
- __func__, __LINE__, bytecount);
+ log_debug("%s:%d:done went active early, bytecount = %d\n",
+ __func__, __LINE__, bytecount);
break;
}
@@ -465,8 +458,8 @@ static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
#endif
if ((*fn->done)(cookie) == FPGA_SUCCESS) {
- PRINTF("%s:%d:done went active early, bytecount = %d\n",
- __func__, __LINE__, bytecount);
+ log_debug("%s:%d:done went active early, bytecount = %d\n",
+ __func__, __LINE__, bytecount);
break;
}
--
2.30.2
next prev parent reply other threads:[~2022-09-21 13:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-21 13:22 [PATCH v2 0/8] Use logging feature instead of FPGA_DEBUG Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 1/8] dm: fpga: Introduce new uclass Alexander Dahl
2022-09-22 10:27 ` Michal Simek
2022-09-22 11:35 ` Simon Glass
2022-09-22 11:45 ` Michal Simek
2022-09-25 14:15 ` Simon Glass
2022-09-26 6:14 ` Alexander Dahl
2022-09-28 1:54 ` Simon Glass
2022-09-21 13:22 ` [PATCH v2 2/8] fpga: altera: Use logging feature instead of FPGA_DEBUG Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 3/8] fpga: cyclon2: " Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 4/8] fpga: Add missing Kconfig symbols for old FPGA drivers Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 5/8] fpga: ACEX1K: Use logging feature instead of FPGA_DEBUG Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 6/8] fpga: spartan2: " Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 7/8] fpga: spartan3: " Alexander Dahl
2022-09-21 13:22 ` Alexander Dahl [this message]
2022-09-22 10:30 ` [PATCH v2 8/8] fpga: virtex2: " Michal Simek
2022-09-22 11:26 ` Alexander Dahl
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