From: Michal Simek <michal.simek@amd.com>
To: Alexander Dahl <ada@thorsis.com>, <u-boot@lists.denx.de>
Cc: Simon Glass <sjg@chromium.org>
Subject: Re: [PATCH v2 8/8] fpga: virtex2: Use logging feature instead of FPGA_DEBUG
Date: Thu, 22 Sep 2022 12:30:08 +0200 [thread overview]
Message-ID: <eb364dd6-802e-797e-0a87-75350d09daf4@amd.com> (raw)
In-Reply-To: <20220921132216.7089-9-ada@thorsis.com>
On 9/21/22 15:22, Alexander Dahl wrote:
> Instead of using DEBUG or LOG_DEBUG the driver still had its own
> definition for debug output.
>
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
> drivers/fpga/virtex2.c | 37 +++++++++++++++----------------------
> 1 file changed, 15 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
> index 51b8d31205..fddf8ac4ce 100644
> --- a/drivers/fpga/virtex2.c
> +++ b/drivers/fpga/virtex2.c
> @@ -12,21 +12,14 @@
> * on spartan2.c (Rich Ireland, rireland@enterasys.com).
> */
>
> +#define LOG_CATEGORY UCLASS_FPGA
> +
> #include <common.h>
> #include <console.h>
> +#include <log.h>
> #include <virtex2.h>
> #include <linux/delay.h>
>
> -#if 0
> -#define FPGA_DEBUG
> -#endif
> -
> -#ifdef FPGA_DEBUG
> -#define PRINTF(fmt, args...) printf(fmt, ##args)
> -#else
> -#define PRINTF(fmt, args...)
> -#endif
> -
> /*
> * If the SelectMap interface can be overrun by the processor, define
> * CONFIG_SYS_FPGA_CHECK_BUSY and/or CONFIG_FPGA_DELAY in the board
> @@ -89,12 +82,12 @@ static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
>
> switch (desc->iface) {
> case slave_serial:
> - PRINTF("%s: Launching Slave Serial Load\n", __func__);
> + log_debug("%s: Launching Slave Serial Load\n", __func__);
> ret_val = virtex2_ss_load(desc, buf, bsize);
> break;
>
> case slave_selectmap:
> - PRINTF("%s: Launching Slave Parallel Load\n", __func__);
> + log_debug("%s: Launching Slave Parallel Load\n", __func__);
> ret_val = virtex2_ssm_load(desc, buf, bsize);
> break;
>
> @@ -111,12 +104,12 @@ static int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
>
> switch (desc->iface) {
> case slave_serial:
> - PRINTF("%s: Launching Slave Serial Dump\n", __func__);
> + log_debug("%s: Launching Slave Serial Dump\n", __func__);
> ret_val = virtex2_ss_dump(desc, buf, bsize);
> break;
>
> case slave_parallel:
> - PRINTF("%s: Launching Slave Parallel Dump\n", __func__);
> + log_debug("%s: Launching Slave Parallel Dump\n", __func__);
> ret_val = virtex2_ssm_dump(desc, buf, bsize);
> break;
>
> @@ -150,8 +143,8 @@ static int virtex2_slave_pre(xilinx_virtex2_slave_fns *fn, int cookie)
> {
> unsigned long ts;
>
> - PRINTF("%s:%d: Start with interface functions @ 0x%p\n",
> - __func__, __LINE__, fn);
> + log_debug("%s:%d: Start with interface functions @ 0x%p\n",
> + __func__, __LINE__, fn);
>
> if (!fn) {
> printf("%s:%d: NULL Interface function table!\n",
> @@ -160,7 +153,7 @@ static int virtex2_slave_pre(xilinx_virtex2_slave_fns *fn, int cookie)
> }
>
> /* Gotta split this one up (so the stack won't blow??) */
> - PRINTF("%s:%d: Function Table:\n"
> + log_debug("%s:%d: Function Table:\n"
> " base 0x%p\n"
Above you are also aligning next lines which is not what you do here.
The same issue is visible also in other patches. I think it will be good to also
align it to have proper coding style.
Thanks,
Michal
next prev parent reply other threads:[~2022-09-22 10:30 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-21 13:22 [PATCH v2 0/8] Use logging feature instead of FPGA_DEBUG Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 1/8] dm: fpga: Introduce new uclass Alexander Dahl
2022-09-22 10:27 ` Michal Simek
2022-09-22 11:35 ` Simon Glass
2022-09-22 11:45 ` Michal Simek
2022-09-25 14:15 ` Simon Glass
2022-09-26 6:14 ` Alexander Dahl
2022-09-28 1:54 ` Simon Glass
2022-09-21 13:22 ` [PATCH v2 2/8] fpga: altera: Use logging feature instead of FPGA_DEBUG Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 3/8] fpga: cyclon2: " Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 4/8] fpga: Add missing Kconfig symbols for old FPGA drivers Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 5/8] fpga: ACEX1K: Use logging feature instead of FPGA_DEBUG Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 6/8] fpga: spartan2: " Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 7/8] fpga: spartan3: " Alexander Dahl
2022-09-21 13:22 ` [PATCH v2 8/8] fpga: virtex2: " Alexander Dahl
2022-09-22 10:30 ` Michal Simek [this message]
2022-09-22 11:26 ` Alexander Dahl
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