* [PATCH] ddr: altera: n5x: Copies calibration data to DDR when DDR retention is set
@ 2022-11-23 14:32 Jit Loon Lim
0 siblings, 0 replies; only message in thread
From: Jit Loon Lim @ 2022-11-23 14:32 UTC (permalink / raw)
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang
From: Tien Fong Chee <tien.fong.chee@intel.com>
Ensure the PHY calibration data is copied to DDR only when DDR retention
is set.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
drivers/ddr/altera/sdram_n5x.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c
index 8d28cdbc03..72c231b3f1 100644
--- a/drivers/ddr/altera/sdram_n5x.c
+++ b/drivers/ddr/altera/sdram_n5x.c
@@ -3045,10 +3045,13 @@ int sdram_mmr_init_full(struct udevice *dev)
sdram_set_firewall(&bd);
- ddr_offset = simple_strtoul(offset, &endptr, 16);
- if (!(offset == endptr || *endptr != '\0'))
- memcpy((void *)ddr_offset,
- (const void *)SOC64_OCRAM_PHY_BACKUP_BASE, SZ_4K);
+ if (is_ddr_retention_enabled(reg)) {
+ ddr_offset = simple_strtoul(offset, &endptr, 16);
+ if (!(offset == endptr || *endptr != '\0'))
+ memcpy((void *)ddr_offset,
+ (const void *)SOC64_OCRAM_PHY_BACKUP_BASE,
+ SZ_4K);
+ }
return 0;
}
--
2.26.2
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