From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Cc: "u-boot@lists.denx.de" <u-boot@lists.denx.de>,
thomas.petazzoni@bootlin.com, alexander.stein@ew.tq-group.com,
u-boot@ew.tq-group.com
Subject: Re: [PATCH] tqma6: Fix DDR configuration
Date: Thu, 23 Nov 2023 14:12:33 +0100 [thread overview]
Message-ID: <20231123141233.3f37c1b7@xps-13> (raw)
In-Reply-To: <b7f6a997414bd7b37e75dc29c14c6708fad8164c.camel@ew.tq-group.com>
Hi Markus,
Markus.Niebel@ew.tq-group.com wrote on Thu, 23 Nov 2023 14:04:43 +0100:
> Hello Miquel,
>
> > Initially investigating a Linux network issue causing a lot of drop and
> > poor network performances on a custom system based on a TQMA6A module
> > (based on an iMX6Q), [1st link below].
> >
> > I eventually correlated my observations with a contention at the NIC
> > level when in concurrency with the graphics pipeline. Troubleshooting
> > this in the kernel lead to disabling DMA bursts accesses made by the IPU
> > in order to avoid triggering the QoS at the interconnect level, reducing
> > from 50 to 10% the drop rate on eth0, [2nd link below]. The solution
> > worked on my setup but not on others, which still suffered from
> > abnormally high drop rates even with this "fix".
> >
> > After looking a while into TQ Systems BSP I figured out a number of
> > differences in recent U-Boot out-of-tree patches they had in their
> > repository [3rd link]. Parsing the differences one after the other lead
> > me to this final solution.
> >
> > The reset pad of the DDR controller was apparently misconfigured, Bit
> > 18-19 picturing the "DDR select field". The current value b11 is
> > reserved. The only defined value as of version 6 of the iMX6Q manual was
> > b00 "DDR3 and LPDDR2 mode". In practice no register difference has been
> > spotted after changing this configuration but all issues tracked thus
> > far just vanished. All previous fixes have been proven irrelevant. Just
> > clearing this field solved all our network issues and the drop rate as
> > measured by iperf3 felt back to 0%.
> >
> > Link:
> > https://lore.kernel.org/netdev/20231012193410.3d1812cf@xps-13/
> >
> > Link:
> > https://lists.freedesktop.org/archives/dri-devel/2023-October/428251.html
> >
> > Link:
> > https://github.com/tq-systems/u-boot-tqmaxx/commit/15eb6abbefbf6916c28467b85485911dad3da6bc
> >
> > Signed-off-by: Miquel Raynal <
> > miquel.raynal@bootlin.com
> > >
> > ---
> > board/tq/tqma6/tqma6q.cfg | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/board/tq/tqma6/tqma6q.cfg b/board/tq/tqma6/tqma6q.cfg
> > index a49489aed3f..a345c4de93d 100644
> > --- a/board/tq/tqma6/tqma6q.cfg
> > +++ b/board/tq/tqma6/tqma6q.cfg
> > @@ -36,7 +36,7 @@ DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030
> > DATA 4, MX6_IOM_DRAM_CAS, 0x00008030
> > DATA 4, MX6_IOM_DRAM_RAS, 0x00008030
> > DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
> > -DATA 4, MX6_IOM_DRAM_RESET, 0x000C3030
> > +DATA 4, MX6_IOM_DRAM_RESET, 0x00003030
>
> Thank you for pointing this out. Originally this error came from an
> older/ancient reference manual. Sorry that we missed to bring this
> upstream. We will send the changes for DCD data in the next days.
No problem, I'm glad this can now be solved. By any chance, could you
point to the relevant location of the manual (ddr or imx6 ?) explaining
what this is actually about? Because I failed to bring any real
explanation to my observations so far.
Thanks,
Miquèl
next prev parent reply other threads:[~2023-11-23 13:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <mailman.3902.1700255720.703.u-boot@lists.denx.de>
2023-11-23 13:04 ` [PATCH] tqma6: Fix DDR configuration Markus Niebel
2023-11-23 13:12 ` Miquel Raynal [this message]
2023-11-23 13:44 ` Alexander Stein
2023-11-23 13:54 ` Miquel Raynal
2023-11-17 15:00 Miquel Raynal
2023-11-29 18:21 ` Fabio Estevam
2023-12-12 16:11 ` Fabio Estevam
2023-12-12 16:21 ` Miquel Raynal
2023-12-12 16:31 ` Fabio Estevam
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