From: Christian Marangi <ansuelsmth@gmail.com>
To: Crispin John <john@phrozen.org>, Tom Rini <trini@konsulko.com>,
Lukasz Majewski <lukma@denx.de>,
Sean Anderson <seanga2@gmail.com>,
Ryder Lee <ryder.lee@mediatek.com>,
Weijie Gao <weijie.gao@mediatek.com>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
Christian Marangi <ansuelsmth@gmail.com>,
Sam Shih <sam.shih@mediatek.com>,
u-boot@lists.denx.de
Subject: [PATCH 06/14] clk: mediatek: mt7981: swap wrong clock-names for spi nodes
Date: Fri, 2 Aug 2024 15:53:07 +0200 [thread overview]
Message-ID: <20240802135326.25303-7-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20240802135326.25303-1-ansuelsmth@gmail.com>
Swap wrong clock-names for spi nodes as they were wrong and the spi-clk
was referencing the sel-clk and the sel-clk was referencing the spi-clk.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
arch/arm/dts/mt7981.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index d80eceb8d4c..be0d42bc997 100644
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -271,7 +271,7 @@
<&infracfg CK_INFRA_SPI0_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
<&topckgen CK_INFRA_ISPI0>;
- clock-names = "sel-clk", "spi-clk";
+ clock-names = "spi-clk", "sel-clk";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -286,7 +286,7 @@
<&infracfg CK_INFRA_SPI1_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
<&topckgen CK_INFRA_ISPI1>;
- clock-names = "sel-clk", "spi-clk";
+ clock-names = "spi-clk", "sel-clk";
status = "disabled";
};
@@ -299,7 +299,7 @@
<&infracfg CK_INFRA_SPI2_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
<&topckgen CK_INFRA_ISPI0>;
- clock-names = "sel-clk", "spi-clk";
+ clock-names = "spi-clk", "sel-clk";
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
--
2.45.2
next prev parent reply other threads:[~2024-08-02 19:57 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-02 13:53 [PATCH 00/14] clk: mediatek: mt7981: clk migration for OF_UPSTREAM Christian Marangi
2024-08-02 13:53 ` [PATCH 01/14] clk: mediatek: mt7981: add missing clock for infra_ipcie_pipe Christian Marangi
2024-08-02 13:53 ` [PATCH 02/14] clk: mediatek: mt7981: fix typo for infra_i2c0_ck Christian Marangi
2024-08-02 13:53 ` [PATCH 03/14] clk: mediatek: mt7981: fix wrong mux width for pwm2 and pwm1 clock Christian Marangi
2024-08-02 13:53 ` [PATCH 04/14] clk: mediatek: mt7981: fix wrong clock definition for spi2 Christian Marangi
2024-08-02 13:53 ` [PATCH 05/14] clk: mediatek: mt7981: add missing clock for spi1 node Christian Marangi
2024-08-02 13:53 ` Christian Marangi [this message]
2024-08-02 13:53 ` [PATCH 07/14] clk: mediatek: mt7981: fix wrong parent for TOP_FAUD clock Christian Marangi
2024-08-02 13:53 ` [PATCH 08/14] clk: mediatek: mt7981: fix wrong parent list for INFRA_PWM1_SEL mux Christian Marangi
2024-08-02 13:53 ` [PATCH 09/14] clk: mediatek: mt7981: implement sgmii0/1 clock Christian Marangi
2024-08-02 13:53 ` [PATCH 10/14] clk: mediatek: mt7981: drop 1/1 spurious factor Christian Marangi
2024-08-02 13:53 ` [PATCH 11/14] clk: mediatek: mt7981: replace infracfg ID with upstream linux Christian Marangi
2024-08-02 13:53 ` [PATCH 12/14] clk: mediatek: mt7981: fix support for pwm3 clock Christian Marangi
2024-08-02 13:53 ` [PATCH 13/14] clk: mediatek: mt7981: convert to unified infracfg gates + muxes Christian Marangi
2024-08-02 13:53 ` [PATCH 14/14] clk: mediatek: mt7981: rename CK to CLK Christian Marangi
2024-08-20 0:29 ` [PATCH 00/14] clk: mediatek: mt7981: clk migration for OF_UPSTREAM Tom Rini
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