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From: Mayuresh Chitale <mchitale@ventanamicro.com>
To: u-boot@lists.denx.de
Cc: Mayuresh Chitale <mchitale@ventanamicro.com>,
	Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
	Tom Rini <trini@konsulko.com>,
	Yu-Chien Peter Lin <peter.lin@sifive.com>
Subject: [PATCH v1 2/3] riscv: Select appropriate image type
Date: Tue, 11 Mar 2025 13:35:04 +0000	[thread overview]
Message-ID: <20250311133506.124914-3-mchitale@ventanamicro.com> (raw)
In-Reply-To: <20250311133506.124914-1-mchitale@ventanamicro.com>

Select between the 32-bit or 64-bit arch type for the image headers
depending on how the build is configured.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 arch/riscv/dts/binman.dtsi      | 14 ++++++++++----
 arch/riscv/include/asm/u-boot.h |  4 ++++
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
index 0405faca574..a1a566b511b 100644
--- a/arch/riscv/dts/binman.dtsi
+++ b/arch/riscv/dts/binman.dtsi
@@ -5,6 +5,12 @@
 
 #include <config.h>
 
+#ifdef CONFIG_64BIT
+#define ARCH "riscv64"
+#else
+#define ARCH "riscv"
+
+#endif
 / {
 	binman: binman {
 		multiple-images;
@@ -31,7 +37,7 @@
 					description = "U-Boot";
 					type = "standalone";
 					os = "U-Boot";
-					arch = "riscv";
+					arch = ARCH;
 					compression = "none";
 					load = /bits/ 64 <CONFIG_TEXT_BASE>;
 
@@ -44,7 +50,7 @@
 					description = "Linux";
 					type = "standalone";
 					os = "Linux";
-					arch = "riscv";
+					arch = ARCH;
 					compression = "none";
 					load = /bits/ 64 <CONFIG_TEXT_BASE>;
 
@@ -57,7 +63,7 @@
 				tee {
 					description = "OP-TEE";
 					type = "tee";
-					arch = "riscv";
+					arch = ARCH;
 					compression = "none";
 					os = "tee";
 					load = /bits/ 64 <CONFIG_SPL_OPTEE_LOAD_ADDR>;
@@ -71,7 +77,7 @@
 					description = "OpenSBI fw_dynamic Firmware";
 					type = "firmware";
 					os = "opensbi";
-					arch = "riscv";
+					arch = ARCH;
 					compression = "none";
 					load = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>;
 					entry = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>;
diff --git a/arch/riscv/include/asm/u-boot.h b/arch/riscv/include/asm/u-boot.h
index d5e1d5f3231..a90cc4c21cf 100644
--- a/arch/riscv/include/asm/u-boot.h
+++ b/arch/riscv/include/asm/u-boot.h
@@ -23,6 +23,10 @@
 #include <asm/u-boot-riscv.h>
 
 /* For image.h:image_check_target_arch() */
+#ifdef CONFIG_64BIT
+#define IH_ARCH_DEFAULT IH_ARCH_RISCV64
+#else
 #define IH_ARCH_DEFAULT IH_ARCH_RISCV
+#endif
 
 #endif	/* _U_BOOT_H_ */
-- 
2.43.0


  parent reply	other threads:[~2025-03-11 13:35 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-11 13:35 [PATCH v1 0/3] Risc-V 32 bit/64 bit images Mayuresh Chitale
2025-03-11 13:35 ` [PATCH v1 1/3] riscv: image: Add new image type for RV64 Mayuresh Chitale
2025-03-12 11:51   ` Максим Москалец
2025-04-03 10:56     ` Mayuresh Chitale
2025-03-11 13:35 ` Mayuresh Chitale [this message]
2025-03-11 13:35 ` [PATCH v1 3/3] booti/bootm: riscv: Verify image arch type Mayuresh Chitale
2025-03-11 13:59   ` Heinrich Schuchardt
2025-04-03 10:58     ` Mayuresh Chitale

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