[PATCH v1 0/3] Risc-V 32 bit/64 bit images

[PATCH v1 0/3] Risc-V 32 bit/64 bit images

[Mayuresh Chitale]

This series adds support for building different images for 32-bit vs
64-bit Risc-V CPUs and also for verifying the target arch of an image
before booting it.

Changes from RFC:
- Rebase on latest master branch
- Improve commit message for patch 3

Mayuresh Chitale (3):
  riscv: image: Add new image type for RV64
  riscv: Select appropriate image type
  booti/bootm: riscv: Verify image arch type

 arch/riscv/dts/binman.dtsi      | 14 ++++++++++----
 arch/riscv/include/asm/u-boot.h |  4 ++++
 arch/riscv/lib/bootm.c          |  4 ++++
 boot/image.c                    |  3 ++-
 cmd/booti.c                     |  5 ++++-
 include/image.h                 |  1 +
 6 files changed, 25 insertions(+), 6 deletions(-)

-- 
2.43.0

[PATCH v1 1/3] riscv: image: Add new image type for RV64

[Mayuresh Chitale]

Similar to ARM and X86, introduce a new image type which allows u-boot
to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 boot/image.c    | 3 ++-
 include/image.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/boot/image.c b/boot/image.c
index abac254e026..03d5e59b634 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = {
 	{	IH_ARCH_ARC,		"arc",		"ARC",		},
 	{	IH_ARCH_X86_64,		"x86_64",	"AMD x86_64",	},
 	{	IH_ARCH_XTENSA,		"xtensa",	"Xtensa",	},
-	{	IH_ARCH_RISCV,		"riscv",	"RISC-V",	},
+	{	IH_ARCH_RISCV,		"riscv",	"RISC-V 32 Bit",},
+	{	IH_ARCH_RISCV64,	"riscv64",	"RISC-V 64 Bit",},
 	{	-1,			"",		"",		},
 };
 
diff --git a/include/image.h b/include/image.h
index 8a9f779d3ff..12b31166e86 100644
--- a/include/image.h
+++ b/include/image.h
@@ -139,6 +139,7 @@ enum {
 	IH_ARCH_X86_64,			/* AMD x86_64, Intel and Via */
 	IH_ARCH_XTENSA,			/* Xtensa	*/
 	IH_ARCH_RISCV,			/* RISC-V */
+	IH_ARCH_RISCV64,		/* RISC-V 64 bit*/
 
 	IH_ARCH_COUNT,
 };
-- 
2.43.0

[PATCH v1 2/3] riscv: Select appropriate image type

[Mayuresh Chitale]

Select between the 32-bit or 64-bit arch type for the image headers
depending on how the build is configured.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 arch/riscv/dts/binman.dtsi      | 14 ++++++++++----
 arch/riscv/include/asm/u-boot.h |  4 ++++
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
index 0405faca574..a1a566b511b 100644
--- a/arch/riscv/dts/binman.dtsi
+++ b/arch/riscv/dts/binman.dtsi
@@ -5,6 +5,12 @@
 
 #include <config.h>
 
+#ifdef CONFIG_64BIT
+#define ARCH "riscv64"
+#else
+#define ARCH "riscv"
+
+#endif
 / {
 	binman: binman {
 		multiple-images;
@@ -31,7 +37,7 @@
 					description = "U-Boot";
 					type = "standalone";
 					os = "U-Boot";
-					arch = "riscv";
+					arch = ARCH;
 					compression = "none";
 					load = /bits/ 64 <CONFIG_TEXT_BASE>;
 
@@ -44,7 +50,7 @@
 					description = "Linux";
 					type = "standalone";
 					os = "Linux";
-					arch = "riscv";
+					arch = ARCH;
 					compression = "none";
 					load = /bits/ 64 <CONFIG_TEXT_BASE>;
 
@@ -57,7 +63,7 @@
 				tee {
 					description = "OP-TEE";
 					type = "tee";
-					arch = "riscv";
+					arch = ARCH;
 					compression = "none";
 					os = "tee";
 					load = /bits/ 64 <CONFIG_SPL_OPTEE_LOAD_ADDR>;
@@ -71,7 +77,7 @@
 					description = "OpenSBI fw_dynamic Firmware";
 					type = "firmware";
 					os = "opensbi";
-					arch = "riscv";
+					arch = ARCH;
 					compression = "none";
 					load = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>;
 					entry = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>;
diff --git a/arch/riscv/include/asm/u-boot.h b/arch/riscv/include/asm/u-boot.h
index d5e1d5f3231..a90cc4c21cf 100644
--- a/arch/riscv/include/asm/u-boot.h
+++ b/arch/riscv/include/asm/u-boot.h
@@ -23,6 +23,10 @@
 #include <asm/u-boot-riscv.h>
 
 /* For image.h:image_check_target_arch() */
+#ifdef CONFIG_64BIT
+#define IH_ARCH_DEFAULT IH_ARCH_RISCV64
+#else
 #define IH_ARCH_DEFAULT IH_ARCH_RISCV
+#endif
 
 #endif	/* _U_BOOT_H_ */
-- 
2.43.0

[PATCH v1 3/3] booti/bootm: riscv: Verify image arch type

[Mayuresh Chitale]

Unlike ARM and X86, booting 32-bit images on 64-bit CPUs is currently
not supported for Risc-V. Hence, for bootm, disallow booting a FIT
or a legacy image that was built for an arch type which is different
than the current arch and for booti, set the arch type to be the
same as the current arch.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 arch/riscv/lib/bootm.c | 4 ++++
 cmd/booti.c            | 5 ++++-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 76c610bcee0..90f71bee6a5 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -94,6 +94,10 @@ static void boot_jump_linux(struct bootm_headers *images, int flag)
 	announce_and_cleanup(fake);
 
 	if (!fake) {
+		if (images->os.arch != IH_ARCH_DEFAULT) {
+			printf("Image arch not compatible with host arch.\n");
+			hang();
+		}
 		if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
 #ifdef CONFIG_SMP
 			ret = smp_call_function(images->ep,
diff --git a/cmd/booti.c b/cmd/booti.c
index 1a57fe91397..00921ec4a9d 100644
--- a/cmd/booti.c
+++ b/cmd/booti.c
@@ -131,7 +131,10 @@ int do_booti(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 
 	images.os.os = IH_OS_LINUX;
 	if (IS_ENABLED(CONFIG_RISCV_SMODE))
-		images.os.arch = IH_ARCH_RISCV;
+		if (IS_ENABLED(CONFIG_64BIT))
+			images.os.arch = IH_ARCH_RISCV64;
+		else
+			images.os.arch = IH_ARCH_RISCV;
 	else if (IS_ENABLED(CONFIG_ARM64))
 		images.os.arch = IH_ARCH_ARM64;
 
-- 
2.43.0

Re: [PATCH v1 3/3] booti/bootm: riscv: Verify image arch type

[Heinrich Schuchardt]

On 11.03.25 14:35, Mayuresh Chitale wrote:
> Unlike ARM and X86, booting 32-bit images on 64-bit CPUs is currently
> not supported for Risc-V. Hence, for bootm, disallow booting a FIT
> or a legacy image that was built for an arch type which is different
> than the current arch and for booti, set the arch type to be the
> same as the current arch.
>
> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
> ---
>   arch/riscv/lib/bootm.c | 4 ++++
>   cmd/booti.c            | 5 ++++-
>   2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
> index 76c610bcee0..90f71bee6a5 100644
> --- a/arch/riscv/lib/bootm.c
> +++ b/arch/riscv/lib/bootm.c
> @@ -94,6 +94,10 @@ static void boot_jump_linux(struct bootm_headers *images, int flag)
>   	announce_and_cleanup(fake);
>
>   	if (!fake) {
> +		if (images->os.arch != IH_ARCH_DEFAULT) {
> +			printf("Image arch not compatible with host arch.\n");
> +			hang();
> +		}
>   		if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
>   #ifdef CONFIG_SMP
>   			ret = smp_call_function(images->ep,
> diff --git a/cmd/booti.c b/cmd/booti.c
> index 1a57fe91397..00921ec4a9d 100644
> --- a/cmd/booti.c
> +++ b/cmd/booti.c
> @@ -131,7 +131,10 @@ int do_booti(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
>
>   	images.os.os = IH_OS_LINUX;
>   	if (IS_ENABLED(CONFIG_RISCV_SMODE))

Why do we check for S-mode here? Wouldn't checking CONFIG_RISCV be more
adequate? Think of a micro-controller with only M and U mode.

sipeed_maix_bitm_defconfig has CONFIG_RISCV_MMODE=y, CONFIG_CMD_BOOTI=y.

Cf. 3cedc97479ff ("RISCV: image: Add booti support")

Otherwise looks good.

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

> -		images.os.arch = IH_ARCH_RISCV;
> +		if (IS_ENABLED(CONFIG_64BIT))
> +			images.os.arch = IH_ARCH_RISCV64;
> +		else
> +			images.os.arch = IH_ARCH_RISCV;
>   	else if (IS_ENABLED(CONFIG_ARM64))
>   		images.os.arch = IH_ARCH_ARM64;
>

Re: [PATCH v1 1/3] riscv: image: Add new image type for RV64

[Максим Москалец]

вт, 11 мар. 2025 г. в 16:35, Mayuresh Chitale <mchitale@ventanamicro.com>:

> Similar to ARM and X86, introduce a new image type which allows u-boot
> to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.
>
> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
> ---
>  boot/image.c    | 3 ++-
>  include/image.h | 1 +
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/boot/image.c b/boot/image.c
> index abac254e026..03d5e59b634 100644
> --- a/boot/image.c
> +++ b/boot/image.c
> @@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = {
>         {       IH_ARCH_ARC,            "arc",          "ARC",          },
>         {       IH_ARCH_X86_64,         "x86_64",       "AMD x86_64",   },
>         {       IH_ARCH_XTENSA,         "xtensa",       "Xtensa",       },
> -       {       IH_ARCH_RISCV,          "riscv",        "RISC-V",       },
> +       {       IH_ARCH_RISCV,          "riscv",        "RISC-V 32 Bit",},
> +       {       IH_ARCH_RISCV64,        "riscv64",      "RISC-V 64 Bit",},
>         {       -1,                     "",             "",             },
>  };
>
> diff --git a/include/image.h b/include/image.h
> index 8a9f779d3ff..12b31166e86 100644
> --- a/include/image.h
> +++ b/include/image.h
> @@ -139,6 +139,7 @@ enum {
>         IH_ARCH_X86_64,                 /* AMD x86_64, Intel and Via */
>         IH_ARCH_XTENSA,                 /* Xtensa       */
>         IH_ARCH_RISCV,                  /* RISC-V */
>

I believe s/RISC-V/RISC-V 32 bit/ is more explicit.
Looks good.

Reviewed-by: Maxim Moskalets <maximmosk4@gmail.com>


> +       IH_ARCH_RISCV64,                /* RISC-V 64 bit*/
>
>         IH_ARCH_COUNT,
>  };
> --
> 2.43.0
>
>

Re: [PATCH v1 1/3] riscv: image: Add new image type for RV64

[Mayuresh Chitale]

On Wed, Mar 12, 2025 at 5:21 PM Максим Москалец <maximmosk4@gmail.com> wrote:
>
>
>
> вт, 11 мар. 2025 г. в 16:35, Mayuresh Chitale <mchitale@ventanamicro.com>:
>>
>> Similar to ARM and X86, introduce a new image type which allows u-boot
>> to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.
>>
>> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
>> ---
>>  boot/image.c    | 3 ++-
>>  include/image.h | 1 +
>>  2 files changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/boot/image.c b/boot/image.c
>> index abac254e026..03d5e59b634 100644
>> --- a/boot/image.c
>> +++ b/boot/image.c
>> @@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = {
>>         {       IH_ARCH_ARC,            "arc",          "ARC",          },
>>         {       IH_ARCH_X86_64,         "x86_64",       "AMD x86_64",   },
>>         {       IH_ARCH_XTENSA,         "xtensa",       "Xtensa",       },
>> -       {       IH_ARCH_RISCV,          "riscv",        "RISC-V",       },
>> +       {       IH_ARCH_RISCV,          "riscv",        "RISC-V 32 Bit",},
>> +       {       IH_ARCH_RISCV64,        "riscv64",      "RISC-V 64 Bit",},
>>         {       -1,                     "",             "",             },
>>  };
>>
>> diff --git a/include/image.h b/include/image.h
>> index 8a9f779d3ff..12b31166e86 100644
>> --- a/include/image.h
>> +++ b/include/image.h
>> @@ -139,6 +139,7 @@ enum {
>>         IH_ARCH_X86_64,                 /* AMD x86_64, Intel and Via */
>>         IH_ARCH_XTENSA,                 /* Xtensa       */
>>         IH_ARCH_RISCV,                  /* RISC-V */
>
>
> I believe s/RISC-V/RISC-V 32 bit/ is more explicit.
> Looks good.
>
> Reviewed-by: Maxim Moskalets <maximmosk4@gmail.com>
Thanks. I will update the patch.
>
>>
>> +       IH_ARCH_RISCV64,                /* RISC-V 64 bit*/
>>
>>         IH_ARCH_COUNT,
>>  };
>> --
>> 2.43.0
>>

Re: [PATCH v1 3/3] booti/bootm: riscv: Verify image arch type

[Mayuresh Chitale]

On Tue, Mar 11, 2025 at 7:29 PM Heinrich Schuchardt <xypron.glpk@gmx.de> wrote:
>
> On 11.03.25 14:35, Mayuresh Chitale wrote:
> > Unlike ARM and X86, booting 32-bit images on 64-bit CPUs is currently
> > not supported for Risc-V. Hence, for bootm, disallow booting a FIT
> > or a legacy image that was built for an arch type which is different
> > than the current arch and for booti, set the arch type to be the
> > same as the current arch.
> >
> > Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
> > ---
> >   arch/riscv/lib/bootm.c | 4 ++++
> >   cmd/booti.c            | 5 ++++-
> >   2 files changed, 8 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
> > index 76c610bcee0..90f71bee6a5 100644
> > --- a/arch/riscv/lib/bootm.c
> > +++ b/arch/riscv/lib/bootm.c
> > @@ -94,6 +94,10 @@ static void boot_jump_linux(struct bootm_headers *images, int flag)
> >       announce_and_cleanup(fake);
> >
> >       if (!fake) {
> > +             if (images->os.arch != IH_ARCH_DEFAULT) {
> > +                     printf("Image arch not compatible with host arch.\n");
> > +                     hang();
> > +             }
> >               if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
> >   #ifdef CONFIG_SMP
> >                       ret = smp_call_function(images->ep,
> > diff --git a/cmd/booti.c b/cmd/booti.c
> > index 1a57fe91397..00921ec4a9d 100644
> > --- a/cmd/booti.c
> > +++ b/cmd/booti.c
> > @@ -131,7 +131,10 @@ int do_booti(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
> >
> >       images.os.os = IH_OS_LINUX;
> >       if (IS_ENABLED(CONFIG_RISCV_SMODE))
>
> Why do we check for S-mode here? Wouldn't checking CONFIG_RISCV be more
> adequate? Think of a micro-controller with only M and U mode.
>
> sipeed_maix_bitm_defconfig has CONFIG_RISCV_MMODE=y, CONFIG_CMD_BOOTI=y.
>
> Cf. 3cedc97479ff ("RISCV: image: Add booti support")
>
> Otherwise looks good.

Thanks Heinrich. I will update the patch.
>
> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
>
> > -             images.os.arch = IH_ARCH_RISCV;
> > +             if (IS_ENABLED(CONFIG_64BIT))
> > +                     images.os.arch = IH_ARCH_RISCV64;
> > +             else
> > +                     images.os.arch = IH_ARCH_RISCV;
> >       else if (IS_ENABLED(CONFIG_ARM64))
> >               images.os.arch = IH_ARCH_ARM64;
> >
>