[PATCH 0/6] Add IPC support on MCU R5F cluster in Split Mode

[PATCH 0/6] Add IPC support on MCU R5F cluster in Split Mode

[Beleswar Padhi]

This series adds remoteproc support on MCU R5F in Split mode.

During boot, ROM can bring up the boot R5F cores in either lockstep or
split mode based on X509 certificate flags. If booted in lockstep mode,
the MCU R5F cores will run first the R5 SPL, and then once A72 comes up,
will run the Device Manager (DM) firmware. But if booted in split mode, core
0 will run DM firmware and second core sits in WFI. Shut it down so that
other firmwares can later be loaded on them.

The shutdown of MCU R5 Core 1 is invoked at A72 SPL init, as by that
time Device Manager (DM) is up and running on R5 Core 0. The shutdown
of MCU R5 Core 1 is handled by Device Manager itself.

The devicetree patch [PATCH 6/6] need not be merged here, as it will be sent to
the Linux Upstream list.

Testing done:
1. Build test on all existing TI K3 platforms.
2. Tested U-Boot and Linux load of MCU R5F core in split mode on all applicable
boards (AM68-SK, AM69-SK, J7200-EVM, J721E-EVM, J721S2-EVM, J784S4-evm,
J742S2-EVM)

Test logs:
https://gist.github.com/3V3RYONE/ee8e3cb9aa5f4c5c00b059b9c14bfa98

Thanks,
Beleswar

Beleswar Padhi (6):
  arm: mach-k3: {am6/j7}*_hardware.h: Expose MCU R5 proc and device ids
  arch: mach-k3: common: Add support to shutdown MCU R5 Core 1
  remoteproc: k3-r5: Acquire processor control before reset ops
  board: ti: j7*: Add firmware for MCU R5 core1
  arm: dts: k3-j7*-binman: Enable split mode for MCU R5F
  DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

 arch/arm/dts/k3-j7200-binman.dtsi             |  3 +
 arch/arm/dts/k3-j721e-binman.dtsi             |  4 ++
 arch/arm/dts/k3-j721s2-binman.dtsi            |  3 +
 arch/arm/dts/k3-j784s4-binman.dtsi            |  3 +
 arch/arm/mach-k3/common.c                     | 55 +++++++++++++++++++
 arch/arm/mach-k3/common.h                     |  1 +
 arch/arm/mach-k3/include/mach/am62_hardware.h |  4 +-
 .../arm/mach-k3/include/mach/am62a_hardware.h |  4 +-
 .../arm/mach-k3/include/mach/am62p_hardware.h |  4 +-
 arch/arm/mach-k3/include/mach/am64_hardware.h |  9 +--
 arch/arm/mach-k3/include/mach/am6_hardware.h  |  9 +--
 .../arm/mach-k3/include/mach/j721e_hardware.h |  9 +--
 .../mach-k3/include/mach/j721s2_hardware.h    |  9 +--
 .../arm/mach-k3/include/mach/j722s_hardware.h |  4 +-
 .../mach-k3/include/mach/j784s4_hardware.h    |  9 +--
 arch/arm/mach-k3/j721e/j721e_init.c           |  9 ++-
 arch/arm/mach-k3/j721s2/j721s2_init.c         |  7 +++
 arch/arm/mach-k3/j784s4/j784s4_init.c         |  7 +++
 board/ti/j7200/j7200.env                      |  2 +-
 board/ti/j721e/j721e.env                      |  2 +-
 board/ti/j721s2/j721s2.env                    |  2 +-
 board/ti/j784s4/j784s4.env                    |  4 +-
 drivers/remoteproc/ti_k3_r5f_rproc.c          |  6 ++
 .../src/arm64/ti/k3-j7200-mcu-wakeup.dtsi     |  2 +-
 .../src/arm64/ti/k3-j721e-mcu-wakeup.dtsi     |  2 +-
 .../src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi    |  2 +-
 .../k3-j784s4-j742s2-mcu-wakeup-common.dtsi   |  2 +-
 27 files changed, 139 insertions(+), 38 deletions(-)

-- 
2.34.1

[PATCH 1/6] arm: mach-k3: {am6/j7}*_hardware.h: Expose MCU R5 proc and device ids

[Beleswar Padhi]

Currently the MCU R5 processor ids and device ids are only defined for
R5 SPL Stage. Expose these ids always so that A72 SPL can utilize this
information to shutdown MCU R5 Core 1 when booted in Split mode.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
 arch/arm/mach-k3/include/mach/am62_hardware.h   | 4 ++--
 arch/arm/mach-k3/include/mach/am62a_hardware.h  | 4 ++--
 arch/arm/mach-k3/include/mach/am62p_hardware.h  | 4 ++--
 arch/arm/mach-k3/include/mach/am64_hardware.h   | 9 +++++----
 arch/arm/mach-k3/include/mach/am6_hardware.h    | 9 +++++----
 arch/arm/mach-k3/include/mach/j721e_hardware.h  | 9 +++++----
 arch/arm/mach-k3/include/mach/j721s2_hardware.h | 9 +++++----
 arch/arm/mach-k3/include/mach/j722s_hardware.h  | 4 ++--
 arch/arm/mach-k3/include/mach/j784s4_hardware.h | 9 +++++----
 9 files changed, 33 insertions(+), 28 deletions(-)

diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h
index bcbc4821c82..d44342d43d4 100644
--- a/arch/arm/mach-k3/include/mach/am62_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
@@ -158,8 +158,8 @@ static inline int k3_has_gpu(void)
 
 static const u32 put_device_ids[] = {};
 
-static const u32 put_core_ids[] = {};
-
 #endif
 
+static const u32 put_core_ids[] = {};
+
 #endif /* __ASM_ARCH_AM62_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h
index cd61abe0185..f3fd736f31b 100644
--- a/arch/arm/mach-k3/include/mach/am62a_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h
@@ -90,8 +90,8 @@
 
 static const u32 put_device_ids[] = {};
 
-static const u32 put_core_ids[] = {};
-
 #endif
 
+static const u32 put_core_ids[] = {};
+
 #endif /* __ASM_ARCH_AM62A_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am62p_hardware.h b/arch/arm/mach-k3/include/mach/am62p_hardware.h
index 95af5c5c547..a310b52b45d 100644
--- a/arch/arm/mach-k3/include/mach/am62p_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62p_hardware.h
@@ -141,8 +141,8 @@ static inline int k3_get_a53_max_frequency(void)
 
 static const u32 put_device_ids[] = {};
 
-static const u32 put_core_ids[] = {};
-
 #endif
 
+static const u32 put_core_ids[] = {};
+
 #endif /* __ASM_ARCH_AM62P_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h
index 44df887d5df..105b42986de 100644
--- a/arch/arm/mach-k3/include/mach/am64_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am64_hardware.h
@@ -50,19 +50,20 @@
 
 #define AM64X_DEV_RTI8			127
 #define AM64X_DEV_RTI9			128
-#define AM64X_DEV_R5FSS0_CORE0		121
-#define AM64X_DEV_R5FSS0_CORE1		122
 
 static const u32 put_device_ids[] = {
 	AM64X_DEV_RTI9,
 	AM64X_DEV_RTI8,
 };
 
+#endif
+
+#define AM64X_DEV_R5FSS0_CORE0		121
+#define AM64X_DEV_R5FSS0_CORE1		122
+
 static const u32 put_core_ids[] = {
 	AM64X_DEV_R5FSS0_CORE1,
 	AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
 };
 
-#endif
-
 #endif /* __ASM_ARCH_DRA8_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h b/arch/arm/mach-k3/include/mach/am6_hardware.h
index 9913964c46b..8169584a372 100644
--- a/arch/arm/mach-k3/include/mach/am6_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am6_hardware.h
@@ -43,19 +43,20 @@
 
 #define AM6_DEV_MCU_RTI0			134
 #define AM6_DEV_MCU_RTI1			135
-#define AM6_DEV_MCU_ARMSS0_CPU0			159
-#define AM6_DEV_MCU_ARMSS0_CPU1			245
 
 static const u32 put_device_ids[] = {
 	AM6_DEV_MCU_RTI0,
 	AM6_DEV_MCU_RTI1,
 };
 
+#endif
+
+#define AM6_DEV_MCU_ARMSS0_CPU0			159
+#define AM6_DEV_MCU_ARMSS0_CPU1			245
+
 static const u32 put_core_ids[] = {
 	AM6_DEV_MCU_ARMSS0_CPU1,
 	AM6_DEV_MCU_ARMSS0_CPU0,	/* Handle CPU0 after CPU1 */
 };
 
-#endif
-
 #endif /* __ASM_ARCH_AM6_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h
index 2b5ec771e18..5bef309af0a 100644
--- a/arch/arm/mach-k3/include/mach/j721e_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h
@@ -41,19 +41,20 @@
 
 #define J721E_DEV_MCU_RTI0			262
 #define J721E_DEV_MCU_RTI1			263
-#define J721E_DEV_MCU_ARMSS0_CPU0		250
-#define J721E_DEV_MCU_ARMSS0_CPU1		251
 
 static const u32 put_device_ids[] = {
 	J721E_DEV_MCU_RTI0,
 	J721E_DEV_MCU_RTI1,
 };
 
+#endif
+
+#define J721E_DEV_MCU_ARMSS0_CPU0		250
+#define J721E_DEV_MCU_ARMSS0_CPU1		251
+
 static const u32 put_core_ids[] = {
 	J721E_DEV_MCU_ARMSS0_CPU1,
 	J721E_DEV_MCU_ARMSS0_CPU0,	/* Handle CPU0 after CPU1 */
 };
 
-#endif
-
 #endif /* __ASM_ARCH_J721E_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/j721s2_hardware.h b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
index 8daea82a77e..82f076a45e0 100644
--- a/arch/arm/mach-k3/include/mach/j721s2_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
@@ -41,19 +41,20 @@
 
 #define J721S2_DEV_MCU_RTI0			295
 #define J721S2_DEV_MCU_RTI1			296
-#define J721S2_DEV_MCU_ARMSS0_CPU0		284
-#define J721S2_DEV_MCU_ARMSS0_CPU1		285
 
 static const u32 put_device_ids[] = {
 	J721S2_DEV_MCU_RTI0,
 	J721S2_DEV_MCU_RTI1,
 };
 
+#endif
+
+#define J721S2_DEV_MCU_ARMSS0_CPU0		284
+#define J721S2_DEV_MCU_ARMSS0_CPU1		285
+
 static const u32 put_core_ids[] = {
 	J721S2_DEV_MCU_ARMSS0_CPU1,
 	J721S2_DEV_MCU_ARMSS0_CPU0,	/* Handle CPU0 after CPU1 */
 };
 
-#endif
-
 #endif /* __ASM_ARCH_J721S2_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/j722s_hardware.h b/arch/arm/mach-k3/include/mach/j722s_hardware.h
index 8d0bec22068..0c695134c28 100644
--- a/arch/arm/mach-k3/include/mach/j722s_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j722s_hardware.h
@@ -76,8 +76,8 @@
 
 static const u32 put_device_ids[] = {};
 
-static const u32 put_core_ids[] = {};
-
 #endif
 
+static const u32 put_core_ids[] = {};
+
 #endif /* __ASM_ARCH_J722S_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/j784s4_hardware.h b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
index 0ffe238cdae..29a894baed3 100644
--- a/arch/arm/mach-k3/include/mach/j784s4_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
@@ -41,19 +41,20 @@
 
 #define J784S4_DEV_MCU_RTI0			367
 #define J784S4_DEV_MCU_RTI1			368
-#define J784S4_DEV_MCU_ARMSS0_CPU0		346
-#define J784S4_DEV_MCU_ARMSS0_CPU1		347
 
 static const u32 put_device_ids[] = {
 	J784S4_DEV_MCU_RTI0,
 	J784S4_DEV_MCU_RTI1,
 };
 
+#endif
+
+#define J784S4_DEV_MCU_ARMSS0_CPU0		346
+#define J784S4_DEV_MCU_ARMSS0_CPU1		347
+
 static const u32 put_core_ids[] = {
 	J784S4_DEV_MCU_ARMSS0_CPU1,
 	J784S4_DEV_MCU_ARMSS0_CPU0,     /* Handle CPU0 after CPU1 */
 };
 
-#endif
-
 #endif /* __ASM_ARCH_J784S4_HARDWARE_H */
-- 
2.34.1

[PATCH 2/6] arch: mach-k3: common: Add support to shutdown MCU R5 Core 1

[Beleswar Padhi]

During boot, ROM can bring up the MCU R5F cores in either lockstep or
split mode based on X509 certificate flags. If booted in split mode,
core 0 will run DM firmware and second core sits in WFI. Add support to
shut down core 1 so that other firmwares can later be loaded on them.

The shutdown of MCU R5 Core 1 is invoked at A72 SPL init, as by that
time Device Manager (DM) is up and running on R5 Core 0. The shutdown
request of Core 1 is handled by Device Manager itself.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
 arch/arm/mach-k3/common.c             | 55 +++++++++++++++++++++++++++
 arch/arm/mach-k3/common.h             |  1 +
 arch/arm/mach-k3/j721e/j721e_init.c   |  9 ++++-
 arch/arm/mach-k3/j721s2/j721s2_init.c |  7 ++++
 arch/arm/mach-k3/j784s4/j784s4_init.c |  7 ++++
 5 files changed, 78 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index fc230f180d0..68f24948134 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -31,6 +31,10 @@
 #include <dm/uclass-internal.h>
 #include <dm/device-internal.h>
 
+#define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT	0x00000001
+#define PROC_ID_MCU_R5FSS0_CORE1		0x02
+#define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP		0x00000100
+
 #include <asm/arch/k3-qos.h>
 
 struct ti_sci_handle *get_ti_sci_handle(void)
@@ -328,3 +332,54 @@ void setup_qos(void)
 		writel(qos_data[i].val, (uintptr_t)qos_data[i].reg);
 }
 #endif
+
+int shutdown_mcu_r5_core1(void)
+{
+	struct ti_sci_handle *ti_sci = get_ti_sci_handle();
+	struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
+	struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
+	u32 dev_id_mcu_r5_core1 = put_core_ids[0];
+	u64 boot_vector;
+	u32 cfg, ctrl, sts;
+	int cluster_mode_lockstep, ret;
+
+	ret = proc_ops->proc_request(ti_sci, PROC_ID_MCU_R5FSS0_CORE1);
+	if (ret) {
+		printf("Unable to request processor control for core %d\n",
+		       PROC_ID_MCU_R5FSS0_CORE1);
+		return ret;
+	}
+
+	ret = proc_ops->get_proc_boot_status(ti_sci, PROC_ID_MCU_R5FSS0_CORE1,
+					     &boot_vector, &cfg, &ctrl, &sts);
+	if (ret) {
+		printf("Unable to get Processor boot status for core %d\n",
+		       PROC_ID_MCU_R5FSS0_CORE1);
+		goto release_proc_ctrl;
+	}
+
+	/* Shutdown MCU R5F Core 1 only if the cluster is booted in SplitMode */
+	cluster_mode_lockstep = !!(cfg & PROC_BOOT_CFG_FLAG_R5_LOCKSTEP);
+	if (cluster_mode_lockstep) {
+		ret = -EINVAL;
+		goto release_proc_ctrl;
+	}
+
+	ret = proc_ops->set_proc_boot_ctrl(ti_sci, PROC_ID_MCU_R5FSS0_CORE1,
+					   PROC_BOOT_CTRL_FLAG_R5_CORE_HALT, 0);
+	if (ret) {
+		printf("Unable to Halt core %d\n", PROC_ID_MCU_R5FSS0_CORE1);
+		goto release_proc_ctrl;
+	}
+
+	ret = dev_ops->put_device(ti_sci, dev_id_mcu_r5_core1);
+	if (ret) {
+		printf("Unable to assert reset on core %d\n",
+		       PROC_ID_MCU_R5FSS0_CORE1);
+		return ret;
+	}
+
+release_proc_ctrl:
+	proc_ops->proc_release(ti_sci, PROC_ID_MCU_R5FSS0_CORE1);
+	return ret;
+}
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index 02c74731fea..6e33f578151 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -49,6 +49,7 @@ enum k3_device_type get_device_type(void);
 struct ti_sci_handle *get_ti_sci_handle(void);
 void do_board_detect(void);
 void ti_secure_image_check_binary(void **p_image, size_t *p_size);
+int shutdown_mcu_r5_core1(void);
 
 #if (IS_ENABLED(CONFIG_K3_QOS))
 void setup_qos(void);
diff --git a/arch/arm/mach-k3/j721e/j721e_init.c b/arch/arm/mach-k3/j721e/j721e_init.c
index f31c20f7ed6..edca2634fb9 100644
--- a/arch/arm/mach-k3/j721e/j721e_init.c
+++ b/arch/arm/mach-k3/j721e/j721e_init.c
@@ -296,9 +296,9 @@ void do_dt_magic(void)
 
 void board_init_f(ulong dummy)
 {
+	int ret;
 #if defined(CONFIG_K3_J721E_DDRSS) || defined(CONFIG_K3_LOAD_SYSFW)
 	struct udevice *dev;
-	int ret;
 #endif
 	/*
 	 * Cannot delay this further as there is a chance that
@@ -371,6 +371,13 @@ void board_init_f(ulong dummy)
 	preloader_console_init();
 #endif
 
+	/* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
+	if (IS_ENABLED(CONFIG_ARM64)) {
+		ret = shutdown_mcu_r5_core1();
+		if (ret)
+			printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
+	}
+
 	/* Output System Firmware version info */
 	k3_sysfw_print_ver();
 
diff --git a/arch/arm/mach-k3/j721s2/j721s2_init.c b/arch/arm/mach-k3/j721s2/j721s2_init.c
index 5941fa26a95..6342161f830 100644
--- a/arch/arm/mach-k3/j721s2/j721s2_init.c
+++ b/arch/arm/mach-k3/j721s2/j721s2_init.c
@@ -230,6 +230,13 @@ void k3_spl_init(void)
 		remove_fwl_configs(navss_cbass0_fwls, ARRAY_SIZE(navss_cbass0_fwls));
 	}
 
+	/* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
+	if (IS_ENABLED(CONFIG_ARM64)) {
+		ret = shutdown_mcu_r5_core1();
+		if (ret)
+			printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
+	}
+
 	/* Output System Firmware version info */
 	k3_sysfw_print_ver();
 }
diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c
index 787cf6261e4..2756accbe12 100644
--- a/arch/arm/mach-k3/j784s4/j784s4_init.c
+++ b/arch/arm/mach-k3/j784s4/j784s4_init.c
@@ -206,6 +206,13 @@ void k3_spl_init(void)
 
 	writel(AUDIO_REFCLK1_DEFAULT, (uintptr_t)CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL);
 
+	/* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
+	if (IS_ENABLED(CONFIG_ARM64)) {
+		ret = shutdown_mcu_r5_core1();
+		if (ret)
+			printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
+	}
+
 	/* Output System Firmware version info */
 	k3_sysfw_print_ver();
 }
-- 
2.34.1

[PATCH 3/6] remoteproc: k3-r5: Acquire processor control before reset ops

[Beleswar Padhi]

Acquire processor control before doing core reset operations in probe
routine. Release the control afterwards, so that it can be acquired
during core loading operations.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
 drivers/remoteproc/ti_k3_r5f_rproc.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/remoteproc/ti_k3_r5f_rproc.c b/drivers/remoteproc/ti_k3_r5f_rproc.c
index 57268e7f8ff..f4bab6868ee 100644
--- a/drivers/remoteproc/ti_k3_r5f_rproc.c
+++ b/drivers/remoteproc/ti_k3_r5f_rproc.c
@@ -834,8 +834,14 @@ static int k3_r5f_probe(struct udevice *dev)
 			return 0;
 		}
 
+		ret = k3_r5f_proc_request(core);
+		if (ret)
+			return ret;
+
 		/* Make sure Local reset is asserted. Redundant? */
 		reset_assert(&core->reset);
+
+		ti_sci_proc_release(&core->tsp);
 	}
 
 	ret = k3_r5f_rproc_configure(core);
-- 
2.34.1

[PATCH 4/6] board: ti: j7*: Add firmware for MCU R5 core1

[Beleswar Padhi]

Link the default firmware in the environment variable for MCU R5 core1
for all J7 platforms.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
 board/ti/j7200/j7200.env   | 2 +-
 board/ti/j721e/j721e.env   | 2 +-
 board/ti/j721s2/j721s2.env | 2 +-
 board/ti/j784s4/j784s4.env | 4 ++--
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/board/ti/j7200/j7200.env b/board/ti/j7200/j7200.env
index 6cc92bf0d8d..292fc72fd58 100644
--- a/board/ti/j7200/j7200.env
+++ b/board/ti/j7200/j7200.env
@@ -36,5 +36,5 @@ main_cpsw0_qsgmii_phyinit=
 #endif
 
 #if CONFIG_TARGET_J7200_A72_EVM
-rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
+rproc_fw_binaries= 1 /lib/firmware/j7200-mcu-r5f0_1-fw 2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
 #endif
diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env
index e5b4225b3ce..ead7fbdb212 100644
--- a/board/ti/j721e/j721e.env
+++ b/board/ti/j721e/j721e.env
@@ -38,5 +38,5 @@ main_cpsw0_qsgmii_phyinit=
 #endif
 
 #if CONFIG_TARGET_J721E_A72_EVM
-rproc_fw_binaries=2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
+rproc_fw_binaries= 1 /lib/firmware/j7-mcu-r5f0_1-fw 2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
 #endif
diff --git a/board/ti/j721s2/j721s2.env b/board/ti/j721s2/j721s2.env
index a6b22550809..abd4faea6ee 100644
--- a/board/ti/j721s2/j721s2.env
+++ b/board/ti/j721s2/j721s2.env
@@ -24,6 +24,6 @@ name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw
 #endif
 rd_spec=-
 
-rproc_fw_binaries= 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw
+rproc_fw_binaries= 1 /lib/firmware/j721s2-mcu-r5f0_1-fw 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw
 
 
diff --git a/board/ti/j784s4/j784s4.env b/board/ti/j784s4/j784s4.env
index 9e1741be424..2f1a5f549d1 100644
--- a/board/ti/j784s4/j784s4.env
+++ b/board/ti/j784s4/j784s4.env
@@ -21,7 +21,7 @@ bootdir=/boot
 rd_spec=-
 
 #if CONFIG_TARGET_J784S4_A72_EVM
-rproc_fw_binaries= 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw
+rproc_fw_binaries= 1 /lib/firmware/j784s4-mcu-r5f0_1-fw 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw
 #elif CONFIG_TARGET_J742S2_A72_EVM
-rproc_fw_binaries= 2 /lib/firmware/j742s2-main-r5f0_0-fw 3 /lib/firmware/j742s2-main-r5f0_1-fw 4 /lib/firmware/j742s2-main-r5f1_0-fw 5 /lib/firmware/j742s2-main-r5f1_1-fw 6 /lib/firmware/j742s2-main-r5f2_0-fw 7 /lib/firmware/j742s2-main-r5f2_1-fw 8 /lib/firmware/j742s2-c71_0-fw 9 /lib/firmware/j742s2-c71_1-fw 10 /lib/firmware/j742s2-c71_2-fw
+rproc_fw_binaries= 1 /lib/firmware/j742s2-mcu-r5f0_1-fw 2 /lib/firmware/j742s2-main-r5f0_0-fw 3 /lib/firmware/j742s2-main-r5f0_1-fw 4 /lib/firmware/j742s2-main-r5f1_0-fw 5 /lib/firmware/j742s2-main-r5f1_1-fw 6 /lib/firmware/j742s2-main-r5f2_0-fw 7 /lib/firmware/j742s2-main-r5f2_1-fw 8 /lib/firmware/j742s2-c71_0-fw 9 /lib/firmware/j742s2-c71_1-fw 10 /lib/firmware/j742s2-c71_2-fw
 #endif
-- 
2.34.1

[PATCH 5/6] arm: dts: k3-j7*-binman: Enable split mode for MCU R5F

[Beleswar Padhi]

Set boot core-opts to enable split mode for MCU R5 cluster by default.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
 arch/arm/dts/k3-j7200-binman.dtsi  | 3 +++
 arch/arm/dts/k3-j721e-binman.dtsi  | 4 ++++
 arch/arm/dts/k3-j721s2-binman.dtsi | 3 +++
 arch/arm/dts/k3-j784s4-binman.dtsi | 3 +++
 4 files changed, 13 insertions(+)

diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi
index 47a4cde6b85..cf281bc72e0 100644
--- a/arch/arm/dts/k3-j7200-binman.dtsi
+++ b/arch/arm/dts/k3-j7200-binman.dtsi
@@ -61,6 +61,7 @@
 				<&combined_dm_cfg>, <&sysfw_inner_cert>;
 			combined;
 			dm-data;
+			core-opts = <2>;
 			sysfw-inner-cert;
 			keyfile = "custMpk.pem";
 			sw-rev = <1>;
@@ -153,6 +154,7 @@
 				<&combined_dm_cfg_fs>, <&sysfw_inner_cert_fs>;
 			combined;
 			dm-data;
+			core-opts = <2>;
 			sysfw-inner-cert;
 			keyfile = "custMpk.pem";
 			sw-rev = <1>;
@@ -199,6 +201,7 @@
 				<&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
 			combined;
 			dm-data;
+			core-opts = <2>;
 			content-sbl = <&u_boot_spl_unsigned>;
 			load = <0x41c00000>;
 			content-sysfw = <&ti_fs_gp>;
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
index 6adfab164ee..54c7ad92069 100644
--- a/arch/arm/dts/k3-j721e-binman.dtsi
+++ b/arch/arm/dts/k3-j721e-binman.dtsi
@@ -13,6 +13,7 @@
 		ti-secure-rom {
 			content = <&u_boot_spl>;
 			core = "public";
+			core-opts = <2>;
 			load = <CONFIG_SPL_TEXT_BASE>;
 			keyfile = "custMpk.pem";
 		};
@@ -26,6 +27,7 @@
 		ti-secure-rom {
 			content = <&u_boot_spl_sr2>;
 			core = "public";
+			core-opts = <2>;
 			load = <CONFIG_SPL_TEXT_BASE>;
 			keyfile = "custMpk.pem";
 		};
@@ -223,6 +225,7 @@
 		ti-secure-rom {
 			content = <&u_boot_spl_fs>;
 			core = "public";
+			core-opts = <2>;
 			load = <CONFIG_SPL_TEXT_BASE>;
 			keyfile = "custMpk.pem";
 		};
@@ -256,6 +259,7 @@
 		ti-secure-rom {
 			content = <&u_boot_spl_unsigned>;
 			core = "public";
+			core-opts = <2>;
 			load = <CONFIG_SPL_TEXT_BASE>;
 			sw-rev = <CONFIG_K3_X509_SWRV>;
 			keyfile = "ti-degenerate-key.pem";
diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi b/arch/arm/dts/k3-j721s2-binman.dtsi
index 73af184d27e..2d34b193813 100644
--- a/arch/arm/dts/k3-j721s2-binman.dtsi
+++ b/arch/arm/dts/k3-j721s2-binman.dtsi
@@ -15,6 +15,7 @@
 				<&combined_dm_cfg>, <&sysfw_inner_cert>;
 			combined;
 			dm-data;
+			core-opts = <2>;
 			sysfw-inner-cert;
 			keyfile = "custMpk.pem";
 			sw-rev = <1>;
@@ -60,6 +61,7 @@
 				<&combined_dm_cfg_fs>, <&sysfw_inner_cert_fs>;
 			combined;
 			dm-data;
+			core-opts = <2>;
 			sysfw-inner-cert;
 			keyfile = "custMpk.pem";
 			sw-rev = <1>;
@@ -106,6 +108,7 @@
 				<&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
 			combined;
 			dm-data;
+			core-opts = <2>;
 			content-sbl = <&u_boot_spl_unsigned>;
 			load = <0x41c00000>;
 			content-sysfw = <&ti_fs_gp>;
diff --git a/arch/arm/dts/k3-j784s4-binman.dtsi b/arch/arm/dts/k3-j784s4-binman.dtsi
index cb1fbc65923..14e71ab0f20 100644
--- a/arch/arm/dts/k3-j784s4-binman.dtsi
+++ b/arch/arm/dts/k3-j784s4-binman.dtsi
@@ -19,6 +19,7 @@
 				<&combined_dm_cfg>, <&sysfw_inner_cert>;
 			combined;
 			dm-data;
+			core-opts = <2>;
 			sysfw-inner-cert;
 			keyfile = "custMpk.pem";
 			sw-rev = <1>;
@@ -68,6 +69,7 @@
 				<&combined_dm_cfg_fs>, <&sysfw_inner_cert_fs>;
 			combined;
 			dm-data;
+			core-opts = <2>;
 			sysfw-inner-cert;
 			keyfile = "custMpk.pem";
 			sw-rev = <1>;
@@ -117,6 +119,7 @@
 				<&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
 			combined;
 			dm-data;
+			core-opts = <2>;
 			content-sbl = <&u_boot_spl_unsigned>;
 			load = <0x41c00000>;
 			content-sysfw = <&ti_fs_gp>;
-- 
2.34.1

[PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Beleswar Padhi]

Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
as the support to shut down core1 and use it for loading other firmware,
while DM runs on core0, has been added.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
 dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
 dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
 dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
 .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi b/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
index 56ab144fea0..d8826be4685 100644
--- a/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
@@ -606,7 +606,7 @@
 
 	mcu_r5fss0: r5fss@41000000 {
 		compatible = "ti,j7200-r5fss";
-		ti,cluster-mode = <1>;
+		ti,cluster-mode = <0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x41000000 0x00 0x41000000 0x20000>,
diff --git a/dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi b/dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi
index b02142b2b46..9a84ef7ca14 100644
--- a/dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi
@@ -588,7 +588,7 @@
 
 	mcu_r5fss0: r5fss@41000000 {
 		compatible = "ti,j721e-r5fss";
-		ti,cluster-mode = <1>;
+		ti,cluster-mode = <0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x41000000 0x00 0x41000000 0x20000>,
diff --git a/dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi b/dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi
index bc31266126d..4ba26876aa0 100644
--- a/dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -684,7 +684,7 @@
 
 	mcu_r5fss0: r5fss@41000000 {
 		compatible = "ti,j721s2-r5fss";
-		ti,cluster-mode = <1>;
+		ti,cluster-mode = <0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x41000000 0x00 0x41000000 0x20000>,
diff --git a/dts/upstream/src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/dts/upstream/src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
index 52e2965a3bf..e51b004c03a 100644
--- a/dts/upstream/src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
@@ -589,7 +589,7 @@
 
 	mcu_r5fss0: r5fss@41000000 {
 		compatible = "ti,j721s2-r5fss";
-		ti,cluster-mode = <1>;
+		ti,cluster-mode = <0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x41000000 0x00 0x41000000 0x20000>,
-- 
2.34.1

Re: [PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Beleswar Prasad Padhi]

Please do not merge this patch.

On 22/05/25 12:48, Beleswar Padhi wrote:
> Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
> as the support to shut down core1 and use it for loading other firmware,
> while DM runs on core0, has been added.
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
>  dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
>  dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
>  dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
>  .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)


Corresponding DT patch has been sent to Linux:
https://lore.kernel.org/all/20250522073426.329344-3-b-padhi@ti.com/

Thanks,
Beleswar

>
> diff --git a/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi b/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
> index 56ab144fea0..d8826be4685 100644
> --- a/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -606,7 +606,7 @@
>  
>  	mcu_r5fss0: r5fss@41000000 {
>  		compatible = "ti,j7200-r5fss";
> -		ti,cluster-mode = <1>;
> +		ti,cluster-mode = <0>;
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  		ranges = <0x41000000 0x00 0x41000000 0x20000>,
> diff --git a/dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi b/dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi
> index b02142b2b46..9a84ef7ca14 100644
> --- a/dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi
> +++ b/dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi
> @@ -588,7 +588,7 @@
>  
>  	mcu_r5fss0: r5fss@41000000 {
>  		compatible = "ti,j721e-r5fss";
> -		ti,cluster-mode = <1>;
> +		ti,cluster-mode = <0>;
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  		ranges = <0x41000000 0x00 0x41000000 0x20000>,
> diff --git a/dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi b/dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi
> index bc31266126d..4ba26876aa0 100644
> --- a/dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi
> +++ b/dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi
> @@ -684,7 +684,7 @@
>  
>  	mcu_r5fss0: r5fss@41000000 {
>  		compatible = "ti,j721s2-r5fss";
> -		ti,cluster-mode = <1>;
> +		ti,cluster-mode = <0>;
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  		ranges = <0x41000000 0x00 0x41000000 0x20000>,
> diff --git a/dts/upstream/src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/dts/upstream/src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> index 52e2965a3bf..e51b004c03a 100644
> --- a/dts/upstream/src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> +++ b/dts/upstream/src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> @@ -589,7 +589,7 @@
>  
>  	mcu_r5fss0: r5fss@41000000 {
>  		compatible = "ti,j721s2-r5fss";
> -		ti,cluster-mode = <1>;
> +		ti,cluster-mode = <0>;
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  		ranges = <0x41000000 0x00 0x41000000 0x20000>,

Re: [PATCH 1/6] arm: mach-k3: {am6/j7}*_hardware.h: Expose MCU R5 proc and device ids

[Neha Malcom Francis]

Hi Beleswar

On 22/05/25 12:48, Beleswar Padhi wrote:
> Currently the MCU R5 processor ids and device ids are only defined for
> R5 SPL Stage. Expose these ids always so that A72 SPL can utilize this
> information to shutdown MCU R5 Core 1 when booted in Split mode.
> 
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
>  arch/arm/mach-k3/include/mach/am62_hardware.h   | 4 ++--
>  arch/arm/mach-k3/include/mach/am62a_hardware.h  | 4 ++--
>  arch/arm/mach-k3/include/mach/am62p_hardware.h  | 4 ++--
>  arch/arm/mach-k3/include/mach/am64_hardware.h   | 9 +++++----
>  arch/arm/mach-k3/include/mach/am6_hardware.h    | 9 +++++----
>  arch/arm/mach-k3/include/mach/j721e_hardware.h  | 9 +++++----
>  arch/arm/mach-k3/include/mach/j721s2_hardware.h | 9 +++++----
>  arch/arm/mach-k3/include/mach/j722s_hardware.h  | 4 ++--
>  arch/arm/mach-k3/include/mach/j784s4_hardware.h | 9 +++++----
>  9 files changed, 33 insertions(+), 28 deletions(-)
> 
> diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h
> index bcbc4821c82..d44342d43d4 100644
> --- a/arch/arm/mach-k3/include/mach/am62_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
> @@ -158,8 +158,8 @@ static inline int k3_has_gpu(void)
>  
>  static const u32 put_device_ids[] = {};
>  
> -static const u32 put_core_ids[] = {};
> -
>  #endif
>  
> +static const u32 put_core_ids[] = {};
> +
>  #endif /* __ASM_ARCH_AM62_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h
> index cd61abe0185..f3fd736f31b 100644
> --- a/arch/arm/mach-k3/include/mach/am62a_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h
> @@ -90,8 +90,8 @@
>  
>  static const u32 put_device_ids[] = {};
>  
> -static const u32 put_core_ids[] = {};
> -
>  #endif
>  
> +static const u32 put_core_ids[] = {};
> +
>  #endif /* __ASM_ARCH_AM62A_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/am62p_hardware.h b/arch/arm/mach-k3/include/mach/am62p_hardware.h
> index 95af5c5c547..a310b52b45d 100644
> --- a/arch/arm/mach-k3/include/mach/am62p_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am62p_hardware.h
> @@ -141,8 +141,8 @@ static inline int k3_get_a53_max_frequency(void)
>  
>  static const u32 put_device_ids[] = {};
>  
> -static const u32 put_core_ids[] = {};
> -
>  #endif
>  
> +static const u32 put_core_ids[] = {};
> +
>  #endif /* __ASM_ARCH_AM62P_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h
> index 44df887d5df..105b42986de 100644
> --- a/arch/arm/mach-k3/include/mach/am64_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am64_hardware.h
> @@ -50,19 +50,20 @@
>  
>  #define AM64X_DEV_RTI8			127
>  #define AM64X_DEV_RTI9			128
> -#define AM64X_DEV_R5FSS0_CORE0		121
> -#define AM64X_DEV_R5FSS0_CORE1		122
>  
>  static const u32 put_device_ids[] = {
>  	AM64X_DEV_RTI9,
>  	AM64X_DEV_RTI8,
>  };
>  
> +#endif
> +
> +#define AM64X_DEV_R5FSS0_CORE0		121
> +#define AM64X_DEV_R5FSS0_CORE1		122
> +
>  static const u32 put_core_ids[] = {
>  	AM64X_DEV_R5FSS0_CORE1,
>  	AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_DRA8_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h b/arch/arm/mach-k3/include/mach/am6_hardware.h
> index 9913964c46b..8169584a372 100644
> --- a/arch/arm/mach-k3/include/mach/am6_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am6_hardware.h
> @@ -43,19 +43,20 @@
>  
>  #define AM6_DEV_MCU_RTI0			134
>  #define AM6_DEV_MCU_RTI1			135
> -#define AM6_DEV_MCU_ARMSS0_CPU0			159
> -#define AM6_DEV_MCU_ARMSS0_CPU1			245
>  
>  static const u32 put_device_ids[] = {
>  	AM6_DEV_MCU_RTI0,
>  	AM6_DEV_MCU_RTI1,
>  };
>  
> +#endif
> +
> +#define AM6_DEV_MCU_ARMSS0_CPU0			159
> +#define AM6_DEV_MCU_ARMSS0_CPU1			245
> +
>  static const u32 put_core_ids[] = {
>  	AM6_DEV_MCU_ARMSS0_CPU1,
>  	AM6_DEV_MCU_ARMSS0_CPU0,	/* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_AM6_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h
> index 2b5ec771e18..5bef309af0a 100644
> --- a/arch/arm/mach-k3/include/mach/j721e_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h
> @@ -41,19 +41,20 @@
>  
>  #define J721E_DEV_MCU_RTI0			262
>  #define J721E_DEV_MCU_RTI1			263
> -#define J721E_DEV_MCU_ARMSS0_CPU0		250
> -#define J721E_DEV_MCU_ARMSS0_CPU1		251
>  
>  static const u32 put_device_ids[] = {
>  	J721E_DEV_MCU_RTI0,
>  	J721E_DEV_MCU_RTI1,
>  };
>  
> +#endif
> +
> +#define J721E_DEV_MCU_ARMSS0_CPU0		250
> +#define J721E_DEV_MCU_ARMSS0_CPU1		251
> +
>  static const u32 put_core_ids[] = {
>  	J721E_DEV_MCU_ARMSS0_CPU1,
>  	J721E_DEV_MCU_ARMSS0_CPU0,	/* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_J721E_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/j721s2_hardware.h b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> index 8daea82a77e..82f076a45e0 100644
> --- a/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> @@ -41,19 +41,20 @@
>  
>  #define J721S2_DEV_MCU_RTI0			295
>  #define J721S2_DEV_MCU_RTI1			296
> -#define J721S2_DEV_MCU_ARMSS0_CPU0		284
> -#define J721S2_DEV_MCU_ARMSS0_CPU1		285
>  
>  static const u32 put_device_ids[] = {
>  	J721S2_DEV_MCU_RTI0,
>  	J721S2_DEV_MCU_RTI1,
>  };
>  
> +#endif
> +
> +#define J721S2_DEV_MCU_ARMSS0_CPU0		284
> +#define J721S2_DEV_MCU_ARMSS0_CPU1		285
> +
>  static const u32 put_core_ids[] = {
>  	J721S2_DEV_MCU_ARMSS0_CPU1,
>  	J721S2_DEV_MCU_ARMSS0_CPU0,	/* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_J721S2_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/j722s_hardware.h b/arch/arm/mach-k3/include/mach/j722s_hardware.h
> index 8d0bec22068..0c695134c28 100644
> --- a/arch/arm/mach-k3/include/mach/j722s_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j722s_hardware.h
> @@ -76,8 +76,8 @@
>  
>  static const u32 put_device_ids[] = {};
>  
> -static const u32 put_core_ids[] = {};
> -
>  #endif
>  
> +static const u32 put_core_ids[] = {};
> +
>  #endif /* __ASM_ARCH_J722S_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/j784s4_hardware.h b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> index 0ffe238cdae..29a894baed3 100644
> --- a/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> @@ -41,19 +41,20 @@
>  
>  #define J784S4_DEV_MCU_RTI0			367
>  #define J784S4_DEV_MCU_RTI1			368
> -#define J784S4_DEV_MCU_ARMSS0_CPU0		346
> -#define J784S4_DEV_MCU_ARMSS0_CPU1		347
>  
>  static const u32 put_device_ids[] = {
>  	J784S4_DEV_MCU_RTI0,
>  	J784S4_DEV_MCU_RTI1,
>  };
>  
> +#endif
> +
> +#define J784S4_DEV_MCU_ARMSS0_CPU0		346
> +#define J784S4_DEV_MCU_ARMSS0_CPU1		347
> +
>  static const u32 put_core_ids[] = {
>  	J784S4_DEV_MCU_ARMSS0_CPU1,
>  	J784S4_DEV_MCU_ARMSS0_CPU0,     /* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_J784S4_HARDWARE_H */

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>

-- 
Thanking You
Neha Malcom Francis

Re: [PATCH 2/6] arch: mach-k3: common: Add support to shutdown MCU R5 Core 1

[Neha Malcom Francis]

On 22/05/25 12:48, Beleswar Padhi wrote:
> During boot, ROM can bring up the MCU R5F cores in either lockstep or
> split mode based on X509 certificate flags. If booted in split mode,
> core 0 will run DM firmware and second core sits in WFI. Add support to
> shut down core 1 so that other firmwares can later be loaded on them.
> 
> The shutdown of MCU R5 Core 1 is invoked at A72 SPL init, as by that
> time Device Manager (DM) is up and running on R5 Core 0. The shutdown
> request of Core 1 is handled by Device Manager itself.
> 
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
>  arch/arm/mach-k3/common.c             | 55 +++++++++++++++++++++++++++
>  arch/arm/mach-k3/common.h             |  1 +
>  arch/arm/mach-k3/j721e/j721e_init.c   |  9 ++++-
>  arch/arm/mach-k3/j721s2/j721s2_init.c |  7 ++++
>  arch/arm/mach-k3/j784s4/j784s4_init.c |  7 ++++
>  5 files changed, 78 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
> index fc230f180d0..68f24948134 100644
> --- a/arch/arm/mach-k3/common.c
> +++ b/arch/arm/mach-k3/common.c
> @@ -31,6 +31,10 @@
>  #include <dm/uclass-internal.h>
>  #include <dm/device-internal.h>
>  
> +#define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT	0x00000001
> +#define PROC_ID_MCU_R5FSS0_CORE1		0x02
> +#define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP		0x00000100
> +
>  #include <asm/arch/k3-qos.h>
>  
>  struct ti_sci_handle *get_ti_sci_handle(void)
> @@ -328,3 +332,54 @@ void setup_qos(void)
>  		writel(qos_data[i].val, (uintptr_t)qos_data[i].reg);
>  }
>  #endif
> +
> +int shutdown_mcu_r5_core1(void)
> +{

Better to build this function only if CONFIG_ARM64 is enabled?

> +	struct ti_sci_handle *ti_sci = get_ti_sci_handle();
> +	struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
> +	struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
> +	u32 dev_id_mcu_r5_core1 = put_core_ids[0];
> +	u64 boot_vector;
> +	u32 cfg, ctrl, sts;
> +	int cluster_mode_lockstep, ret;
> +
> +	ret = proc_ops->proc_request(ti_sci, PROC_ID_MCU_R5FSS0_CORE1);
> +	if (ret) {
> +		printf("Unable to request processor control for core %d\n",
> +		       PROC_ID_MCU_R5FSS0_CORE1);
> +		return ret;
> +	}
> +
> +	ret = proc_ops->get_proc_boot_status(ti_sci, PROC_ID_MCU_R5FSS0_CORE1,
> +					     &boot_vector, &cfg, &ctrl, &sts);
> +	if (ret) {
> +		printf("Unable to get Processor boot status for core %d\n",
> +		       PROC_ID_MCU_R5FSS0_CORE1);
> +		goto release_proc_ctrl;
> +	}
> +
> +	/* Shutdown MCU R5F Core 1 only if the cluster is booted in SplitMode */
> +	cluster_mode_lockstep = !!(cfg & PROC_BOOT_CFG_FLAG_R5_LOCKSTEP);
> +	if (cluster_mode_lockstep) {
> +		ret = -EINVAL;
> +		goto release_proc_ctrl;
> +	}
> +
> +	ret = proc_ops->set_proc_boot_ctrl(ti_sci, PROC_ID_MCU_R5FSS0_CORE1,
> +					   PROC_BOOT_CTRL_FLAG_R5_CORE_HALT, 0);
> +	if (ret) {
> +		printf("Unable to Halt core %d\n", PROC_ID_MCU_R5FSS0_CORE1);
> +		goto release_proc_ctrl;
> +	}
> +
> +	ret = dev_ops->put_device(ti_sci, dev_id_mcu_r5_core1);
> +	if (ret) {
> +		printf("Unable to assert reset on core %d\n",
> +		       PROC_ID_MCU_R5FSS0_CORE1);
> +		return ret;
> +	}
> +
> +release_proc_ctrl:
> +	proc_ops->proc_release(ti_sci, PROC_ID_MCU_R5FSS0_CORE1);
> +	return ret;
> +}
> diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
> index 02c74731fea..6e33f578151 100644
> --- a/arch/arm/mach-k3/common.h
> +++ b/arch/arm/mach-k3/common.h
> @@ -49,6 +49,7 @@ enum k3_device_type get_device_type(void);
>  struct ti_sci_handle *get_ti_sci_handle(void);
>  void do_board_detect(void);
>  void ti_secure_image_check_binary(void **p_image, size_t *p_size);
> +int shutdown_mcu_r5_core1(void);
>  
>  #if (IS_ENABLED(CONFIG_K3_QOS))
>  void setup_qos(void);
> diff --git a/arch/arm/mach-k3/j721e/j721e_init.c b/arch/arm/mach-k3/j721e/j721e_init.c
> index f31c20f7ed6..edca2634fb9 100644
> --- a/arch/arm/mach-k3/j721e/j721e_init.c
> +++ b/arch/arm/mach-k3/j721e/j721e_init.c
> @@ -296,9 +296,9 @@ void do_dt_magic(void)
>  
>  void board_init_f(ulong dummy)
>  {
> +	int ret;
>  #if defined(CONFIG_K3_J721E_DDRSS) || defined(CONFIG_K3_LOAD_SYSFW)
>  	struct udevice *dev;
> -	int ret;
>  #endif
>  	/*
>  	 * Cannot delay this further as there is a chance that
> @@ -371,6 +371,13 @@ void board_init_f(ulong dummy)
>  	preloader_console_init();
>  #endif
>  
> +	/* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
> +	if (IS_ENABLED(CONFIG_ARM64)) {
> +		ret = shutdown_mcu_r5_core1();
> +		if (ret)
> +			printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
> +	}
> +
>  	/* Output System Firmware version info */
>  	k3_sysfw_print_ver();
>  
> diff --git a/arch/arm/mach-k3/j721s2/j721s2_init.c b/arch/arm/mach-k3/j721s2/j721s2_init.c
> index 5941fa26a95..6342161f830 100644
> --- a/arch/arm/mach-k3/j721s2/j721s2_init.c
> +++ b/arch/arm/mach-k3/j721s2/j721s2_init.c
> @@ -230,6 +230,13 @@ void k3_spl_init(void)
>  		remove_fwl_configs(navss_cbass0_fwls, ARRAY_SIZE(navss_cbass0_fwls));
>  	}
>  
> +	/* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
> +	if (IS_ENABLED(CONFIG_ARM64)) {
> +		ret = shutdown_mcu_r5_core1();
> +		if (ret)
> +			printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
> +	}
> +
>  	/* Output System Firmware version info */
>  	k3_sysfw_print_ver();
>  }
> diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c
> index 787cf6261e4..2756accbe12 100644
> --- a/arch/arm/mach-k3/j784s4/j784s4_init.c
> +++ b/arch/arm/mach-k3/j784s4/j784s4_init.c
> @@ -206,6 +206,13 @@ void k3_spl_init(void)
>  
>  	writel(AUDIO_REFCLK1_DEFAULT, (uintptr_t)CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL);
>  
> +	/* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
> +	if (IS_ENABLED(CONFIG_ARM64)) {
> +		ret = shutdown_mcu_r5_core1();
> +		if (ret)
> +			printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
> +	}
> +
>  	/* Output System Firmware version info */
>  	k3_sysfw_print_ver();
>  }

-- 
Thanking You
Neha Malcom Francis

Re: [PATCH 3/6] remoteproc: k3-r5: Acquire processor control before reset ops

[Neha Malcom Francis]

On 22/05/25 12:48, Beleswar Padhi wrote:
> Acquire processor control before doing core reset operations in probe
> routine. Release the control afterwards, so that it can be acquired
> during core loading operations.
> 
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
>  drivers/remoteproc/ti_k3_r5f_rproc.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/remoteproc/ti_k3_r5f_rproc.c b/drivers/remoteproc/ti_k3_r5f_rproc.c
> index 57268e7f8ff..f4bab6868ee 100644
> --- a/drivers/remoteproc/ti_k3_r5f_rproc.c
> +++ b/drivers/remoteproc/ti_k3_r5f_rproc.c
> @@ -834,8 +834,14 @@ static int k3_r5f_probe(struct udevice *dev)
>  			return 0;
>  		}
>  
> +		ret = k3_r5f_proc_request(core);
> +		if (ret)
> +			return ret;
> +
>  		/* Make sure Local reset is asserted. Redundant? */
>  		reset_assert(&core->reset);
> +
> +		ti_sci_proc_release(&core->tsp);
>  	}
>  
>  	ret = k3_r5f_rproc_configure(core);

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>

-- 
Thanking You
Neha Malcom Francis

Re: [PATCH 4/6] board: ti: j7*: Add firmware for MCU R5 core1

[Neha Malcom Francis]

On 22/05/25 12:48, Beleswar Padhi wrote:
> Link the default firmware in the environment variable for MCU R5 core1
> for all J7 platforms.
> 
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
>  board/ti/j7200/j7200.env   | 2 +-
>  board/ti/j721e/j721e.env   | 2 +-
>  board/ti/j721s2/j721s2.env | 2 +-
>  board/ti/j784s4/j784s4.env | 4 ++--
>  4 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/board/ti/j7200/j7200.env b/board/ti/j7200/j7200.env
> index 6cc92bf0d8d..292fc72fd58 100644
> --- a/board/ti/j7200/j7200.env
> +++ b/board/ti/j7200/j7200.env
> @@ -36,5 +36,5 @@ main_cpsw0_qsgmii_phyinit=
>  #endif
>  
>  #if CONFIG_TARGET_J7200_A72_EVM
> -rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
> +rproc_fw_binaries= 1 /lib/firmware/j7200-mcu-r5f0_1-fw 2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
>  #endif
> diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env
> index e5b4225b3ce..ead7fbdb212 100644
> --- a/board/ti/j721e/j721e.env
> +++ b/board/ti/j721e/j721e.env
> @@ -38,5 +38,5 @@ main_cpsw0_qsgmii_phyinit=
>  #endif
>  
>  #if CONFIG_TARGET_J721E_A72_EVM
> -rproc_fw_binaries=2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
> +rproc_fw_binaries= 1 /lib/firmware/j7-mcu-r5f0_1-fw 2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
>  #endif
> diff --git a/board/ti/j721s2/j721s2.env b/board/ti/j721s2/j721s2.env
> index a6b22550809..abd4faea6ee 100644
> --- a/board/ti/j721s2/j721s2.env
> +++ b/board/ti/j721s2/j721s2.env
> @@ -24,6 +24,6 @@ name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw
>  #endif
>  rd_spec=-
>  
> -rproc_fw_binaries= 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw
> +rproc_fw_binaries= 1 /lib/firmware/j721s2-mcu-r5f0_1-fw 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw
>  
>  
> diff --git a/board/ti/j784s4/j784s4.env b/board/ti/j784s4/j784s4.env
> index 9e1741be424..2f1a5f549d1 100644
> --- a/board/ti/j784s4/j784s4.env
> +++ b/board/ti/j784s4/j784s4.env
> @@ -21,7 +21,7 @@ bootdir=/boot
>  rd_spec=-
>  
>  #if CONFIG_TARGET_J784S4_A72_EVM
> -rproc_fw_binaries= 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw
> +rproc_fw_binaries= 1 /lib/firmware/j784s4-mcu-r5f0_1-fw 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw
>  #elif CONFIG_TARGET_J742S2_A72_EVM
> -rproc_fw_binaries= 2 /lib/firmware/j742s2-main-r5f0_0-fw 3 /lib/firmware/j742s2-main-r5f0_1-fw 4 /lib/firmware/j742s2-main-r5f1_0-fw 5 /lib/firmware/j742s2-main-r5f1_1-fw 6 /lib/firmware/j742s2-main-r5f2_0-fw 7 /lib/firmware/j742s2-main-r5f2_1-fw 8 /lib/firmware/j742s2-c71_0-fw 9 /lib/firmware/j742s2-c71_1-fw 10 /lib/firmware/j742s2-c71_2-fw
> +rproc_fw_binaries= 1 /lib/firmware/j742s2-mcu-r5f0_1-fw 2 /lib/firmware/j742s2-main-r5f0_0-fw 3 /lib/firmware/j742s2-main-r5f0_1-fw 4 /lib/firmware/j742s2-main-r5f1_0-fw 5 /lib/firmware/j742s2-main-r5f1_1-fw 6 /lib/firmware/j742s2-main-r5f2_0-fw 7 /lib/firmware/j742s2-main-r5f2_1-fw 8 /lib/firmware/j742s2-c71_0-fw 9 /lib/firmware/j742s2-c71_1-fw 10 /lib/firmware/j742s2-c71_2-fw
>  #endif

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>

-- 
Thanking You
Neha Malcom Francis

Re: [PATCH 5/6] arm: dts: k3-j7*-binman: Enable split mode for MCU R5F

[Neha Malcom Francis]

On 22/05/25 12:48, Beleswar Padhi wrote:
> Set boot core-opts to enable split mode for MCU R5 cluster by default.
> 
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
>  arch/arm/dts/k3-j7200-binman.dtsi  | 3 +++
>  arch/arm/dts/k3-j721e-binman.dtsi  | 4 ++++
>  arch/arm/dts/k3-j721s2-binman.dtsi | 3 +++
>  arch/arm/dts/k3-j784s4-binman.dtsi | 3 +++
>  4 files changed, 13 insertions(+)
> 
> diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi
> index 47a4cde6b85..cf281bc72e0 100644
> --- a/arch/arm/dts/k3-j7200-binman.dtsi
> +++ b/arch/arm/dts/k3-j7200-binman.dtsi
> @@ -61,6 +61,7 @@
>  				<&combined_dm_cfg>, <&sysfw_inner_cert>;
>  			combined;
>  			dm-data;
> +			core-opts = <2>;
>  			sysfw-inner-cert;
>  			keyfile = "custMpk.pem";
>  			sw-rev = <1>;
> @@ -153,6 +154,7 @@
>  				<&combined_dm_cfg_fs>, <&sysfw_inner_cert_fs>;
>  			combined;
>  			dm-data;
> +			core-opts = <2>;
>  			sysfw-inner-cert;
>  			keyfile = "custMpk.pem";
>  			sw-rev = <1>;
> @@ -199,6 +201,7 @@
>  				<&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
>  			combined;
>  			dm-data;
> +			core-opts = <2>;
>  			content-sbl = <&u_boot_spl_unsigned>;
>  			load = <0x41c00000>;
>  			content-sysfw = <&ti_fs_gp>;
> diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
> index 6adfab164ee..54c7ad92069 100644
> --- a/arch/arm/dts/k3-j721e-binman.dtsi
> +++ b/arch/arm/dts/k3-j721e-binman.dtsi
> @@ -13,6 +13,7 @@
>  		ti-secure-rom {
>  			content = <&u_boot_spl>;
>  			core = "public";
> +			core-opts = <2>;
>  			load = <CONFIG_SPL_TEXT_BASE>;
>  			keyfile = "custMpk.pem";
>  		};
> @@ -26,6 +27,7 @@
>  		ti-secure-rom {
>  			content = <&u_boot_spl_sr2>;
>  			core = "public";
> +			core-opts = <2>;
>  			load = <CONFIG_SPL_TEXT_BASE>;
>  			keyfile = "custMpk.pem";
>  		};
> @@ -223,6 +225,7 @@
>  		ti-secure-rom {
>  			content = <&u_boot_spl_fs>;
>  			core = "public";
> +			core-opts = <2>;
>  			load = <CONFIG_SPL_TEXT_BASE>;
>  			keyfile = "custMpk.pem";
>  		};
> @@ -256,6 +259,7 @@
>  		ti-secure-rom {
>  			content = <&u_boot_spl_unsigned>;
>  			core = "public";
> +			core-opts = <2>;
>  			load = <CONFIG_SPL_TEXT_BASE>;
>  			sw-rev = <CONFIG_K3_X509_SWRV>;
>  			keyfile = "ti-degenerate-key.pem";
> diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi b/arch/arm/dts/k3-j721s2-binman.dtsi
> index 73af184d27e..2d34b193813 100644
> --- a/arch/arm/dts/k3-j721s2-binman.dtsi
> +++ b/arch/arm/dts/k3-j721s2-binman.dtsi
> @@ -15,6 +15,7 @@
>  				<&combined_dm_cfg>, <&sysfw_inner_cert>;
>  			combined;
>  			dm-data;
> +			core-opts = <2>;
>  			sysfw-inner-cert;
>  			keyfile = "custMpk.pem";
>  			sw-rev = <1>;
> @@ -60,6 +61,7 @@
>  				<&combined_dm_cfg_fs>, <&sysfw_inner_cert_fs>;
>  			combined;
>  			dm-data;
> +			core-opts = <2>;
>  			sysfw-inner-cert;
>  			keyfile = "custMpk.pem";
>  			sw-rev = <1>;
> @@ -106,6 +108,7 @@
>  				<&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
>  			combined;
>  			dm-data;
> +			core-opts = <2>;
>  			content-sbl = <&u_boot_spl_unsigned>;
>  			load = <0x41c00000>;
>  			content-sysfw = <&ti_fs_gp>;
> diff --git a/arch/arm/dts/k3-j784s4-binman.dtsi b/arch/arm/dts/k3-j784s4-binman.dtsi
> index cb1fbc65923..14e71ab0f20 100644
> --- a/arch/arm/dts/k3-j784s4-binman.dtsi
> +++ b/arch/arm/dts/k3-j784s4-binman.dtsi
> @@ -19,6 +19,7 @@
>  				<&combined_dm_cfg>, <&sysfw_inner_cert>;
>  			combined;
>  			dm-data;
> +			core-opts = <2>;
>  			sysfw-inner-cert;
>  			keyfile = "custMpk.pem";
>  			sw-rev = <1>;
> @@ -68,6 +69,7 @@
>  				<&combined_dm_cfg_fs>, <&sysfw_inner_cert_fs>;
>  			combined;
>  			dm-data;
> +			core-opts = <2>;
>  			sysfw-inner-cert;
>  			keyfile = "custMpk.pem";
>  			sw-rev = <1>;
> @@ -117,6 +119,7 @@
>  				<&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
>  			combined;
>  			dm-data;
> +			core-opts = <2>;
>  			content-sbl = <&u_boot_spl_unsigned>;
>  			load = <0x41c00000>;
>  			content-sysfw = <&ti_fs_gp>;

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>

-- 
Thanking You
Neha Malcom Francis

Re: [PATCH 2/6] arch: mach-k3: common: Add support to shutdown MCU R5 Core 1

[Beleswar Prasad Padhi]

Hi Neha,

On 22/05/25 13:21, Neha Malcom Francis wrote:
> On 22/05/25 12:48, Beleswar Padhi wrote:
>> During boot, ROM can bring up the MCU R5F cores in either lockstep or
>> split mode based on X509 certificate flags. If booted in split mode,
>> core 0 will run DM firmware and second core sits in WFI. Add support to
>> shut down core 1 so that other firmwares can later be loaded on them.
>>
>> The shutdown of MCU R5 Core 1 is invoked at A72 SPL init, as by that
>> time Device Manager (DM) is up and running on R5 Core 0. The shutdown
>> request of Core 1 is handled by Device Manager itself.
>>
>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>> ---
>>  arch/arm/mach-k3/common.c             | 55 +++++++++++++++++++++++++++
>>  arch/arm/mach-k3/common.h             |  1 +
>>  arch/arm/mach-k3/j721e/j721e_init.c   |  9 ++++-
>>  arch/arm/mach-k3/j721s2/j721s2_init.c |  7 ++++
>>  arch/arm/mach-k3/j784s4/j784s4_init.c |  7 ++++
>>  5 files changed, 78 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
>> index fc230f180d0..68f24948134 100644
>> --- a/arch/arm/mach-k3/common.c
>> +++ b/arch/arm/mach-k3/common.c
>> @@ -31,6 +31,10 @@
>>  #include <dm/uclass-internal.h>
>>  #include <dm/device-internal.h>
>>  
>> +#define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT	0x00000001
>> +#define PROC_ID_MCU_R5FSS0_CORE1		0x02
>> +#define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP		0x00000100
>> +
>>  #include <asm/arch/k3-qos.h>
>>  
>>  struct ti_sci_handle *get_ti_sci_handle(void)
>> @@ -328,3 +332,54 @@ void setup_qos(void)
>>  		writel(qos_data[i].val, (uintptr_t)qos_data[i].reg);
>>  }
>>  #endif
>> +
>> +int shutdown_mcu_r5_core1(void)
>> +{
> Better to build this function only if CONFIG_ARM64 is enabled?


Thanks. Perhaps we can use __maybe_unused here as the invocation of this function is CONFIG protected. Will address in revision.

Thanks for the R/Bs,
Beleswar

>
>> +	struct ti_sci_handle *ti_sci = get_ti_sci_handle();
>> +	struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
>> +	struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
>> +	u32 dev_id_mcu_r5_core1 = put_core_ids[0];
>> +	u64 boot_vector;
>> +	u32 cfg, ctrl, sts;
>> +	int cluster_mode_lockstep, ret;
>> +
>> +	ret = proc_ops->proc_request(ti_sci, PROC_ID_MCU_R5FSS0_CORE1);
>> +	if (ret) {
>> +		printf("Unable to request processor control for core %d\n",
>> +		       PROC_ID_MCU_R5FSS0_CORE1);
>> +		return ret;
>> +	}
>> +
>> +	ret = proc_ops->get_proc_boot_status(ti_sci, PROC_ID_MCU_R5FSS0_CORE1,
>> +					     &boot_vector, &cfg, &ctrl, &sts);
>> +	if (ret) {
>> +		printf("Unable to get Processor boot status for core %d\n",
>> +		       PROC_ID_MCU_R5FSS0_CORE1);
>> +		goto release_proc_ctrl;
>> +	}
>> +
>> +	/* Shutdown MCU R5F Core 1 only if the cluster is booted in SplitMode */
>> +	cluster_mode_lockstep = !!(cfg & PROC_BOOT_CFG_FLAG_R5_LOCKSTEP);
>> +	if (cluster_mode_lockstep) {
>> +		ret = -EINVAL;
>> +		goto release_proc_ctrl;
>> +	}
>> +
>> +	ret = proc_ops->set_proc_boot_ctrl(ti_sci, PROC_ID_MCU_R5FSS0_CORE1,
>> +					   PROC_BOOT_CTRL_FLAG_R5_CORE_HALT, 0);
>> +	if (ret) {
>> +		printf("Unable to Halt core %d\n", PROC_ID_MCU_R5FSS0_CORE1);
>> +		goto release_proc_ctrl;
>> +	}
>> +
>> +	ret = dev_ops->put_device(ti_sci, dev_id_mcu_r5_core1);
>> +	if (ret) {
>> +		printf("Unable to assert reset on core %d\n",
>> +		       PROC_ID_MCU_R5FSS0_CORE1);
>> +		return ret;
>> +	}
>> +
>> +release_proc_ctrl:
>> +	proc_ops->proc_release(ti_sci, PROC_ID_MCU_R5FSS0_CORE1);
>> +	return ret;
>> +}
>> diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
>> index 02c74731fea..6e33f578151 100644
>> --- a/arch/arm/mach-k3/common.h
>> +++ b/arch/arm/mach-k3/common.h
>> @@ -49,6 +49,7 @@ enum k3_device_type get_device_type(void);
>>  struct ti_sci_handle *get_ti_sci_handle(void);
>>  void do_board_detect(void);
>>  void ti_secure_image_check_binary(void **p_image, size_t *p_size);
>> +int shutdown_mcu_r5_core1(void);
>>  
>>  #if (IS_ENABLED(CONFIG_K3_QOS))
>>  void setup_qos(void);
>> diff --git a/arch/arm/mach-k3/j721e/j721e_init.c b/arch/arm/mach-k3/j721e/j721e_init.c
>> index f31c20f7ed6..edca2634fb9 100644
>> --- a/arch/arm/mach-k3/j721e/j721e_init.c
>> +++ b/arch/arm/mach-k3/j721e/j721e_init.c
>> @@ -296,9 +296,9 @@ void do_dt_magic(void)
>>  
>>  void board_init_f(ulong dummy)
>>  {
>> +	int ret;
>>  #if defined(CONFIG_K3_J721E_DDRSS) || defined(CONFIG_K3_LOAD_SYSFW)
>>  	struct udevice *dev;
>> -	int ret;
>>  #endif
>>  	/*
>>  	 * Cannot delay this further as there is a chance that
>> @@ -371,6 +371,13 @@ void board_init_f(ulong dummy)
>>  	preloader_console_init();
>>  #endif
>>  
>> +	/* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
>> +	if (IS_ENABLED(CONFIG_ARM64)) {
>> +		ret = shutdown_mcu_r5_core1();
>> +		if (ret)
>> +			printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
>> +	}
>> +
>>  	/* Output System Firmware version info */
>>  	k3_sysfw_print_ver();
>>  
>> diff --git a/arch/arm/mach-k3/j721s2/j721s2_init.c b/arch/arm/mach-k3/j721s2/j721s2_init.c
>> index 5941fa26a95..6342161f830 100644
>> --- a/arch/arm/mach-k3/j721s2/j721s2_init.c
>> +++ b/arch/arm/mach-k3/j721s2/j721s2_init.c
>> @@ -230,6 +230,13 @@ void k3_spl_init(void)
>>  		remove_fwl_configs(navss_cbass0_fwls, ARRAY_SIZE(navss_cbass0_fwls));
>>  	}
>>  
>> +	/* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
>> +	if (IS_ENABLED(CONFIG_ARM64)) {
>> +		ret = shutdown_mcu_r5_core1();
>> +		if (ret)
>> +			printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
>> +	}
>> +
>>  	/* Output System Firmware version info */
>>  	k3_sysfw_print_ver();
>>  }
>> diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c
>> index 787cf6261e4..2756accbe12 100644
>> --- a/arch/arm/mach-k3/j784s4/j784s4_init.c
>> +++ b/arch/arm/mach-k3/j784s4/j784s4_init.c
>> @@ -206,6 +206,13 @@ void k3_spl_init(void)
>>  
>>  	writel(AUDIO_REFCLK1_DEFAULT, (uintptr_t)CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL);
>>  
>> +	/* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
>> +	if (IS_ENABLED(CONFIG_ARM64)) {
>> +		ret = shutdown_mcu_r5_core1();
>> +		if (ret)
>> +			printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
>> +	}
>> +
>>  	/* Output System Firmware version info */
>>  	k3_sysfw_print_ver();
>>  }

Re: [PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Tom Rini]

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On Thu, May 22, 2025 at 12:48:28PM +0530, Beleswar Padhi wrote:

> Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
> as the support to shut down core1 and use it for loading other firmware,
> while DM runs on core0, has been added.
> 
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
>  dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
>  dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
>  dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
>  .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)

Please don't post DONOTMERGE patches. If the series can be applied
without this patch, because the functionality is backwards compatible
put these changes in the cover letter or link to a gist or similar to
show how to test the changes locally. If the series can't be merged
until the DTS changes are ready too, please mark the whole thing as RFC.
For clarity, what is the case with this series?

-- 
Tom

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Re: [PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Nishanth Menon]

On 08:45-20250522, Tom Rini wrote:
> On Thu, May 22, 2025 at 12:48:28PM +0530, Beleswar Padhi wrote:
> 
> > Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
> > as the support to shut down core1 and use it for loading other firmware,
> > while DM runs on core0, has been added.
> > 
> > Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> > ---
> >  dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
> >  dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
> >  dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
> >  .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
> >  4 files changed, 4 insertions(+), 4 deletions(-)
> 
> Please don't post DONOTMERGE patches. If the series can be applied
> without this patch, because the functionality is backwards compatible
> put these changes in the cover letter or link to a gist or similar to
> show how to test the changes locally. If the series can't be merged
> until the DTS changes are ready too, please mark the whole thing as RFC.
> For clarity, what is the case with this series?

While I appreciate the energy to get upstream,
<vent>
I think this habit of jumping ahead of kernel should be
stopped.
https://lore.kernel.org/all/20250522073426.329344-1-b-padhi@ti.com/ was
posted, but not reviewed or accepted. I understand that there is a
latency in picking things up in upstream kernel, but creating churn is
not the right way of doing things. It took us an year+ to get
OF_UPSTREAM settled down. At least wait for kernel maintainers to queue
things up before attempting to sync u-boot with non-mainlined patches.
</vent>


-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

Re: [PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Beleswar Prasad Padhi]

Hi Tom,

On 5/22/2025 8:15 PM, Tom Rini wrote:
> On Thu, May 22, 2025 at 12:48:28PM +0530, Beleswar Padhi wrote:
>
>> Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
>> as the support to shut down core1 and use it for loading other firmware,
>> while DM runs on core0, has been added.
>>
>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>> ---
>>   dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
>>   dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
>>   dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
>>   .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
>>   4 files changed, 4 insertions(+), 4 deletions(-)
> Please don't post DONOTMERGE patches.


Noted. Will keep in mind from next time!

> If the series can be applied
> without this patch, because the functionality is backwards compatible
> put these changes in the cover letter or link to a gist or similar to
> show how to test the changes locally. If the series can't be merged
> until the DTS changes are ready too, please mark the whole thing as RFC.
> For clarity, what is the case with this series?


This series is independent of this patch and can be applied directly to 
U-Boot.
The DT patch is only needed to boot the cluster in split mode and test 
the functionality added here in this series.

Thanks,
Beleswar

Re: [PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Beleswar Prasad Padhi]

Hi Nishanth,

On 5/22/2025 9:18 PM, Nishanth Menon wrote:
> On 08:45-20250522, Tom Rini wrote:
>> On Thu, May 22, 2025 at 12:48:28PM +0530, Beleswar Padhi wrote:
>>
>>> Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
>>> as the support to shut down core1 and use it for loading other firmware,
>>> while DM runs on core0, has been added.
>>>
>>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>>> ---
>>>   dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
>>>   dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
>>>   dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
>>>   .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
>>>   4 files changed, 4 insertions(+), 4 deletions(-)
>> Please don't post DONOTMERGE patches. If the series can be applied
>> without this patch, because the functionality is backwards compatible
>> put these changes in the cover letter or link to a gist or similar to
>> show how to test the changes locally. If the series can't be merged
>> until the DTS changes are ready too, please mark the whole thing as RFC.
>> For clarity, what is the case with this series?
> While I appreciate the energy to get upstream,


Thanks :)

> <vent>
> I think this habit of jumping ahead of kernel should be
> stopped.
> https://lore.kernel.org/all/20250522073426.329344-1-b-padhi@ti.com/ was
> posted, but not reviewed or accepted. I understand that there is a
> latency in picking things up in upstream kernel, but creating churn is
> not the right way of doing things. It took us an year+ to get
> OF_UPSTREAM settled down. At least wait for kernel maintainers to queue
> things up before attempting to sync u-boot with non-mainlined patches.
> </vent>


Actually the functionality added in this series is independent of the DT 
patch. I posted this DT patch here as DONOTMERGE just so that folks can 
know how to test the functionality.

I understand your concern, and if it was the case that these changes 
were dependent on the DT, I would have waited until the DT patch is 
picked up before posting this series here.

Thanks,
Beleswar

>
>

Re: [PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Nishanth Menon]

On 12:05-20250523, Beleswar Prasad Padhi wrote:
> Hi Nishanth,
> 
> On 5/22/2025 9:18 PM, Nishanth Menon wrote:
> > On 08:45-20250522, Tom Rini wrote:
> > > On Thu, May 22, 2025 at 12:48:28PM +0530, Beleswar Padhi wrote:
> > > 
> > > > Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
> > > > as the support to shut down core1 and use it for loading other firmware,
> > > > while DM runs on core0, has been added.
> > > > 
> > > > Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> > > > ---
> > > >   dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
> > > >   dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
> > > >   dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
> > > >   .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
> > > >   4 files changed, 4 insertions(+), 4 deletions(-)
> > > Please don't post DONOTMERGE patches. If the series can be applied
> > > without this patch, because the functionality is backwards compatible
> > > put these changes in the cover letter or link to a gist or similar to
> > > show how to test the changes locally. If the series can't be merged
> > > until the DTS changes are ready too, please mark the whole thing as RFC.
> > > For clarity, what is the case with this series?
> > While I appreciate the energy to get upstream,
> 
> 
> Thanks :)
> 
> > <vent>
> > I think this habit of jumping ahead of kernel should be
> > stopped.
> > https://lore.kernel.org/all/20250522073426.329344-1-b-padhi@ti.com/ was
> > posted, but not reviewed or accepted. I understand that there is a
> > latency in picking things up in upstream kernel, but creating churn is
> > not the right way of doing things. It took us an year+ to get
> > OF_UPSTREAM settled down. At least wait for kernel maintainers to queue
> > things up before attempting to sync u-boot with non-mainlined patches.
> > </vent>
> 
> 
> Actually the functionality added in this series is independent of the DT
> patch. I posted this DT patch here as DONOTMERGE just so that folks can know
> how to test the functionality.
> 
> I understand your concern, and if it was the case that these changes were
> dependent on the DT, I would have waited until the DT patch is picked up
> before posting this series here.

use gist next time if your intent is to show how to test it.. Let us
continue the discussion on the kernel list for the dts portion

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

Re: [PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Tom Rini]

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On Fri, May 23, 2025 at 06:54:00AM -0500, Nishanth Menon wrote:
> On 12:05-20250523, Beleswar Prasad Padhi wrote:
> > Hi Nishanth,
> > 
> > On 5/22/2025 9:18 PM, Nishanth Menon wrote:
> > > On 08:45-20250522, Tom Rini wrote:
> > > > On Thu, May 22, 2025 at 12:48:28PM +0530, Beleswar Padhi wrote:
> > > > 
> > > > > Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
> > > > > as the support to shut down core1 and use it for loading other firmware,
> > > > > while DM runs on core0, has been added.
> > > > > 
> > > > > Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> > > > > ---
> > > > >   dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
> > > > >   dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
> > > > >   dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
> > > > >   .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
> > > > >   4 files changed, 4 insertions(+), 4 deletions(-)
> > > > Please don't post DONOTMERGE patches. If the series can be applied
> > > > without this patch, because the functionality is backwards compatible
> > > > put these changes in the cover letter or link to a gist or similar to
> > > > show how to test the changes locally. If the series can't be merged
> > > > until the DTS changes are ready too, please mark the whole thing as RFC.
> > > > For clarity, what is the case with this series?
> > > While I appreciate the energy to get upstream,
> > 
> > 
> > Thanks :)
> > 
> > > <vent>
> > > I think this habit of jumping ahead of kernel should be
> > > stopped.
> > > https://lore.kernel.org/all/20250522073426.329344-1-b-padhi@ti.com/ was
> > > posted, but not reviewed or accepted. I understand that there is a
> > > latency in picking things up in upstream kernel, but creating churn is
> > > not the right way of doing things. It took us an year+ to get
> > > OF_UPSTREAM settled down. At least wait for kernel maintainers to queue
> > > things up before attempting to sync u-boot with non-mainlined patches.
> > > </vent>
> > 
> > 
> > Actually the functionality added in this series is independent of the DT
> > patch. I posted this DT patch here as DONOTMERGE just so that folks can know
> > how to test the functionality.
> > 
> > I understand your concern, and if it was the case that these changes were
> > dependent on the DT, I would have waited until the DT patch is picked up
> > before posting this series here.
> 
> use gist next time if your intent is to show how to test it.. Let us
> continue the discussion on the kernel list for the dts portion

So it sounds like the bindings being used here aren't settled then? I'm
going to mark the whole series as RFC for now then, if so.

-- 
Tom

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Re: [PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Nishanth Menon]

On 08:09-20250523, Tom Rini wrote:
> On Fri, May 23, 2025 at 06:54:00AM -0500, Nishanth Menon wrote:
> > On 12:05-20250523, Beleswar Prasad Padhi wrote:
> > > Hi Nishanth,
> > > 
> > > On 5/22/2025 9:18 PM, Nishanth Menon wrote:
> > > > On 08:45-20250522, Tom Rini wrote:
> > > > > On Thu, May 22, 2025 at 12:48:28PM +0530, Beleswar Padhi wrote:
> > > > > 
> > > > > > Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
> > > > > > as the support to shut down core1 and use it for loading other firmware,
> > > > > > while DM runs on core0, has been added.
> > > > > > 
> > > > > > Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> > > > > > ---
> > > > > >   dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
> > > > > >   dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
> > > > > >   dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
> > > > > >   .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
> > > > > >   4 files changed, 4 insertions(+), 4 deletions(-)
> > > > > Please don't post DONOTMERGE patches. If the series can be applied
> > > > > without this patch, because the functionality is backwards compatible
> > > > > put these changes in the cover letter or link to a gist or similar to
> > > > > show how to test the changes locally. If the series can't be merged
> > > > > until the DTS changes are ready too, please mark the whole thing as RFC.
> > > > > For clarity, what is the case with this series?
> > > > While I appreciate the energy to get upstream,
> > > 
> > > 
> > > Thanks :)
> > > 
> > > > <vent>
> > > > I think this habit of jumping ahead of kernel should be
> > > > stopped.
> > > > https://lore.kernel.org/all/20250522073426.329344-1-b-padhi@ti.com/ was
> > > > posted, but not reviewed or accepted. I understand that there is a
> > > > latency in picking things up in upstream kernel, but creating churn is
> > > > not the right way of doing things. It took us an year+ to get
> > > > OF_UPSTREAM settled down. At least wait for kernel maintainers to queue
> > > > things up before attempting to sync u-boot with non-mainlined patches.
> > > > </vent>
> > > 
> > > 
> > > Actually the functionality added in this series is independent of the DT
> > > patch. I posted this DT patch here as DONOTMERGE just so that folks can know
> > > how to test the functionality.
> > > 
> > > I understand your concern, and if it was the case that these changes were
> > > dependent on the DT, I would have waited until the DT patch is picked up
> > > before posting this series here.
> > 
> > use gist next time if your intent is to show how to test it.. Let us
> > continue the discussion on the kernel list for the dts portion
> 
> So it sounds like the bindings being used here aren't settled then? I'm
> going to mark the whole series as RFC for now then, if so.

No change in bindings. Just the approach in this "easy to reproduce"
patch does the change on SoC dtsi. I dont think that was the author's
intent (and yes, i was confused as well). The question in kernel at
least is organizing this in the right board dts/overlay methodology.

Question then is: do we wait for kernel dts to settle down OR do we get
the u-boot infra for handling these combinations ahead of the changes
(more or less like do we do the driver fixes first or dts fixes first?
 in kernel at least, we do the driver fixes first)..
-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

Re: [PATCH 6/6] DONOTMERGE: arm: dts: k3-j7*-mcu-wakeup: Enable split mode for MCU R5

[Tom Rini]

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On Fri, May 23, 2025 at 09:54:47AM -0500, Nishanth Menon wrote:
> On 08:09-20250523, Tom Rini wrote:
> > On Fri, May 23, 2025 at 06:54:00AM -0500, Nishanth Menon wrote:
> > > On 12:05-20250523, Beleswar Prasad Padhi wrote:
> > > > Hi Nishanth,
> > > > 
> > > > On 5/22/2025 9:18 PM, Nishanth Menon wrote:
> > > > > On 08:45-20250522, Tom Rini wrote:
> > > > > > On Thu, May 22, 2025 at 12:48:28PM +0530, Beleswar Padhi wrote:
> > > > > > 
> > > > > > > Previously, MCU R5F runs in lockstep mode. Enable split-mode on MCU R5F
> > > > > > > as the support to shut down core1 and use it for loading other firmware,
> > > > > > > while DM runs on core0, has been added.
> > > > > > > 
> > > > > > > Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> > > > > > > ---
> > > > > > >   dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi              | 2 +-
> > > > > > >   dts/upstream/src/arm64/ti/k3-j721e-mcu-wakeup.dtsi              | 2 +-
> > > > > > >   dts/upstream/src/arm64/ti/k3-j721s2-mcu-wakeup.dtsi             | 2 +-
> > > > > > >   .../src/arm64/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi        | 2 +-
> > > > > > >   4 files changed, 4 insertions(+), 4 deletions(-)
> > > > > > Please don't post DONOTMERGE patches. If the series can be applied
> > > > > > without this patch, because the functionality is backwards compatible
> > > > > > put these changes in the cover letter or link to a gist or similar to
> > > > > > show how to test the changes locally. If the series can't be merged
> > > > > > until the DTS changes are ready too, please mark the whole thing as RFC.
> > > > > > For clarity, what is the case with this series?
> > > > > While I appreciate the energy to get upstream,
> > > > 
> > > > 
> > > > Thanks :)
> > > > 
> > > > > <vent>
> > > > > I think this habit of jumping ahead of kernel should be
> > > > > stopped.
> > > > > https://lore.kernel.org/all/20250522073426.329344-1-b-padhi@ti.com/ was
> > > > > posted, but not reviewed or accepted. I understand that there is a
> > > > > latency in picking things up in upstream kernel, but creating churn is
> > > > > not the right way of doing things. It took us an year+ to get
> > > > > OF_UPSTREAM settled down. At least wait for kernel maintainers to queue
> > > > > things up before attempting to sync u-boot with non-mainlined patches.
> > > > > </vent>
> > > > 
> > > > 
> > > > Actually the functionality added in this series is independent of the DT
> > > > patch. I posted this DT patch here as DONOTMERGE just so that folks can know
> > > > how to test the functionality.
> > > > 
> > > > I understand your concern, and if it was the case that these changes were
> > > > dependent on the DT, I would have waited until the DT patch is picked up
> > > > before posting this series here.
> > > 
> > > use gist next time if your intent is to show how to test it.. Let us
> > > continue the discussion on the kernel list for the dts portion
> > 
> > So it sounds like the bindings being used here aren't settled then? I'm
> > going to mark the whole series as RFC for now then, if so.
> 
> No change in bindings. Just the approach in this "easy to reproduce"
> patch does the change on SoC dtsi. I dont think that was the author's
> intent (and yes, i was confused as well). The question in kernel at
> least is organizing this in the right board dts/overlay methodology.
> 
> Question then is: do we wait for kernel dts to settle down OR do we get
> the u-boot infra for handling these combinations ahead of the changes
> (more or less like do we do the driver fixes first or dts fixes first?
>  in kernel at least, we do the driver fixes first)..

As the author said there's no functional regressions / etc with the rest
of the series, yes, I can pickup 1-5 for -next in due time, assuming no
feedback on the changes themselves.

-- 
Tom

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