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From: Anshul Dalal <anshuld@ti.com>
To: <u-boot@lists.denx.de>
Cc: Anshul Dalal <anshuld@ti.com>, <d-gole@ti.com>, <b-padhi@ti.com>,
	<vigneshr@ti.com>, <trini@konsulko.com>, <nm@ti.com>,
	<robertcnelson@gmail.com>, <w.egorov@phytec.de>,
	<francesco.dolcini@toradex.com>, <ggiordano@phytec.com>,
	<m-chawdhry@ti.com>, <afd@ti.com>, <bb@ti.com>, <u-kumar1@ti.com>,
	<devarsht@ti.com>, <ilias.apalodimas@linaro.org>,
	<xypron.glpk@gmx.de>
Subject: [PATCH v11 04/11] arm: armv8: invalidate dcache entries on dcache_enable
Date: Fri, 17 Oct 2025 18:45:26 +0530	[thread overview]
Message-ID: <20251017131540.3636067-5-anshuld@ti.com> (raw)
In-Reply-To: <20251017131540.3636067-1-anshuld@ti.com>

In dcache_enable, currently the dcache entries are only invalidated when
the MMU is not enabled. This causes issues when dcache_enable is called
with the MMU already configured, in such cases the existing dcache
entries are not flushed which might result in un-expected behavior.

This patch invalidates the cache entries on every call of dcache_enable
before enabling dcache (by setting CR_C). This makes dcache_enable
behave similar to icache_enable as well.

Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
---
 arch/arm/cpu/armv8/cache_v8.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index a7899857658..74c78cb2fb0 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -830,16 +830,15 @@ void flush_dcache_range(unsigned long start, unsigned long stop)
 void dcache_enable(void)
 {
 	/* The data cache is not active unless the mmu is enabled */
-	if (!(get_sctlr() & CR_M)) {
-		invalidate_dcache_all();
-		__asm_invalidate_tlb_all();
+	if (!mmu_status())
 		mmu_setup();
-	}
 
 	/* Set up page tables only once (it is done also by mmu_setup()) */
 	if (!gd->arch.tlb_fillptr)
 		setup_all_pgtables();
 
+	invalidate_dcache_all();
+	__asm_invalidate_tlb_all();
 	set_sctlr(get_sctlr() | CR_C);
 }
 
-- 
2.51.0


  parent reply	other threads:[~2025-10-17 13:16 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-17 13:15 [PATCH v11 00/11] Add support for dynamic MMU configuration Anshul Dalal
2025-10-17 13:15 ` [PATCH v11 01/11] mach-k3: use minimal memory map for all K3 Anshul Dalal
2025-10-17 13:15 ` [PATCH v11 02/11] mach-k3: use custom enable_cache Anshul Dalal
2025-10-17 13:15 ` [PATCH v11 03/11] arm: armv8: mmu: export mmu_setup Anshul Dalal
2025-10-17 13:15 ` Anshul Dalal [this message]
2025-10-17 13:15 ` [PATCH v11 05/11] arm: armv8: mmu: add mem_map_from_dram_banks Anshul Dalal
2025-10-17 13:15 ` [PATCH v11 06/11] mach-k3: map all banks using mem_map_from_dram_banks Anshul Dalal
2025-10-17 13:15 ` [PATCH v11 07/11] arm: armv8: mmu: add mmu_unmap_reserved_mem Anshul Dalal
2025-10-17 13:15 ` [PATCH v11 08/11] spl: split spl_board_fixups to arch/board specific Anshul Dalal
2025-10-17 13:15 ` [PATCH v11 09/11] mach-k3: add reserved memory fixups for next boot stage Anshul Dalal
2025-10-17 13:15 ` [PATCH v11 10/11] mach-k3: add carveouts for TFA and optee Anshul Dalal
2025-10-17 13:15 ` [PATCH v11 11/11] arm: mach-k3: reserve space for page table entries Anshul Dalal
2025-10-22 20:14 ` [PATCH v11 00/11] Add support for dynamic MMU configuration Tom Rini
2025-10-27 16:52 ` [REGRESSION] " Francesco Dolcini
2025-10-28  4:38   ` Anshul Dalal
2025-10-28 16:56     ` Emanuele Ghidoli
2025-10-29  8:58       ` Anshul Dalal
2025-10-31 11:00         ` Emanuele Ghidoli
2025-10-31 11:43           ` Anshul Dalal

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