* [PATCH v2] SDRAM Calibration Failed fix for GEN5 SoCFPGA
@ 2025-11-25 12:24 Brian Sune
0 siblings, 0 replies; only message in thread
From: Brian Sune @ 2025-11-25 12:24 UTC (permalink / raw)
To: Quentin Schulz, Tom Rini, u-boot
New SPL introduce cyclic and without initial
the interrupt of SDRAM calibration could fail.
Initialize the default CYCLIC setup fix it.
Signed-off-by: Brian Sune <briansune@gmail.com>
---
arch/arm/mach-socfpga/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index f2e959b5662..4011fe4784b 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -117,6 +117,9 @@ config TARGET_SOCFPGA_CYCLONE5
config TARGET_SOCFPGA_GEN5
bool
+ select CMD_CYCLIC
+ select CYCLIC
+ select SPL_CYCLIC
select SPL_ALTERA_SDRAM
imply FPGA_SOCFPGA
imply SPL_SIZE_LIMIT_SUBTRACT_GD
--
2.34.1
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