From: Tom Rini <trini@konsulko.com>
To: Brian Sune <briansune@gmail.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>,
Chee Tien Fong <tienfong.chee@altera.com>,
u-boot@lists.denx.de
Subject: Re: [PATCH v2] Fix socfpga GEN5 boot by spl+u-boot sfp on RAW
Date: Mon, 1 Dec 2025 10:51:22 -0600 [thread overview]
Message-ID: <20251201165122.GH303283@bill-the-cat> (raw)
In-Reply-To: <20251129064818.1587-1-briansune@gmail.com>
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On Sat, Nov 29, 2025 at 02:48:18PM +0800, Brian Sune wrote:
> Thanks to Jan Kiszka had provided info on
> u-boot is not able to boot by u-boot-with-spl.sfp.
>
> All three TYPE, NUM, OFFSET mode methods
> are nonfunctional on combined raw boot.
>
> The major cause is spl+u-boot structure is
> defined as 4x[spl+zero_pad] + u-boot.img.
> Deal to this configuration since GEN5 is used,
> the spl would require to seek by an offset
> on top of the spl offset. This means for
> each spl=0x10000 the offset is 0x40000.
>
> However latest u-boot do not consider this
> major structure on GEN5 socfpga.
> Meanwhile, the default include file as Jan
> pointed out is completely wrong syntax and
> caused issue.
>
> Combining both concepts, the minimum fix
> patch is provide as follows.
>
> 1) Offset is control and default set to a
> proper offset under:
> SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET
>
> 2) Only GEN5 socfpga will be affected and
> minimized contamination on other devices.
>
> 3) Only one compuatation adjustment is made
> on spl_mmc_load. And simply introduce the
> offset adding by the kconfig offset control.
> It should be 0 by default and gate as well.
> So no possible harm should be done.
This sounds like a tricky problem to solve in a "nice" looking way.
The first thing that's unclear to me is, which of
SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR,
SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION or
SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is being used here?
--
Tom
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next prev parent reply other threads:[~2025-12-01 16:51 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-29 6:48 [PATCH v2] Fix socfpga GEN5 boot by spl+u-boot sfp on RAW Brian Sune
2025-12-01 7:45 ` Jan Kiszka
2025-12-01 8:50 ` Sune Brian
2025-12-01 16:51 ` Tom Rini [this message]
2025-12-01 17:01 ` Sune Brian
2025-12-01 17:05 ` Tom Rini
2025-12-01 17:14 ` Sune Brian
2025-12-01 17:47 ` Tom Rini
2025-12-01 17:50 ` Sune Brian
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