From: Emanuele Ghidoli <ghidoliemanuele@gmail.com>
To: Francesco Dolcini <francesco.dolcini@toradex.com>,
Tom Rini <trini@konsulko.com>
Cc: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>, u-boot@lists.denx.de
Subject: [PATCH v1 1/2] board: toradex: aquila-am69: Fix 16GB dual-rank DDR configuration
Date: Tue, 21 Apr 2026 17:15:55 +0200 [thread overview]
Message-ID: <20260421151604.1141082-2-ghidoliemanuele@gmail.com> (raw)
In-Reply-To: <20260421151604.1141082-1-ghidoliemanuele@gmail.com>
From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
The 16GB dual-rank DDR configuration uses an incorrect DDRSS_PLL_FHS_CNT
value. This makes DDR initialization hang during the DDR frequency
handshake sequence.
Update DDRSS_PLL_FHS_CNT to the correct value for the 16GB dual-rank
configuration.
Fixes: 39e014f43a15 ("board: toradex: aquila-am69: Add support for 16GB dual rank memory configuration")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
---
board/toradex/aquila-am69/aquila_ddrs_16GB_rank_2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/toradex/aquila-am69/aquila_ddrs_16GB_rank_2.c b/board/toradex/aquila-am69/aquila_ddrs_16GB_rank_2.c
index c24e22b620b5..66e800ef7c89 100644
--- a/board/toradex/aquila-am69/aquila_ddrs_16GB_rank_2.c
+++ b/board/toradex/aquila-am69/aquila_ddrs_16GB_rank_2.c
@@ -14,7 +14,7 @@
#include <linux/kernel.h>
#include "ddrs_patch.h"
-#define DDRSS_PLL_FHS_CNT 3
+#define DDRSS_PLL_FHS_CNT 5
#define DDRSS_CTL_268_DATA 0x01010000
#define DDRSS_CTL_270_DATA 0x00000FFF
--
2.43.0
next prev parent reply other threads:[~2026-04-21 15:16 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-21 15:15 [PATCH v1 0/2] board: toradex: aquila-am69: Fix 16GB dual-rank DDR cfg and memory size detection Emanuele Ghidoli
2026-04-21 15:15 ` Emanuele Ghidoli [this message]
2026-04-21 15:15 ` [PATCH v1 2/2] board: toradex: aquila-am69: Fix memory size setup logic Emanuele Ghidoli
2026-04-21 15:41 ` [PATCH v1 0/2] board: toradex: aquila-am69: Fix 16GB dual-rank DDR cfg and memory size detection Francesco Dolcini
2026-04-27 19:42 ` Tom Rini
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