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From: Josh Law <josh2@disroot.org>
To: u-boot@lists.denx.de
Cc: Tom Rini <trini@konsulko.com>,
	Ilias Apalodimas <ilias.apalodimas@linaro.org>,
	Josh Law <josh2@disroot.org>
Subject: [PATCH 0/1] armv8: reduce core errata dispatch work
Date: Sun, 24 May 2026 12:38:21 +0000	[thread overview]
Message-ID: <20260524123822.7244-1-josh2@disroot.org> (raw)

Hey folks,

apply_core_errata() runs during early ARMv8 CPU entry, before
lowlevel_init(). Today it still checks the Cortex-A53 and Cortex-A57
paths even when the build has no matching core erratum enabled.

This patch leaves that dispatch code out unless one of the supported
errata is enabled. For the A57 errata case, it reads MIDR_EL1 once and
reuses the extracted CPU part number.

The erratum register writes stay behind the same CPU checks as before.
For qemu_arm64_defconfig, where none of these errata are enabled,
apply_core_errata() goes from 15 dispatch instructions to a single ret.
For ls2080aqds_qspi_defconfig, which keeps the A57 path, the dispatch
side goes from 33 instructions to 26. A KVM microbench of the same
dispatch sequences showed 1.30x for the no errata case and 1.09x for
the A57 miss case.

Josh Law (1):
  armv8: reduce core errata dispatch work

 arch/arm/cpu/armv8/start.S | 35 ++++++++++++++++++++++++-----------
 1 file changed, 24 insertions(+), 11 deletions(-)

-- 
2.47.3

             reply	other threads:[~2026-05-24 12:38 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-24 12:38 Josh Law [this message]
2026-05-24 12:38 ` [PATCH 1/1] armv8: reduce core errata dispatch work Josh Law
2026-05-26  6:01 ` [PATCH 0/1] " Krzysztof Kozlowski
2026-05-26 11:11   ` Ilias Apalodimas
2026-05-26 11:48     ` Josh Law
2026-05-26 14:03   ` Tom Rini

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