[PATCH 0/2] board: toradex: smarc-imx95/aquila-imx95: detect RAM sizes

[PATCH 0/2] board: toradex: smarc-imx95/aquila-imx95: detect RAM sizes

[Emanuele Ghidoli]

From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

Use alias-based RAM probing to detect different memory configurations
on Toradex iMX95 modules using LPDDR5. The address wrap-around is not
linear on LPDDR5 modules: address bits above the module capacity
alias back with some low address bits XORed (bit 32 -> XOR 0xc000),
as measured on 4GB and 8GB modules.

Emanuele Ghidoli (2):
  board: toradex: smarc-imx95: detect RAM sizes
  board: toradex: aquila-imx95: detect RAM sizes

 board/toradex/aquila-imx95/aquila-imx95.c | 23 ++++++++++++++++++++++-
 board/toradex/smarc-imx95/smarc-imx95.c   | 23 ++++++++++++++++++++++-
 include/configs/aquila-imx95.h            | 15 +++++++++------
 include/configs/toradex-smarc-imx95.h     | 15 +++++++++------
 4 files changed, 62 insertions(+), 14 deletions(-)

-- 
2.43.0

[PATCH 1/2] board: toradex: smarc-imx95: detect RAM sizes

[Emanuele Ghidoli]

From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

Use alias-based RAM probing to detect different memory configurations
on Toradex SMARC iMX95. The address wrap-around is not linear: address
bits above the module capacity alias back with some low address bits
XORed (bit 32 -> XOR 0xc000), as measured on 4GB and 8GB modules.

During probing, skip the first 256MB, since that region is reserved.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
---
 board/toradex/smarc-imx95/smarc-imx95.c | 23 ++++++++++++++++++++++-
 include/configs/toradex-smarc-imx95.h   | 15 +++++++++------
 2 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/board/toradex/smarc-imx95/smarc-imx95.c b/board/toradex/smarc-imx95/smarc-imx95.c
index 6040c49975a3..d09ce8a52abe 100644
--- a/board/toradex/smarc-imx95/smarc-imx95.c
+++ b/board/toradex/smarc-imx95/smarc-imx95.c
@@ -3,14 +3,35 @@
 
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <errno.h>
 #include <fdt_support.h>
 #include <init.h>
 
 #include "../common/tdx-cfg-block.h"
 
+/*
+ * The address wrap-around is not linear: address bits above the module
+ * capacity alias back to the base with some low address bits XORed, as
+ * measured on 4GB and 8GB modules (bit 32 -> XOR 0xc000, bit 33 -> XOR
+ * 0x2000).
+ */
+static const struct ram_alias_check ram_alias_checks[] = {
+	{ (void *)((uintptr_t)PHYS_SDRAM + SZ_4G), (void *)((uintptr_t)PHYS_SDRAM + 0xc000), SZ_8G },
+	{ (void *)((uintptr_t)PHYS_SDRAM + SZ_2G), (void *)(PHYS_SDRAM), SZ_4G },
+	{ NULL }
+};
+
 int board_phys_sdram_size(phys_size_t *size)
 {
-	*size = PHYS_SDRAM_SIZE + PHYS_SDRAM_2_SIZE;
+	phys_size_t sz;
+
+	sz = probe_ram_size_by_alias(ram_alias_checks);
+	if (!sz) {
+		puts("## WARNING: Less than 4GB RAM detected\n");
+		return -EINVAL;
+	}
+
+	*size = sz - PHYS_SDRAM_FW_RSVD;
 
 	return 0;
 }
diff --git a/include/configs/toradex-smarc-imx95.h b/include/configs/toradex-smarc-imx95.h
index 8a880b965038..97e3322ac282 100644
--- a/include/configs/toradex-smarc-imx95.h
+++ b/include/configs/toradex-smarc-imx95.h
@@ -7,16 +7,19 @@
 #include <linux/sizes.h>
 #include <asm/arch/imx-regs.h>
 
-/* module has 8GB, 2GB from 0x80000000..0xffffffff, 6GB above */
+/* module has 8GB, 2GB from 0x80000000..0xffffffff, 6GB above.
+ * Actual size is determined at runtime.
+ */
 #define SZ_6G	_AC(0x180000000, ULL)
 
-/* first 256MB reserved for firmware */
-#define CFG_SYS_INIT_RAM_ADDR	0x90000000
+/* The first 256MB of SDRAM is reserved for firmware (Cortex M7) */
+#define PHYS_SDRAM_FW_RSVD	SZ_256M
+#define CFG_SYS_INIT_RAM_ADDR	PHYS_SDRAM
 #define CFG_SYS_INIT_RAM_SIZE	SZ_2M
 
-#define CFG_SYS_SDRAM_BASE	0x90000000
-#define PHYS_SDRAM		0x90000000
-#define PHYS_SDRAM_SIZE		(SZ_2G - SZ_256M)
+#define CFG_SYS_SDRAM_BASE	PHYS_SDRAM
+#define PHYS_SDRAM		(0x80000000 + PHYS_SDRAM_FW_RSVD)
+#define PHYS_SDRAM_SIZE		(SZ_2G - PHYS_SDRAM_FW_RSVD)
 #define PHYS_SDRAM_2_SIZE	SZ_6G
 
 #endif
-- 
2.43.0

[PATCH 2/2] board: toradex: aquila-imx95: detect RAM sizes

[Emanuele Ghidoli]

From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

Use alias-based RAM probing to detect different memory configurations
on Toradex Aquila iMX95. The address wrap-around is not linear: address
bits above the module capacity alias back with some low address bits
XORed (bit 32 -> XOR 0xc000), as measured on 4GB and 8GB modules.

During probing, skip the first 256MB, since that region is reserved.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
---
 board/toradex/aquila-imx95/aquila-imx95.c | 23 ++++++++++++++++++++++-
 include/configs/aquila-imx95.h            | 15 +++++++++------
 2 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/board/toradex/aquila-imx95/aquila-imx95.c b/board/toradex/aquila-imx95/aquila-imx95.c
index 0c6473e4b3a5..a5b26ef3dc3b 100644
--- a/board/toradex/aquila-imx95/aquila-imx95.c
+++ b/board/toradex/aquila-imx95/aquila-imx95.c
@@ -3,14 +3,35 @@
 
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <errno.h>
 #include <fdt_support.h>
 #include <init.h>
 
 #include "../common/tdx-cfg-block.h"
 
+/*
+ * The address wrap-around is not linear: address bits above the module
+ * capacity alias back to the base with some low address bits XORed, as
+ * measured on 4GB and 8GB modules (bit 32 -> XOR 0xc000, bit 33 -> XOR
+ * 0x2000).
+ */
+static const struct ram_alias_check ram_alias_checks[] = {
+	{ (void *)((uintptr_t)PHYS_SDRAM + SZ_4G), (void *)((uintptr_t)PHYS_SDRAM + 0xc000), SZ_8G },
+	{ (void *)((uintptr_t)PHYS_SDRAM + SZ_2G), (void *)(PHYS_SDRAM), SZ_4G },
+	{ NULL }
+};
+
 int board_phys_sdram_size(phys_size_t *size)
 {
-	*size = PHYS_SDRAM_SIZE + PHYS_SDRAM_2_SIZE;
+	phys_size_t sz;
+
+	sz = probe_ram_size_by_alias(ram_alias_checks);
+	if (!sz) {
+		puts("## WARNING: Less than 4GB RAM detected\n");
+		return -EINVAL;
+	}
+
+	*size = sz - PHYS_SDRAM_FW_RSVD;
 
 	return 0;
 }
diff --git a/include/configs/aquila-imx95.h b/include/configs/aquila-imx95.h
index 07d09d138cb3..96c11ff2d5bf 100644
--- a/include/configs/aquila-imx95.h
+++ b/include/configs/aquila-imx95.h
@@ -10,16 +10,19 @@
 #define CFG_SYS_UBOOT_BASE	\
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
-/* module has 8GB, 2GB from 0x80000000..0xffffffff, 6GB above */
+/* module has 8GB, 2GB from 0x80000000..0xffffffff, 6GB above.
+ * Actual size is determined at runtime.
+ */
 #define SZ_6G	_AC(0x180000000, ULL)
 
-/* first 256MB reserved for firmware */
-#define CFG_SYS_INIT_RAM_ADDR	0x90000000
+/* The first 256MB of SDRAM is reserved for firmware (Cortex M7) */
+#define PHYS_SDRAM_FW_RSVD	SZ_256M
+#define CFG_SYS_INIT_RAM_ADDR	PHYS_SDRAM
 #define CFG_SYS_INIT_RAM_SIZE	SZ_2M
 
-#define CFG_SYS_SDRAM_BASE	0x90000000
-#define PHYS_SDRAM		0x90000000
-#define PHYS_SDRAM_SIZE		(SZ_2G - SZ_256M)
+#define CFG_SYS_SDRAM_BASE	PHYS_SDRAM
+#define PHYS_SDRAM		(0x80000000 + PHYS_SDRAM_FW_RSVD)
+#define PHYS_SDRAM_SIZE		(SZ_2G - PHYS_SDRAM_FW_RSVD)
 #define PHYS_SDRAM_2_SIZE	SZ_6G
 
 #define CFG_SYS_SECURE_SDRAM_BASE	0x8A000000 /* Secure DDR region for A55, SPL could use first 2MB */
-- 
2.43.0

Re: [PATCH 0/2] board: toradex: smarc-imx95/aquila-imx95: detect RAM sizes

[Francesco Dolcini]

On Fri, Jul 10, 2026 at 03:39:07PM +0200, Emanuele Ghidoli wrote:
> From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
> 
> Use alias-based RAM probing to detect different memory configurations
> on Toradex iMX95 modules using LPDDR5. The address wrap-around is not
> linear on LPDDR5 modules: address bits above the module capacity
> alias back with some low address bits XORed (bit 32 -> XOR 0xc000),
> as measured on 4GB and 8GB modules.
> 

Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>