* [PATCH] mmc: sunxi: Fix mod clock register offset for the A80
@ 2026-07-22 16:21 Sören Hantel
2026-07-26 22:41 ` Andre Przywara
0 siblings, 1 reply; 4+ messages in thread
From: Sören Hantel @ 2026-07-22 16:21 UTC (permalink / raw)
To: u-boot
Cc: Peng Fan, Jaehoon Chung, Andre Przywara, Tom Rini,
Sören Hantel, Claude Fable 5
get_mclk_offset() checks CONFIG_MACH_SUN9I_A80, but no such Kconfig
symbol exists - the A80 is covered by CONFIG_MACH_SUN9I. The check
therefore always fails and the function falls through to the default
offset 0x88, which lies in a reserved region of the A80 CCU. All mod
clock writes from U-Boot proper end up there and are silently lost,
so the SD/MMC controllers keep running at whatever clock the
SPL/BROM left behind.
For the eMMC on SDC2 that means card identification runs at the
~48 MHz the SPL used for loading U-Boot instead of 400 kHz: short
responses still limp along, but long (R2) responses are received as
all-ones, CMD2/ALL_SEND_CID fails and mmc_init() returns -110. This
went unnoticed for years because the SPL uses the legacy code path
with a hardcoded mclk address, so booting *from* eMMC still worked -
only U-Boot proper could never access the eMMC on sun9i.
Use the correct Kconfig symbol so the mod clock writes reach the SDC
clock registers at CCU offset 0x410.
Tested on a Cubietech Cubieboard4: eMMC identification now succeeds
and distro boot from the eMMC works.
Fixes: 0237b3047e25 ("mmc: sunxi: Refactor mod clock register offset")
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Signed-off-by: Sören Hantel <fugininsane@googlemail.com>
---
drivers/mmc/sunxi_mmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index e28c81af..623393fc 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -663,7 +663,7 @@ static const struct dm_mmc_ops sunxi_mmc_ops = {
static unsigned get_mclk_offset(void)
{
- if (IS_ENABLED(CONFIG_MACH_SUN9I_A80))
+ if (IS_ENABLED(CONFIG_MACH_SUN9I))
return 0x410;
if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
--
2.43.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] mmc: sunxi: Fix mod clock register offset for the A80
2026-07-22 16:21 [PATCH] mmc: sunxi: Fix mod clock register offset for the A80 Sören Hantel
@ 2026-07-26 22:41 ` Andre Przywara
2026-07-27 0:32 ` Sören Hantel
0 siblings, 1 reply; 4+ messages in thread
From: Andre Przywara @ 2026-07-26 22:41 UTC (permalink / raw)
To: Sören Hantel
Cc: u-boot, Peng Fan, Jaehoon Chung, Tom Rini, Sören Hantel,
Omar Ivan Fardjoume
On Wed, 22 Jul 2026 18:21:26 +0200
"Sören Hantel" <fugininsane@gmail.com> wrote:
Hi Sören,
I just realised why this problem was so familiar: Omar had sent
basically the same patch in April[1], and I queued it for the next merge
window (which is now).
[1]
https://lore.kernel.org/u-boot/CAM+fx6Ny0ncWr=6nxTWpy_VpaRj-R4pkU_fNcVEdK-B35O4GSg@mail.gmail.com/T/#u
So apologies, but this means that Omar's patch wins.
Many thanks for caring and sending the patch upstream. It looks
like the A80 still lacks some functionality, so there should be more
opportunities to contribute.
Cheers,
Andre
> get_mclk_offset() checks CONFIG_MACH_SUN9I_A80, but no such Kconfig
> symbol exists - the A80 is covered by CONFIG_MACH_SUN9I. The check
> therefore always fails and the function falls through to the default
> offset 0x88, which lies in a reserved region of the A80 CCU. All mod
> clock writes from U-Boot proper end up there and are silently lost,
> so the SD/MMC controllers keep running at whatever clock the
> SPL/BROM left behind.
>
> For the eMMC on SDC2 that means card identification runs at the
> ~48 MHz the SPL used for loading U-Boot instead of 400 kHz: short
> responses still limp along, but long (R2) responses are received as
> all-ones, CMD2/ALL_SEND_CID fails and mmc_init() returns -110. This
> went unnoticed for years because the SPL uses the legacy code path
> with a hardcoded mclk address, so booting *from* eMMC still worked -
> only U-Boot proper could never access the eMMC on sun9i.
>
> Use the correct Kconfig symbol so the mod clock writes reach the SDC
> clock registers at CCU offset 0x410.
>
> Tested on a Cubietech Cubieboard4: eMMC identification now succeeds
> and distro boot from the eMMC works.
>
> Fixes: 0237b3047e25 ("mmc: sunxi: Refactor mod clock register offset")
> Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
> Signed-off-by: Sören Hantel <fugininsane@googlemail.com>
> ---
> drivers/mmc/sunxi_mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> index e28c81af..623393fc 100644
> --- a/drivers/mmc/sunxi_mmc.c
> +++ b/drivers/mmc/sunxi_mmc.c
> @@ -663,7 +663,7 @@ static const struct dm_mmc_ops sunxi_mmc_ops = {
>
> static unsigned get_mclk_offset(void)
> {
> - if (IS_ENABLED(CONFIG_MACH_SUN9I_A80))
> + if (IS_ENABLED(CONFIG_MACH_SUN9I))
> return 0x410;
>
> if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] mmc: sunxi: Fix mod clock register offset for the A80
2026-07-26 22:41 ` Andre Przywara
@ 2026-07-27 0:32 ` Sören Hantel
0 siblings, 0 replies; 4+ messages in thread
From: Sören Hantel @ 2026-07-27 0:32 UTC (permalink / raw)
To: Andre Przywara
Cc: u-boot, Omar Ivan Fardjoume, Tom Rini, Peng Fan, Jaehoon Chung,
Sören Hantel
Hi Andre,
no worries at all - what matters is that the fix is queued, the A80
users won't care whose patch it was. And nice to see the bug was
independently found twice, that's a good sign for the report.
Thanks for taking the time to look at it, and for the pointer to
Omar's patch.
There is indeed plenty left on the A80, so I will keep poking around.
Cheers,
Sören
^ permalink raw reply [flat|nested] 4+ messages in thread
[parent not found: <20260722162126.2790195-1-fugininsane@googlemail.com_quarantine>]
* Re: [PATCH] mmc: sunxi: Fix mod clock register offset for the A80
[not found] <20260722162126.2790195-1-fugininsane@googlemail.com_quarantine>
@ 2026-07-23 10:26 ` Andre Przywara
0 siblings, 0 replies; 4+ messages in thread
From: Andre Przywara @ 2026-07-23 10:26 UTC (permalink / raw)
To: Sören Hantel, u-boot
Cc: Peng Fan, Jaehoon Chung, Tom Rini, Sören Hantel,
Claude Fable 5
Hi Sören,
thanks for sending this!
On 7/22/26 18:21, Sören Hantel wrote:
> get_mclk_offset() checks CONFIG_MACH_SUN9I_A80, but no such Kconfig
> symbol exists - the A80 is covered by CONFIG_MACH_SUN9I. The check
Ouch, it's not the first time we have this issue, I remember fixing a
misspelled guard in the past. And recently found another one.
So since you have a tireless and non-complaining helper at hand, can you
ask Claude to hunt for those misspelled/non-existing config options, in
the sunxi code? So all drivers used by sunxi and the board/sunxi and
arch/arm/mach-sunxi directories. Maybe also look for CONFIG_MACH_SUN.*I
like symbols. It's hard to do this with just grep and friends.
As a motivation: it should find at least one ... ;-)
> therefore always fails and the function falls through to the default
> offset 0x88, which lies in a reserved region of the A80 CCU. All mod
> clock writes from U-Boot proper end up there and are silently lost,
> so the SD/MMC controllers keep running at whatever clock the
> SPL/BROM left behind.
>
> For the eMMC on SDC2 that means card identification runs at the
> ~48 MHz the SPL used for loading U-Boot instead of 400 kHz: short
> responses still limp along, but long (R2) responses are received as
> all-ones, CMD2/ALL_SEND_CID fails and mmc_init() returns -110. This
> went unnoticed for years because the SPL uses the legacy code path
> with a hardcoded mclk address, so booting *from* eMMC still worked -
> only U-Boot proper could never access the eMMC on sun9i.
Ah, that's a good find, I was already wondering about that, since I
think I briefly tested eMMC on my A80 board ...
> Use the correct Kconfig symbol so the mod clock writes reach the SDC
> clock registers at CCU offset 0x410.
>
> Tested on a Cubietech Cubieboard4: eMMC identification now succeeds
> and distro boot from the eMMC works.
>
> Fixes: 0237b3047e25 ("mmc: sunxi: Refactor mod clock register offset")
> Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
> Signed-off-by: Sören Hantel <fugininsane@googlemail.com>
Thanks, looks correct. Will take it ASAP.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre
> ---
> drivers/mmc/sunxi_mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> index e28c81af..623393fc 100644
> --- a/drivers/mmc/sunxi_mmc.c
> +++ b/drivers/mmc/sunxi_mmc.c
> @@ -663,7 +663,7 @@ static const struct dm_mmc_ops sunxi_mmc_ops = {
>
> static unsigned get_mclk_offset(void)
> {
> - if (IS_ENABLED(CONFIG_MACH_SUN9I_A80))
> + if (IS_ENABLED(CONFIG_MACH_SUN9I))
> return 0x410;
>
> if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2026-07-27 2:53 UTC | newest]
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2026-07-22 16:21 [PATCH] mmc: sunxi: Fix mod clock register offset for the A80 Sören Hantel
2026-07-26 22:41 ` Andre Przywara
2026-07-27 0:32 ` Sören Hantel
[not found] <20260722162126.2790195-1-fugininsane@googlemail.com_quarantine>
2026-07-23 10:26 ` Andre Przywara
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