* [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B
@ 2024-02-14 9:31 Andy Yan
2024-02-14 9:31 ` [PATCH v2 2/2] board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB Andy Yan
2024-02-14 14:13 ` [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B Quentin Schulz
0 siblings, 2 replies; 8+ messages in thread
From: Andy Yan @ 2024-02-14 9:31 UTC (permalink / raw)
To: kever.yang; +Cc: jonas, u-boot, Andy Yan
CoolPi 4B is a rk3588s based SBC.
Specification:
- Rockchip RK3588S
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet drived by PCIE with RTL8111HS
- HDMI Type D out
- Mini DP out
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- WIFI/BT module AIC8800
- 40 pin header
The dts is from linux-6.8 rc1.
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v2:
- sync dts from linux-rockchip which will be in linux-6.8 rc6[0]
[0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi | 30 +
arch/arm/dts/rk3588s-coolpi-4b.dts | 812 +++++++++++++++++++++
board/rockchip/evb_rk3588/MAINTAINERS | 7 +
configs/coolpi-4b-rk3588s_defconfig | 105 +++
5 files changed, 955 insertions(+)
create mode 100644 arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3588s-coolpi-4b.dts
create mode 100644 configs/coolpi-4b-rk3588s_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ce10d3dbb0..ae7c088ceb 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -190,6 +190,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3568-rock-3a.dtb
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
+ rk3588s-coolpi-4b.dts \
rk3588-edgeble-neu6a-io.dtb \
rk3588-edgeble-neu6b-io.dtb \
rk3588-evb1-v10.dtb \
diff --git a/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
new file mode 100644
index 0000000000..6b69ff424f
--- /dev/null
+++ b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3588s-u-boot.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
+ };
+};
+
+&fspim2_pins {
+ bootph-all;
+};
+
+&sfc {
+ bootph-pre-ram;
+ u-boot,spl-sfc-no-dma;
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspim2_pins>;
+ status = "okay";
+
+ flash@0 {
+ bootph-pre-ram;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ };
+};
diff --git a/arch/arm/dts/rk3588s-coolpi-4b.dts b/arch/arm/dts/rk3588s-coolpi-4b.dts
new file mode 100644
index 0000000000..e037bf9db7
--- /dev/null
+++ b/arch/arm/dts/rk3588s-coolpi-4b.dts
@@ -0,0 +1,812 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ *
+ * https://cool-pi.com/topic/130/coolpi-4b-product-spec-introduction
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3588s.dtsi"
+
+/ {
+ model = "RK3588S CoolPi 4 Model B";
+ compatible = "coolpi,pi-4b", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ mmc2 = &sdio;
+ };
+
+ analog-sound {
+ compatible = "audio-graph-card";
+ dais = <&i2s0_8ch_p0>;
+ label = "rk3588-es8316";
+ routing = "MIC2", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR";
+ widgets = "Microphone", "Mic Jack",
+ "Headphone", "Headphones";
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_leds>;
+
+ led0: led-green {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led1: led-red {
+ color = <LED_COLOR_ID_RED>;
+ default-state = "off";
+ function = LED_FUNCTION_WLAN;
+ gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "phy0tx";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&hym8563>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ post-power-on-delay-ms = <200>;
+ reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usbdcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc5v0_usb: vcc5v0-usb-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usbdcin>;
+ };
+
+ avdd0v85_pcie20: avdd0v85-pcie20-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "avdd0v85_pcie20";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ vin-supply = <&vdd_0v85_s0>;
+ };
+
+ avdd1v8_pcie20: avdd1v8-pcie20-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "avdd1v8_pcie20";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&avcc_1v8_s0>;
+ };
+
+ vcc3v3_mipi: vcc3v3-mipi-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc3v3_mipi";
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_otg: vcc5v0-otg-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_u3host_en>;
+ regulator-name = "vcc5v0_otg";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy2_psu {
+ status = "okay";
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&i2c0 {
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ vdd_npu_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_npu_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c6 {
+ pinctrl-0 = <&i2c6m3_xfer>;
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ };
+};
+
+&i2c7 {
+ pinctrl-0 = <&i2c7m0_xfer>;
+ status = "okay";
+
+ es8316: audio-codec@11 {
+ compatible = "everest,es8316";
+ reg = <0x11>;
+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
+ assigned-clock-rates = <12288000>;
+ clocks = <&cru I2S0_8CH_MCLKOUT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+
+ port {
+ es8316_p0_0: endpoint {
+ remote-endpoint = <&i2s0_8ch_p0_0>;
+ };
+ };
+ };
+};
+
+&i2s0_8ch {
+ pinctrl-0 = <&i2s0_lrck
+ &i2s0_mclk
+ &i2s0_sclk
+ &i2s0_sdi0
+ &i2s0_sdo0>;
+ status = "okay";
+
+ i2s0_8ch_p0: port {
+ i2s0_8ch_p0_0: endpoint {
+ dai-format = "i2s";
+ mclk-fs = <256>;
+ remote-endpoint = <&es8316_p0_0>;
+ };
+ };
+};
+
+&pcie2x1l2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtl8111_isolate>;
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&pinctrl {
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ led {
+ gpio_leds: gpio-leds {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>,
+ <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ rtl8111 {
+ rtl8111_isolate: rtl8111-isolate {
+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
+ <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vcc5v0_u3host_en: vcc5v0-u3host-en {
+ rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wireless-bluetooth {
+ bt_reset_gpio: bt-reset-pin {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_gpio: bt-wake-pin {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_host_irq: bt-wake-host-irq {
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ wireless-wlan {
+ wifi_host_wake_irq: wifi-host-wake-irq {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ wifi_poweren_pin: wifi-poweren-pin {
+ rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm2 {
+ pinctrl-0 = <&pwm2m1_pins>;
+ status = "okay";
+};
+
+&pwm13 {
+ pinctrl-names = "active";
+ pinctrl-0 = <&pwm13m2_pins>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8_s0>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ no-sdio;
+ no-sd;
+ non-removable;
+ status = "okay";
+};
+
+&sdio {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ max-frequency = <150000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ no-sd;
+ no-mmc;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdiom1_pins>,<&wifi_poweren_pin>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <150000000>;
+ no-sdio;
+ no-mmc;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
+&spi2 {
+ assigned-clocks = <&cru CLK_SPI2>;
+ assigned-clock-rates = <200000000>;
+ num-cs = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+ status = "okay";
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ reg = <0x0>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ spi-max-frequency = <1000000>;
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc5v0_sys>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+ regulator-name = "vdd_gpu_s0";
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-name = "vdd_log_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <750000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+ regulator-name = "vdd_vdenc_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-name = "vdd_ddr_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-name = "vdd2_ddr_s3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-name = "vdd_2v0_pldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-name = "vcc_3v3_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-name = "vddq_ddr_s0";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-name = "vcc_1v8_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avcc_1v8_s0: pldo-reg1 {
+ regulator-name = "avcc_1v8_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-name = "vcc_1v8_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avdd_1v2_s0: pldo-reg3 {
+ regulator-name = "avdd_1v2_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_s0: pldo-reg4 {
+ regulator-name = "vcc_3v3_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-name = "vccio_sd_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ pldo6_s3: pldo-reg6 {
+ regulator-name = "pldo6_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-name = "vdd_0v75_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_ddr_pll_s0: nldo-reg2 {
+ regulator-name = "vdd_ddr_pll_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ avdd_0v75_s0: nldo-reg3 {
+ regulator-name = "avdd_0v75_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v85_s0: nldo-reg4 {
+ regulator-name = "vdd_0v85_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-name = "vdd_0v75_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&u2phy3_host {
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
+
+/* bt */
+&uart9 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>;
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
diff --git a/board/rockchip/evb_rk3588/MAINTAINERS b/board/rockchip/evb_rk3588/MAINTAINERS
index 2bd44bc587..1604229759 100644
--- a/board/rockchip/evb_rk3588/MAINTAINERS
+++ b/board/rockchip/evb_rk3588/MAINTAINERS
@@ -1,3 +1,10 @@
+COOLPI-4B-RK3588S
+M: Andy Yan <andyshrk@163.com>
+S: Maintained
+F: configs/coolpi-4b-rk3588s_defconfig
+F: arch/arm/dts/rk3588s-coolpi-4b.dts
+F: arch/arm/dts/rk3588s-coolpi-u-boot.dtsi
+
EVB-RK3588
M: Kever Yang <kever.yang@rock-chips.com>
S: Maintained
diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig
new file mode 100644
index 0000000000..3e3e5abc86
--- /dev/null
+++ b/configs/coolpi-4b-rk3588s_defconfig
@@ -0,0 +1,105 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SF_DEFAULT_MODE=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3588=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_AHCI_PCI=y
+CONFIG_DWC_AHCI=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=5
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_USBDP=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_SCSI=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/2] board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB
2024-02-14 9:31 [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B Andy Yan
@ 2024-02-14 9:31 ` Andy Yan
2024-02-14 14:13 ` [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B Quentin Schulz
1 sibling, 0 replies; 8+ messages in thread
From: Andy Yan @ 2024-02-14 9:31 UTC (permalink / raw)
To: kever.yang; +Cc: jonas, u-boot, Andy Yan
Cool Pi CM5 EVB works as a mother board connect with CM5.
CM5 Specification:
- Rockchip RK3588
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet x 1 with PHY YT8531
- Gigabit ethernet x 1 drived by PCIE with YT6801S
CM5 EVB Specification:
- HDMI Type A out x 2
- HDMI Type D in x 1
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- 40 pin header
The dts is from linux-6.8 rc1.
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v2:
- sync dts from linux-rockchip which will be in linux-6.8 rc6[0]
[0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
.../arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi | 30 +
arch/arm/dts/rk3588-coolpi-cm5-evb.dts | 216 ++++++
arch/arm/dts/rk3588-coolpi-cm5.dtsi | 649 ++++++++++++++++++
board/rockchip/evb_rk3588/MAINTAINERS | 8 +
configs/coolpi-cm5-evb-rk3588_defconfig | 105 +++
5 files changed, 1008 insertions(+)
create mode 100644 arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3588-coolpi-cm5-evb.dts
create mode 100644 arch/arm/dts/rk3588-coolpi-cm5.dtsi
create mode 100644 configs/coolpi-cm5-evb-rk3588_defconfig
diff --git a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi
new file mode 100644
index 0000000000..6b69ff424f
--- /dev/null
+++ b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3588s-u-boot.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
+ };
+};
+
+&fspim2_pins {
+ bootph-all;
+};
+
+&sfc {
+ bootph-pre-ram;
+ u-boot,spl-sfc-no-dma;
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspim2_pins>;
+ status = "okay";
+
+ flash@0 {
+ bootph-pre-ram;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ };
+};
diff --git a/arch/arm/dts/rk3588-coolpi-cm5-evb.dts b/arch/arm/dts/rk3588-coolpi-cm5-evb.dts
new file mode 100644
index 0000000000..a4946cdc3b
--- /dev/null
+++ b/arch/arm/dts/rk3588-coolpi-cm5-evb.dts
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include "rk3588-coolpi-cm5.dtsi"
+
+/ {
+ model = "RK3588 CoolPi CM5 EVB";
+ compatible = "coolpi,pi-cm5-evb", "coolpi,pi-cm5", "rockchip,rk3588";
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&bl_en>;
+ power-supply = <&vcc12v_dcin>;
+ pwms = <&pwm2 0 25000 0>;
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+
+ green_led: led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc3v3_lcd: vcc3v3-lcd-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_lcd";
+ enable-active-high;
+ gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcdpwr_en>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ vcc5v0_usb_host1: vcc5v0_usb_host2: vcc5v0-usb-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ enable-active-high;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_pwren>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb30_otg: vcc5v0-usb30-otg-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_otg";
+ regulator-boot-on;
+ regulator-always-on;
+ enable-active-high;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_otg_pwren>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+/* M.2 E-Key */
+&pcie2x1l1 {
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreq &pcie_wake &pcie_rst &wifi_pwron &bt_pwron>;
+ status = "okay";
+};
+
+&pcie30phy {
+ status = "okay";
+};
+
+/* Standard pcie */
+&pcie3x2 {
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ status = "okay";
+};
+
+/* M.2 M-Key ssd */
+&pcie3x4 {
+ num-lanes = <2>;
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ status = "okay";
+};
+
+&pinctrl {
+ lcd {
+ lcdpwr_en: lcdpwr-en {
+ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ bl_en: bl-en {
+ rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb_host_pwren: usb-host-pwren {
+ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ usb_otg_pwren: usb-otg-pwren {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ wifi {
+ bt_pwron: bt-pwron {
+ rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ pcie_clkreq: pcie-clkreq {
+ rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ pcie_rst: pcie-rst {
+ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ wifi_pwron: wifi-pwron {
+ rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ pcie_wake: pcie-wake {
+ rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ phy-supply = <&vcc5v0_usb_host1>;
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v0_usb_host2>;
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-coolpi-cm5.dtsi b/arch/arm/dts/rk3588-coolpi-cm5.dtsi
new file mode 100644
index 0000000000..9cb6d566da
--- /dev/null
+++ b/arch/arm/dts/rk3588-coolpi-cm5.dtsi
@@ -0,0 +1,649 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3588.dtsi"
+
+/ {
+ compatible = "coolpi,pi-cm5", "rockchip,rk3588";
+
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ mmc2 = &sdio;
+ };
+
+ analog-sound {
+ compatible = "audio-graph-card";
+ dais = <&i2s0_8ch_p0>;
+ label = "rk3588-es8316";
+ routing = "MIC2", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR";
+ widgets = "Microphone", "Mic Jack",
+ "Headphone", "Headphones";
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ avdd0v85_pcie20: avdd0v85-pcie20-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "avdd0v85_pcie20";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ vin-supply = <&vdd_0v85_s0>;
+ };
+
+ avdd1v8_pcie20: avdd1v8-pcie20-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "avdd1v8_pcie20";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&avcc_1v8_s0>;
+ };
+
+ avdd0v75_pcie30: avdd0v75-pcie30-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "avdd0v75_pcie30";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ vin-supply = <&avdd_0v75_s0>;
+ };
+
+ pcie30_avdd1v8: avdd1v8-pcie30-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd1v8";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&avcc_1v8_s0>;
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy1_ps {
+ status = "okay";
+};
+
+&combphy2_psu {
+ status = "okay";
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gmac0 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii-rxid";
+ pinctrl-0 = <&gmac0_miim
+ &gmac0_tx_bus2
+ &gmac0_rx_bus2
+ &gmac0_rgmii_clk
+ &gmac0_rgmii_bus>;
+ pinctrl-names = "default";
+ rx_delay = <0x00>;
+ tx_delay = <0x43>;
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ vdd_npu_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_npu_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c6 {
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ wakeup-source;
+ };
+};
+
+&i2c7 {
+ pinctrl-0 = <&i2c7m0_xfer>;
+ status = "okay";
+
+ es8316: audio-codec@11 {
+ compatible = "everest,es8316";
+ reg = <0x11>;
+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
+ assigned-clock-rates = <12288000>;
+ clocks = <&cru I2S0_8CH_MCLKOUT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+
+ port {
+ es8316_p0_0: endpoint {
+ remote-endpoint = <&i2s0_8ch_p0_0>;
+ };
+ };
+ };
+};
+
+&i2s0_8ch {
+ pinctrl-0 = <&i2s0_lrck
+ &i2s0_mclk
+ &i2s0_sclk
+ &i2s0_sdi0
+ &i2s0_sdo0>;
+ status = "okay";
+
+ i2s0_8ch_p0: port {
+ i2s0_8ch_p0_0: endpoint {
+ dai-format = "i2s";
+ mclk-fs = <256>;
+ remote-endpoint = <&es8316_p0_0>;
+ };
+ };
+};
+
+&mdio0 {
+ rgmii_phy: ethernet-phy@1 {
+ /* YT8531C/H */
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&yt8531_rst>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
+ };
+};
+
+/* ethernet */
+&pcie2x1l2 {
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&yt6801_isolate>;
+ status = "okay";
+};
+
+&pinctrl {
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ yt6801 {
+ yt6801_isolate: yt6801-isolate {
+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ yt8531 {
+ yt8531_rst: yt8531-rst {
+ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8_s0>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ no-sdio;
+ no-sd;
+ non-removable;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <150000000>;
+ no-sdio;
+ no-mmc;
+ sd-uhs-sdr104;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
+&spi2 {
+ assigned-clocks = <&cru CLK_SPI2>;
+ assigned-clock-rates = <200000000>;
+ num-cs = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+ status = "okay";
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ reg = <0x0>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ spi-max-frequency = <1000000>;
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys>;
+ vcc13-supply = <&vcc_2v0_pldo_s3>;
+ vcc14-supply = <&vcc_2v0_pldo_s3>;
+ vcca-supply = <&vcc5v0_sys>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_lit_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <750000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_log_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_vdenc_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_2v0_pldo_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avcc_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "avcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avdd_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "avdd_1v2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vcc_3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vccio_sd_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "pldo6_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdd_ddr_pll_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ avdd_0v75_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "avdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdd_0v85_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
diff --git a/board/rockchip/evb_rk3588/MAINTAINERS b/board/rockchip/evb_rk3588/MAINTAINERS
index 1604229759..8ab58e3ce9 100644
--- a/board/rockchip/evb_rk3588/MAINTAINERS
+++ b/board/rockchip/evb_rk3588/MAINTAINERS
@@ -5,6 +5,14 @@ F: configs/coolpi-4b-rk3588s_defconfig
F: arch/arm/dts/rk3588s-coolpi-4b.dts
F: arch/arm/dts/rk3588s-coolpi-u-boot.dtsi
+COOLPI-CM5-EVB-RK3588
+M: Andy Yan <andyshrk@163.com>
+S: Maintained
+F: configs/coolpi-cm5-evb-rk3588_defconfig
+F: arch/arm/dts/rk3588-coolpi-cm5.dtsi
+F: arch/arm/dts/rk3588-coolpi-cm5-evb.dts
+F: arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi
+
EVB-RK3588
M: Kever Yang <kever.yang@rock-chips.com>
S: Maintained
diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig b/configs/coolpi-cm5-evb-rk3588_defconfig
new file mode 100644
index 0000000000..debd9b64f9
--- /dev/null
+++ b/configs/coolpi-cm5-evb-rk3588_defconfig
@@ -0,0 +1,105 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SF_DEFAULT_MODE=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="rk3588-coolpi-cm5-evb"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3588=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-coolpi-cm5-evb.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_AHCI_PCI=y
+CONFIG_DWC_AHCI=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=5
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_USBDP=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_SCSI=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B
2024-02-14 9:31 [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B Andy Yan
2024-02-14 9:31 ` [PATCH v2 2/2] board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB Andy Yan
@ 2024-02-14 14:13 ` Quentin Schulz
2024-02-15 10:35 ` Andy Yan
1 sibling, 1 reply; 8+ messages in thread
From: Quentin Schulz @ 2024-02-14 14:13 UTC (permalink / raw)
To: Andy Yan, kever.yang; +Cc: jonas, u-boot
Hi Andy,
On 2/14/24 10:31, Andy Yan wrote:
> [You don't often get email from andyshrk@163.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> CoolPi 4B is a rk3588s based SBC.
>
> Specification:
> - Rockchip RK3588S
> - LPDDR4 2/4/8/16 GB
> - TF scard slot
> - eMMC 8/32/64/128 GB module
> - SPI Nor 8MB
> - Gigabit ethernet drived by PCIE with RTL8111HS
> - HDMI Type D out
> - Mini DP out
> - USB 2.0 Host x 2
> - USB 3.0 OTG x 1
> - USB 3.0 Host x 1
> - WIFI/BT module AIC8800
> - 40 pin header
>
> The dts is from linux-6.8 rc1.
>
> Signed-off-by: Andy Yan <andyshrk@163.com>
> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
>
> ---
>
> Changes in v2:
> - sync dts from linux-rockchip which will be in linux-6.8 rc6[0]
>
> [0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi | 30 +
> arch/arm/dts/rk3588s-coolpi-4b.dts | 812 +++++++++++++++++++++
> board/rockchip/evb_rk3588/MAINTAINERS | 7 +
> configs/coolpi-4b-rk3588s_defconfig | 105 +++
> 5 files changed, 955 insertions(+)
> create mode 100644 arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3588s-coolpi-4b.dts
> create mode 100644 configs/coolpi-4b-rk3588s_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index ce10d3dbb0..ae7c088ceb 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -190,6 +190,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
> rk3568-rock-3a.dtb
>
> dtb-$(CONFIG_ROCKCHIP_RK3588) += \
> + rk3588s-coolpi-4b.dts \
> rk3588-edgeble-neu6a-io.dtb \
> rk3588-edgeble-neu6b-io.dtb \
> rk3588-evb1-v10.dtb \
> diff --git a/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
> new file mode 100644
> index 0000000000..6b69ff424f
> --- /dev/null
> +++ b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
> @@ -0,0 +1,30 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +#include "rk3588s-u-boot.dtsi"
> +
> +/ {
> + chosen {
> + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
> + };
This is already in rk3588s-u-boot.dtsi
> +};
> +
> +&fspim2_pins {
> + bootph-all;
> +};
> +
> +&sfc {
> + bootph-pre-ram;
> + u-boot,spl-sfc-no-dma;
> + pinctrl-names = "default";
> + pinctrl-0 = <&fspim2_pins>;
> + status = "okay";
> +
> + flash@0 {
> + bootph-pre-ram;
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <24000000>;
> + spi-rx-bus-width = <4>;
> + spi-tx-bus-width = <1>;
> + };
> +};
> diff --git a/arch/arm/dts/rk3588s-coolpi-4b.dts b/arch/arm/dts/rk3588s-coolpi-4b.dts
> new file mode 100644
> index 0000000000..e037bf9db7
> --- /dev/null
> +++ b/arch/arm/dts/rk3588s-coolpi-4b.dts
> @@ -0,0 +1,812 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
> + *
> + * https://cool-pi.com/topic/130/coolpi-4b-product-spec-introduction
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +#include "rk3588s.dtsi"
> +
> +/ {
> + model = "RK3588S CoolPi 4 Model B";
> + compatible = "coolpi,pi-4b", "rockchip,rk3588s";
> +
> + aliases {
> + mmc0 = &sdhci;
> + mmc1 = &sdmmc;
> + mmc2 = &sdio;
> + };
> +
> + analog-sound {
> + compatible = "audio-graph-card";
> + dais = <&i2s0_8ch_p0>;
> + label = "rk3588-es8316";
> + routing = "MIC2", "Mic Jack",
> + "Headphones", "HPOL",
> + "Headphones", "HPOR";
> + widgets = "Microphone", "Mic Jack",
> + "Headphone", "Headphones";
> + };
> +
> + chosen {
> + stdout-path = "serial2:1500000n8";
> + };
> +
> + leds: leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio_leds>;
> +
> + led0: led-green {
> + color = <LED_COLOR_ID_GREEN>;
> + function = LED_FUNCTION_STATUS;
> + gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> +
> + led1: led-red {
> + color = <LED_COLOR_ID_RED>;
> + default-state = "off";
> + function = LED_FUNCTION_WLAN;
> + gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "phy0tx";
> + };
> + };
> +
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + clocks = <&hym8563>;
> + clock-names = "ext_clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_enable_h>;
> + /*
> + * On the module itself this is one of these (depending
> + * on the actual card populated):
> + * - SDIO_RESET_L_WL_REG_ON
> + * - PDN (power down when low)
> + */
> + post-power-on-delay-ms = <200>;
> + reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
> + };
> +
> + vcc12v_dcin: vcc12v-dcin-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc12v_dcin";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + };
> +
> + vcc5v0_sys: vcc5v0-sys-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc12v_dcin>;
> + };
> +
> + vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_usbdcin";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc12v_dcin>;
> + };
> +
> + vcc5v0_usb: vcc5v0-usb-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_usb";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_usbdcin>;
> + };
> +
> + avdd0v85_pcie20: avdd0v85-pcie20-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "avdd0v85_pcie20";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <850000>;
> + vin-supply = <&vdd_0v85_s0>;
> + };
> +
> + avdd1v8_pcie20: avdd1v8-pcie20-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "avdd1v8_pcie20";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + vin-supply = <&avcc_1v8_s0>;
> + };
> +
> + vcc3v3_mipi: vcc3v3-mipi-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
> + regulator-name = "vcc3v3_mipi";
> + regulator-boot-on;
> + regulator-always-on;
> + vin-supply = <&vcc_3v3_s3>;
> + };
> +
> + vcc5v0_host: vcc5v0-host-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_host_en>;
> + regulator-name = "vcc5v0_host";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc5v0_otg: vcc5v0-otg-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_u3host_en>;
> + regulator-name = "vcc5v0_otg";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_1v1_nldo_s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1100000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +};
> +
> +&combphy0_ps {
> + status = "okay";
> +};
> +
> +&combphy2_psu {
> + status = "okay";
> +};
> +
> +&cpu_l0 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_b0 {
> + cpu-supply = <&vdd_cpu_big0_s0>;
> +};
> +
> +&cpu_b2 {
> + cpu-supply = <&vdd_cpu_big1_s0>;
> +};
> +
> +&i2c0 {
> + pinctrl-0 = <&i2c0m2_xfer>;
> + status = "okay";
> +
> + vdd_cpu_big0_s0: regulator@42 {
> + compatible = "rockchip,rk8602";
> + reg = <0x42>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big0_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc5v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_big1_s0: regulator@43 {
> + compatible = "rockchip,rk8603", "rockchip,rk8602";
> + reg = <0x43>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big1_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc5v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +};
> +
> +&i2c2 {
> + status = "okay";
> +
> + vdd_npu_s0: regulator@42 {
> + compatible = "rockchip,rk8602";
> + reg = <0x42>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_npu_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc5v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +};
> +
> +&i2c6 {
> + pinctrl-0 = <&i2c6m3_xfer>;
> + status = "okay";
> +
> + hym8563: rtc@51 {
> + compatible = "haoyu,hym8563";
> + reg = <0x51>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
> + #clock-cells = <0>;
> + clock-output-names = "hym8563";
> + pinctrl-names = "default";
> + pinctrl-0 = <&hym8563_int>;
> + };
> +};
> +
> +&i2c7 {
> + pinctrl-0 = <&i2c7m0_xfer>;
> + status = "okay";
> +
> + es8316: audio-codec@11 {
> + compatible = "everest,es8316";
> + reg = <0x11>;
> + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
> + assigned-clock-rates = <12288000>;
> + clocks = <&cru I2S0_8CH_MCLKOUT>;
> + clock-names = "mclk";
> + #sound-dai-cells = <0>;
> +
> + port {
> + es8316_p0_0: endpoint {
> + remote-endpoint = <&i2s0_8ch_p0_0>;
> + };
> + };
> + };
> +};
> +
> +&i2s0_8ch {
> + pinctrl-0 = <&i2s0_lrck
> + &i2s0_mclk
> + &i2s0_sclk
> + &i2s0_sdi0
> + &i2s0_sdo0>;
> + status = "okay";
> +
> + i2s0_8ch_p0: port {
> + i2s0_8ch_p0_0: endpoint {
> + dai-format = "i2s";
> + mclk-fs = <256>;
> + remote-endpoint = <&es8316_p0_0>;
> + };
> + };
> +};
> +
> +&pcie2x1l2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&rtl8111_isolate>;
> + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + hym8563 {
> + hym8563_int: hym8563-int {
> + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + led {
> + gpio_leds: gpio-leds {
> + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>,
> + <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> + };
> +
> + rtl8111 {
> + rtl8111_isolate: rtl8111-isolate {
> + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + sdio-pwrseq {
> + wifi_enable_h: wifi-enable-h {
> + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + usb {
> + vcc5v0_host_en: vcc5v0-host-en {
> + rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
> + <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + vcc5v0_u3host_en: vcc5v0-u3host-en {
> + rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + wireless-bluetooth {
> + bt_reset_gpio: bt-reset-pin {
> + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + bt_wake_gpio: bt-wake-pin {
> + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + bt_wake_host_irq: bt-wake-host-irq {
> + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> + };
> +
> + wireless-wlan {
> + wifi_host_wake_irq: wifi-host-wake-irq {
> + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> +
> + wifi_poweren_pin: wifi-poweren-pin {
> + rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +};
> +
> +&pwm2 {
> + pinctrl-0 = <&pwm2m1_pins>;
> + status = "okay";
> +};
> +
> +&pwm13 {
> + pinctrl-names = "active";
> + pinctrl-0 = <&pwm13m2_pins>;
> + status = "okay";
> +};
> +
> +&saradc {
> + vref-supply = <&vcc_1v8_s0>;
> + status = "okay";
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + max-frequency = <200000000>;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> + no-sdio;
> + no-sd;
> + non-removable;
> + status = "okay";
> +};
> +
> +&sdio {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + cap-sdio-irq;
> + disable-wp;
> + keep-power-in-suspend;
> + max-frequency = <150000000>;
> + mmc-pwrseq = <&sdio_pwrseq>;
> + no-sd;
> + no-mmc;
> + non-removable;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdiom1_pins>,<&wifi_poweren_pin>;
> + status = "okay";
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-mmc-highspeed;
> + cap-sd-highspeed;
> + disable-wp;
> + max-frequency = <150000000>;
> + no-sdio;
> + no-mmc;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc_3v3_s3>;
> + vqmmc-supply = <&vccio_sd_s0>;
> + status = "okay";
> +};
> +
> +&spi2 {
> + assigned-clocks = <&cru CLK_SPI2>;
> + assigned-clock-rates = <200000000>;
> + num-cs = <1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
> + status = "okay";
> +
> + pmic@0 {
> + compatible = "rockchip,rk806";
> + reg = <0x0>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
> + <&rk806_dvs2_null>, <&rk806_dvs3_null>;
> + spi-max-frequency = <1000000>;
> + vcc1-supply = <&vcc5v0_sys>;
> + vcc2-supply = <&vcc5v0_sys>;
> + vcc3-supply = <&vcc5v0_sys>;
> + vcc4-supply = <&vcc5v0_sys>;
> + vcc5-supply = <&vcc5v0_sys>;
> + vcc6-supply = <&vcc5v0_sys>;
> + vcc7-supply = <&vcc5v0_sys>;
> + vcc8-supply = <&vcc5v0_sys>;
> + vcc9-supply = <&vcc5v0_sys>;
> + vcc10-supply = <&vcc5v0_sys>;
> + vcc11-supply = <&vcc_2v0_pldo_s3>;
> + vcc12-supply = <&vcc5v0_sys>;
> + vcc13-supply = <&vcc_1v1_nldo_s3>;
> + vcc14-supply = <&vcc_1v1_nldo_s3>;
> + vcca-supply = <&vcc5v0_sys>;
> +
> + rk806_dvs1_null: dvs1-null-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun0";
> + };
> +
> + rk806_dvs2_null: dvs2-null-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun0";
> + };
> +
> + rk806_dvs3_null: dvs3-null-pins {
> + pins = "gpio_pwrctrl3";
> + function = "pin_fun0";
> + };
> +
> + regulators {
> + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
> + regulator-name = "vdd_gpu_s0";
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> + regulator-enable-ramp-delay = <400>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
> + regulator-name = "vdd_cpu_lit_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_log_s0: dcdc-reg3 {
> + regulator-name = "vdd_log_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <675000>;
> + regulator-max-microvolt = <750000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <750000>;
> + };
> + };
> +
> + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
> + regulator-name = "vdd_vdenc_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_ddr_s0: dcdc-reg5 {
> + regulator-name = "vdd_ddr_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <675000>;
> + regulator-max-microvolt = <900000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <850000>;
> + };
> + };
> +
> + vdd2_ddr_s3: dcdc-reg6 {
> + regulator-name = "vdd2_ddr_s3";
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc_2v0_pldo_s3: dcdc-reg7 {
> + regulator-name = "vdd_2v0_pldo_s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <2000000>;
> + regulator-max-microvolt = <2000000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <2000000>;
> + };
> + };
> +
> + vcc_3v3_s3: dcdc-reg8 {
> + regulator-name = "vcc_3v3_s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vddq_ddr_s0: dcdc-reg9 {
> + regulator-name = "vddq_ddr_s0";
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_1v8_s3: dcdc-reg10 {
> + regulator-name = "vcc_1v8_s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + avcc_1v8_s0: pldo-reg1 {
> + regulator-name = "avcc_1v8_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_1v8_s0: pldo-reg2 {
> + regulator-name = "vcc_1v8_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + avdd_1v2_s0: pldo-reg3 {
> + regulator-name = "avdd_1v2_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_3v3_s0: pldo-reg4 {
> + regulator-name = "vcc_3v3_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vccio_sd_s0: pldo-reg5 {
> + regulator-name = "vccio_sd_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + pldo6_s3: pldo-reg6 {
> + regulator-name = "pldo6_s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vdd_0v75_s3: nldo-reg1 {
> + regulator-name = "vdd_0v75_s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <750000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <750000>;
> + };
> + };
> +
> + vdd_ddr_pll_s0: nldo-reg2 {
> + regulator-name = "vdd_ddr_pll_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <850000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <850000>;
> + };
> + };
> +
> + avdd_0v75_s0: nldo-reg3 {
> + regulator-name = "avdd_0v75_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <750000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_0v85_s0: nldo-reg4 {
> + regulator-name = "vdd_0v85_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <850000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_0v75_s0: nldo-reg5 {
> + regulator-name = "vdd_0v75_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <750000>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> + };
> + };
> +};
> +
> +&tsadc {
> + status = "okay";
> +};
> +
> +&u2phy2 {
> + status = "okay";
> +};
> +
> +&u2phy3 {
> + status = "okay";
> +};
> +
> +&u2phy2_host {
> + phy-supply = <&vcc5v0_host>;
> + status = "okay";
> +};
> +
> +&u2phy3_host {
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-0 = <&uart2m0_xfer>;
> + status = "okay";
> +};
> +
> +/* bt */
> +&uart9 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>;
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
> +
> +&usb_host1_ehci {
> + status = "okay";
> +};
> +
> +&usb_host1_ohci {
> + status = "okay";
> +};
> diff --git a/board/rockchip/evb_rk3588/MAINTAINERS b/board/rockchip/evb_rk3588/MAINTAINERS
> index 2bd44bc587..1604229759 100644
> --- a/board/rockchip/evb_rk3588/MAINTAINERS
> +++ b/board/rockchip/evb_rk3588/MAINTAINERS
> @@ -1,3 +1,10 @@
> +COOLPI-4B-RK3588S
> +M: Andy Yan <andyshrk@163.com>
> +S: Maintained
> +F: configs/coolpi-4b-rk3588s_defconfig
> +F: arch/arm/dts/rk3588s-coolpi-4b.dts
> +F: arch/arm/dts/rk3588s-coolpi-u-boot.dtsi
> +
> EVB-RK3588
> M: Kever Yang <kever.yang@rock-chips.com>
> S: Maintained
> diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig
> new file mode 100644
> index 0000000000..3e3e5abc86
> --- /dev/null
> +++ b/configs/coolpi-4b-rk3588s_defconfig
> @@ -0,0 +1,105 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_TEXT_BASE=0x00a00000
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=2
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
> +CONFIG_SF_DEFAULT_SPEED=24000000
> +CONFIG_SF_DEFAULT_MODE=0x2000
> +CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
> +CONFIG_ROCKCHIP_RK3588=y
> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_STACK_R_ADDR=0x600000
> +CONFIG_TARGET_EVB_RK3588=y
> +CONFIG_SPL_STACK=0x400000
> +CONFIG_DEBUG_UART_BASE=0xFEB50000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
> +CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_PCI=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_AHCI=y
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
> +CONFIG_OF_BOARD_SETUP=y
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_SPL_MAX_SIZE=0x40000
> +CONFIG_SPL_PAD_TO=0x7f8000
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
> +CONFIG_SPL_ATF=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
> +CONFIG_CMD_USB=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_REGULATOR=y
> +# CONFIG_SPL_DOS_PARTITION is not set
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_LIVE=y
> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_SPL_REGMAP=y
> +CONFIG_SPL_SYSCON=y
> +CONFIG_AHCI_PCI=y
> +CONFIG_DWC_AHCI=y
> +CONFIG_SPL_CLK=y
> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_MISC=y
> +CONFIG_SUPPORT_EMMC_RPMB=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_SDMA=y
> +CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_SF_DEFAULT_BUS=5
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
> +CONFIG_SPI_FLASH_XMC=y
> +CONFIG_SPI_FLASH_XTX=y
> +CONFIG_PHY_MOTORCOMM=y
> +CONFIG_DWC_ETH_QOS=y
> +CONFIG_DWC_ETH_QOS_ROCKCHIP=y
> +CONFIG_NVME_PCI=y
> +CONFIG_PCIE_DW_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
> +CONFIG_PHY_ROCKCHIP_USBDP=y
> +CONFIG_SPL_PINCTRL=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_SPL_RAM=y
> +CONFIG_SCSI=y
> +CONFIG_BAUDRATE=1500000
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_ROCKCHIP_SFC=y
> +CONFIG_SYSRESET=y
> +CONFIG_USB=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_OHCI_GENERIC=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_DWC3_GENERIC=y
> +CONFIG_ERRNO_STR=y
Is there any reason for NOT enabling MMC_HS400_ES?
Cheers,
Quentin
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re:Re: [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B
2024-02-14 14:13 ` [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B Quentin Schulz
@ 2024-02-15 10:35 ` Andy Yan
2024-02-15 10:40 ` Quentin Schulz
0 siblings, 1 reply; 8+ messages in thread
From: Andy Yan @ 2024-02-15 10:35 UTC (permalink / raw)
To: Quentin Schulz; +Cc: kever.yang, jonas, u-boot
At 2024-02-14 22:13:08, "Quentin Schulz" <quentin.schulz@theobroma-systems.com> wrote:
>Hi Andy,
>
>On 2/14/24 10:31, Andy Yan wrote:
>> [You don't often get email from andyshrk@163.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>>
>> CoolPi 4B is a rk3588s based SBC.
>>
>> Specification:
>> - Rockchip RK3588S
>> - LPDDR4 2/4/8/16 GB
>> - TF scard slot
>> - eMMC 8/32/64/128 GB module
>> - SPI Nor 8MB
>> - Gigabit ethernet drived by PCIE with RTL8111HS
>> - HDMI Type D out
>> - Mini DP out
>> - USB 2.0 Host x 2
>> - USB 3.0 OTG x 1
>> - USB 3.0 Host x 1
>> - WIFI/BT module AIC8800
>> - 40 pin header
>>
>> The dts is from linux-6.8 rc1.
>>
>> Signed-off-by: Andy Yan <andyshrk@163.com>
>> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
>>
>> ---
>>
>> Changes in v2:
>> - sync dts from linux-rockchip which will be in linux-6.8 rc6[0]
>>
>> [0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
>> arch/arm/dts/Makefile | 1 +
>> arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi | 30 +
>> arch/arm/dts/rk3588s-coolpi-4b.dts | 812 +++++++++++++++++++++
>> board/rockchip/evb_rk3588/MAINTAINERS | 7 +
>> configs/coolpi-4b-rk3588s_defconfig | 105 +++
>> 5 files changed, 955 insertions(+)
>> create mode 100644 arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
>> create mode 100644 arch/arm/dts/rk3588s-coolpi-4b.dts
>> create mode 100644 configs/coolpi-4b-rk3588s_defconfig
>>
>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>> index ce10d3dbb0..ae7c088ceb 100644
>> --- a/arch/arm/dts/Makefile
>> +++ b/arch/arm/dts/Makefile
>> @@ -190,6 +190,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
>> rk3568-rock-3a.dtb
>>
>> dtb-$(CONFIG_ROCKCHIP_RK3588) += \
>> + rk3588s-coolpi-4b.dts \
>> rk3588-edgeble-neu6a-io.dtb \
>> rk3588-edgeble-neu6b-io.dtb \
>> rk3588-evb1-v10.dtb \
>> diff --git a/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
>> new file mode 100644
>> index 0000000000..6b69ff424f
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
>> @@ -0,0 +1,30 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +
>> +#include "rk3588s-u-boot.dtsi"
>> +
>> +/ {
>> + chosen {
>> + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
>> + };
>
>This is already in rk3588s-u-boot.dtsi
Okay, will be dropped in the next version. Thanks for catching that.
>
>> +};
>> +
>> +&fspim2_pins {
>> + bootph-all;
>> +};
>> +
>> +&sfc {
>> + bootph-pre-ram;
>> + u-boot,spl-sfc-no-dma;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&fspim2_pins>;
>> + status = "okay";
>> +
>> + flash@0 {
>> + bootph-pre-ram;
>> + compatible = "jedec,spi-nor";
>> + reg = <0>;
>> + spi-max-frequency = <24000000>;
>> + spi-rx-bus-width = <4>;
>> + spi-tx-bus-width = <1>;
>> + };
>> +};
>> diff --git a/arch/arm/dts/rk3588s-coolpi-4b.dts b/arch/arm/dts/rk3588s-coolpi-4b.dts
>> new file mode 100644
>> index 0000000000..e037bf9db7
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3588s-coolpi-4b.dts
>> @@ -0,0 +1,812 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
>> + *
>> + * https://cool-pi.com/topic/130/coolpi-4b-product-spec-introduction
>> + *
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/leds/common.h>
>> +#include <dt-bindings/pinctrl/rockchip.h>
>> +#include "rk3588s.dtsi"
>> +
>> +/ {
>> + model = "RK3588S CoolPi 4 Model B";
>> + compatible = "coolpi,pi-4b", "rockchip,rk3588s";
>> +
>> + aliases {
>> + mmc0 = &sdhci;
>> + mmc1 = &sdmmc;
>> + mmc2 = &sdio;
>> + };
>> +
>> + analog-sound {
>> + compatible = "audio-graph-card";
>> + dais = <&i2s0_8ch_p0>;
>> + label = "rk3588-es8316";
>> + routing = "MIC2", "Mic Jack",
>> + "Headphones", "HPOL",
>> + "Headphones", "HPOR";
>> + widgets = "Microphone", "Mic Jack",
>> + "Headphone", "Headphones";
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial2:1500000n8";
>> + };
>> +
>> + leds: leds {
>> + compatible = "gpio-leds";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&gpio_leds>;
>> +
>> + led0: led-green {
>> + color = <LED_COLOR_ID_GREEN>;
>> + function = LED_FUNCTION_STATUS;
>> + gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "heartbeat";
>> + };
>> +
>> + led1: led-red {
>> + color = <LED_COLOR_ID_RED>;
>> + default-state = "off";
>> + function = LED_FUNCTION_WLAN;
>> + gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "phy0tx";
>> + };
>> + };
>> +
>> + sdio_pwrseq: sdio-pwrseq {
>> + compatible = "mmc-pwrseq-simple";
>> + clocks = <&hym8563>;
>> + clock-names = "ext_clock";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&wifi_enable_h>;
>> + /*
>> + * On the module itself this is one of these (depending
>> + * on the actual card populated):
>> + * - SDIO_RESET_L_WL_REG_ON
>> + * - PDN (power down when low)
>> + */
>> + post-power-on-delay-ms = <200>;
>> + reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + vcc12v_dcin: vcc12v-dcin-regulator {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc12v_dcin";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <12000000>;
>> + regulator-max-microvolt = <12000000>;
>> + };
>> +
>> + vcc5v0_sys: vcc5v0-sys-regulator {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc5v0_sys";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + vin-supply = <&vcc12v_dcin>;
>> + };
>> +
>> + vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc5v0_usbdcin";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + vin-supply = <&vcc12v_dcin>;
>> + };
>> +
>> + vcc5v0_usb: vcc5v0-usb-regulator {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc5v0_usb";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + vin-supply = <&vcc5v0_usbdcin>;
>> + };
>> +
>> + avdd0v85_pcie20: avdd0v85-pcie20-regulator {
>> + compatible = "regulator-fixed";
>> + regulator-name = "avdd0v85_pcie20";
>> + regulator-boot-on;
>> + regulator-always-on;
>> + regulator-min-microvolt = <850000>;
>> + regulator-max-microvolt = <850000>;
>> + vin-supply = <&vdd_0v85_s0>;
>> + };
>> +
>> + avdd1v8_pcie20: avdd1v8-pcie20-regulator {
>> + compatible = "regulator-fixed";
>> + regulator-name = "avdd1v8_pcie20";
>> + regulator-boot-on;
>> + regulator-always-on;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + vin-supply = <&avcc_1v8_s0>;
>> + };
>> +
>> + vcc3v3_mipi: vcc3v3-mipi-regulator {
>> + compatible = "regulator-fixed";
>> + enable-active-high;
>> + gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
>> + regulator-name = "vcc3v3_mipi";
>> + regulator-boot-on;
>> + regulator-always-on;
>> + vin-supply = <&vcc_3v3_s3>;
>> + };
>> +
>> + vcc5v0_host: vcc5v0-host-regulator {
>> + compatible = "regulator-fixed";
>> + enable-active-high;
>> + gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&vcc5v0_host_en>;
>> + regulator-name = "vcc5v0_host";
>> + regulator-boot-on;
>> + regulator-always-on;
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + vin-supply = <&vcc5v0_sys>;
>> + };
>> +
>> + vcc5v0_otg: vcc5v0-otg-regulator {
>> + compatible = "regulator-fixed";
>> + enable-active-high;
>> + gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&vcc5v0_u3host_en>;
>> + regulator-name = "vcc5v0_otg";
>> + regulator-boot-on;
>> + regulator-always-on;
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + vin-supply = <&vcc5v0_sys>;
>> + };
>> +
>> + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc_1v1_nldo_s3";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <1100000>;
>> + regulator-max-microvolt = <1100000>;
>> + vin-supply = <&vcc5v0_sys>;
>> + };
>> +};
>> +
>> +&combphy0_ps {
>> + status = "okay";
>> +};
>> +
>> +&combphy2_psu {
>> + status = "okay";
>> +};
>> +
>> +&cpu_l0 {
>> + cpu-supply = <&vdd_cpu_lit_s0>;
>> +};
>> +
>> +&cpu_b0 {
>> + cpu-supply = <&vdd_cpu_big0_s0>;
>> +};
>> +
>> +&cpu_b2 {
>> + cpu-supply = <&vdd_cpu_big1_s0>;
>> +};
>> +
>> +&i2c0 {
>> + pinctrl-0 = <&i2c0m2_xfer>;
>> + status = "okay";
>> +
>> + vdd_cpu_big0_s0: regulator@42 {
>> + compatible = "rockchip,rk8602";
>> + reg = <0x42>;
>> + fcs,suspend-voltage-selector = <1>;
>> + regulator-name = "vdd_cpu_big0_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <550000>;
>> + regulator-max-microvolt = <1050000>;
>> + regulator-ramp-delay = <2300>;
>> + vin-supply = <&vcc5v0_sys>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vdd_cpu_big1_s0: regulator@43 {
>> + compatible = "rockchip,rk8603", "rockchip,rk8602";
>> + reg = <0x43>;
>> + fcs,suspend-voltage-selector = <1>;
>> + regulator-name = "vdd_cpu_big1_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <550000>;
>> + regulator-max-microvolt = <1050000>;
>> + regulator-ramp-delay = <2300>;
>> + vin-supply = <&vcc5v0_sys>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +};
>> +
>> +&i2c2 {
>> + status = "okay";
>> +
>> + vdd_npu_s0: regulator@42 {
>> + compatible = "rockchip,rk8602";
>> + reg = <0x42>;
>> + fcs,suspend-voltage-selector = <1>;
>> + regulator-name = "vdd_npu_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <550000>;
>> + regulator-max-microvolt = <950000>;
>> + regulator-ramp-delay = <2300>;
>> + vin-supply = <&vcc5v0_sys>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +};
>> +
>> +&i2c6 {
>> + pinctrl-0 = <&i2c6m3_xfer>;
>> + status = "okay";
>> +
>> + hym8563: rtc@51 {
>> + compatible = "haoyu,hym8563";
>> + reg = <0x51>;
>> + interrupt-parent = <&gpio0>;
>> + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
>> + #clock-cells = <0>;
>> + clock-output-names = "hym8563";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&hym8563_int>;
>> + };
>> +};
>> +
>> +&i2c7 {
>> + pinctrl-0 = <&i2c7m0_xfer>;
>> + status = "okay";
>> +
>> + es8316: audio-codec@11 {
>> + compatible = "everest,es8316";
>> + reg = <0x11>;
>> + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
>> + assigned-clock-rates = <12288000>;
>> + clocks = <&cru I2S0_8CH_MCLKOUT>;
>> + clock-names = "mclk";
>> + #sound-dai-cells = <0>;
>> +
>> + port {
>> + es8316_p0_0: endpoint {
>> + remote-endpoint = <&i2s0_8ch_p0_0>;
>> + };
>> + };
>> + };
>> +};
>> +
>> +&i2s0_8ch {
>> + pinctrl-0 = <&i2s0_lrck
>> + &i2s0_mclk
>> + &i2s0_sclk
>> + &i2s0_sdi0
>> + &i2s0_sdo0>;
>> + status = "okay";
>> +
>> + i2s0_8ch_p0: port {
>> + i2s0_8ch_p0_0: endpoint {
>> + dai-format = "i2s";
>> + mclk-fs = <256>;
>> + remote-endpoint = <&es8316_p0_0>;
>> + };
>> + };
>> +};
>> +
>> +&pcie2x1l2 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&rtl8111_isolate>;
>> + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
>> + status = "okay";
>> +};
>> +
>> +&pinctrl {
>> + hym8563 {
>> + hym8563_int: hym8563-int {
>> + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
>> + };
>> + };
>> +
>> + led {
>> + gpio_leds: gpio-leds {
>> + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>,
>> + <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>;
>> + };
>> + };
>> +
>> + rtl8111 {
>> + rtl8111_isolate: rtl8111-isolate {
>> + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
>> + };
>> + };
>> +
>> + sdio-pwrseq {
>> + wifi_enable_h: wifi-enable-h {
>> + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
>> + };
>> + };
>> +
>> + usb {
>> + vcc5v0_host_en: vcc5v0-host-en {
>> + rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
>> + <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
>> + };
>> +
>> + vcc5v0_u3host_en: vcc5v0-u3host-en {
>> + rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
>> + };
>> + };
>> +
>> + wireless-bluetooth {
>> + bt_reset_gpio: bt-reset-pin {
>> + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
>> + };
>> +
>> + bt_wake_gpio: bt-wake-pin {
>> + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
>> + };
>> +
>> + bt_wake_host_irq: bt-wake-host-irq {
>> + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>;
>> + };
>> + };
>> +
>> + wireless-wlan {
>> + wifi_host_wake_irq: wifi-host-wake-irq {
>> + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
>> + };
>> +
>> + wifi_poweren_pin: wifi-poweren-pin {
>> + rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
>> + };
>> + };
>> +};
>> +
>> +&pwm2 {
>> + pinctrl-0 = <&pwm2m1_pins>;
>> + status = "okay";
>> +};
>> +
>> +&pwm13 {
>> + pinctrl-names = "active";
>> + pinctrl-0 = <&pwm13m2_pins>;
>> + status = "okay";
>> +};
>> +
>> +&saradc {
>> + vref-supply = <&vcc_1v8_s0>;
>> + status = "okay";
>> +};
>> +
>> +&sdhci {
>> + bus-width = <8>;
>> + max-frequency = <200000000>;
>> + mmc-hs400-1_8v;
>> + mmc-hs400-enhanced-strobe;
>> + no-sdio;
>> + no-sd;
>> + non-removable;
>> + status = "okay";
>> +};
>> +
>> +&sdio {
>> + bus-width = <4>;
>> + cap-sd-highspeed;
>> + cap-sdio-irq;
>> + disable-wp;
>> + keep-power-in-suspend;
>> + max-frequency = <150000000>;
>> + mmc-pwrseq = <&sdio_pwrseq>;
>> + no-sd;
>> + no-mmc;
>> + non-removable;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&sdiom1_pins>,<&wifi_poweren_pin>;
>> + status = "okay";
>> +};
>> +
>> +&sdmmc {
>> + bus-width = <4>;
>> + cap-mmc-highspeed;
>> + cap-sd-highspeed;
>> + disable-wp;
>> + max-frequency = <150000000>;
>> + no-sdio;
>> + no-mmc;
>> + sd-uhs-sdr104;
>> + vmmc-supply = <&vcc_3v3_s3>;
>> + vqmmc-supply = <&vccio_sd_s0>;
>> + status = "okay";
>> +};
>> +
>> +&spi2 {
>> + assigned-clocks = <&cru CLK_SPI2>;
>> + assigned-clock-rates = <200000000>;
>> + num-cs = <1>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
>> + status = "okay";
>> +
>> + pmic@0 {
>> + compatible = "rockchip,rk806";
>> + reg = <0x0>;
>> + interrupt-parent = <&gpio0>;
>> + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
>> + <&rk806_dvs2_null>, <&rk806_dvs3_null>;
>> + spi-max-frequency = <1000000>;
>> + vcc1-supply = <&vcc5v0_sys>;
>> + vcc2-supply = <&vcc5v0_sys>;
>> + vcc3-supply = <&vcc5v0_sys>;
>> + vcc4-supply = <&vcc5v0_sys>;
>> + vcc5-supply = <&vcc5v0_sys>;
>> + vcc6-supply = <&vcc5v0_sys>;
>> + vcc7-supply = <&vcc5v0_sys>;
>> + vcc8-supply = <&vcc5v0_sys>;
>> + vcc9-supply = <&vcc5v0_sys>;
>> + vcc10-supply = <&vcc5v0_sys>;
>> + vcc11-supply = <&vcc_2v0_pldo_s3>;
>> + vcc12-supply = <&vcc5v0_sys>;
>> + vcc13-supply = <&vcc_1v1_nldo_s3>;
>> + vcc14-supply = <&vcc_1v1_nldo_s3>;
>> + vcca-supply = <&vcc5v0_sys>;
>> +
>> + rk806_dvs1_null: dvs1-null-pins {
>> + pins = "gpio_pwrctrl2";
>> + function = "pin_fun0";
>> + };
>> +
>> + rk806_dvs2_null: dvs2-null-pins {
>> + pins = "gpio_pwrctrl2";
>> + function = "pin_fun0";
>> + };
>> +
>> + rk806_dvs3_null: dvs3-null-pins {
>> + pins = "gpio_pwrctrl3";
>> + function = "pin_fun0";
>> + };
>> +
>> + regulators {
>> + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
>> + regulator-name = "vdd_gpu_s0";
>> + regulator-boot-on;
>> + regulator-min-microvolt = <550000>;
>> + regulator-max-microvolt = <950000>;
>> + regulator-ramp-delay = <12500>;
>> + regulator-enable-ramp-delay = <400>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
>> + regulator-name = "vdd_cpu_lit_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <550000>;
>> + regulator-max-microvolt = <950000>;
>> + regulator-ramp-delay = <12500>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vdd_log_s0: dcdc-reg3 {
>> + regulator-name = "vdd_log_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <675000>;
>> + regulator-max-microvolt = <750000>;
>> + regulator-ramp-delay = <12500>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + regulator-suspend-microvolt = <750000>;
>> + };
>> + };
>> +
>> + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
>> + regulator-name = "vdd_vdenc_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <550000>;
>> + regulator-max-microvolt = <950000>;
>> + regulator-ramp-delay = <12500>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vdd_ddr_s0: dcdc-reg5 {
>> + regulator-name = "vdd_ddr_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <675000>;
>> + regulator-max-microvolt = <900000>;
>> + regulator-ramp-delay = <12500>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + regulator-suspend-microvolt = <850000>;
>> + };
>> + };
>> +
>> + vdd2_ddr_s3: dcdc-reg6 {
>> + regulator-name = "vdd2_ddr_s3";
>> + regulator-always-on;
>> + regulator-boot-on;
>> +
>> + regulator-state-mem {
>> + regulator-on-in-suspend;
>> + };
>> + };
>> +
>> + vcc_2v0_pldo_s3: dcdc-reg7 {
>> + regulator-name = "vdd_2v0_pldo_s3";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <2000000>;
>> + regulator-max-microvolt = <2000000>;
>> + regulator-ramp-delay = <12500>;
>> +
>> + regulator-state-mem {
>> + regulator-on-in-suspend;
>> + regulator-suspend-microvolt = <2000000>;
>> + };
>> + };
>> +
>> + vcc_3v3_s3: dcdc-reg8 {
>> + regulator-name = "vcc_3v3_s3";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> +
>> + regulator-state-mem {
>> + regulator-on-in-suspend;
>> + regulator-suspend-microvolt = <3300000>;
>> + };
>> + };
>> +
>> + vddq_ddr_s0: dcdc-reg9 {
>> + regulator-name = "vddq_ddr_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vcc_1v8_s3: dcdc-reg10 {
>> + regulator-name = "vcc_1v8_s3";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> +
>> + regulator-state-mem {
>> + regulator-on-in-suspend;
>> + regulator-suspend-microvolt = <1800000>;
>> + };
>> + };
>> +
>> + avcc_1v8_s0: pldo-reg1 {
>> + regulator-name = "avcc_1v8_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vcc_1v8_s0: pldo-reg2 {
>> + regulator-name = "vcc_1v8_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + regulator-suspend-microvolt = <1800000>;
>> + };
>> + };
>> +
>> + avdd_1v2_s0: pldo-reg3 {
>> + regulator-name = "avdd_1v2_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <1200000>;
>> + regulator-max-microvolt = <1200000>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vcc_3v3_s0: pldo-reg4 {
>> + regulator-name = "vcc_3v3_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-ramp-delay = <12500>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vccio_sd_s0: pldo-reg5 {
>> + regulator-name = "vccio_sd_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-ramp-delay = <12500>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + pldo6_s3: pldo-reg6 {
>> + regulator-name = "pldo6_s3";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> +
>> + regulator-state-mem {
>> + regulator-on-in-suspend;
>> + regulator-suspend-microvolt = <1800000>;
>> + };
>> + };
>> +
>> + vdd_0v75_s3: nldo-reg1 {
>> + regulator-name = "vdd_0v75_s3";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <750000>;
>> + regulator-max-microvolt = <750000>;
>> +
>> + regulator-state-mem {
>> + regulator-on-in-suspend;
>> + regulator-suspend-microvolt = <750000>;
>> + };
>> + };
>> +
>> + vdd_ddr_pll_s0: nldo-reg2 {
>> + regulator-name = "vdd_ddr_pll_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <850000>;
>> + regulator-max-microvolt = <850000>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + regulator-suspend-microvolt = <850000>;
>> + };
>> + };
>> +
>> + avdd_0v75_s0: nldo-reg3 {
>> + regulator-name = "avdd_0v75_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <750000>;
>> + regulator-max-microvolt = <750000>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vdd_0v85_s0: nldo-reg4 {
>> + regulator-name = "vdd_0v85_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <850000>;
>> + regulator-max-microvolt = <850000>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> +
>> + vdd_0v75_s0: nldo-reg5 {
>> + regulator-name = "vdd_0v75_s0";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-min-microvolt = <750000>;
>> + regulator-max-microvolt = <750000>;
>> +
>> + regulator-state-mem {
>> + regulator-off-in-suspend;
>> + };
>> + };
>> + };
>> + };
>> +};
>> +
>> +&tsadc {
>> + status = "okay";
>> +};
>> +
>> +&u2phy2 {
>> + status = "okay";
>> +};
>> +
>> +&u2phy3 {
>> + status = "okay";
>> +};
>> +
>> +&u2phy2_host {
>> + phy-supply = <&vcc5v0_host>;
>> + status = "okay";
>> +};
>> +
>> +&u2phy3_host {
>> + status = "okay";
>> +};
>> +
>> +&uart2 {
>> + pinctrl-0 = <&uart2m0_xfer>;
>> + status = "okay";
>> +};
>> +
>> +/* bt */
>> +&uart9 {
>> + status = "okay";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>;
>> +};
>> +
>> +&usb_host0_ehci {
>> + status = "okay";
>> +};
>> +
>> +&usb_host0_ohci {
>> + status = "okay";
>> +};
>> +
>> +&usb_host1_ehci {
>> + status = "okay";
>> +};
>> +
>> +&usb_host1_ohci {
>> + status = "okay";
>> +};
>> diff --git a/board/rockchip/evb_rk3588/MAINTAINERS b/board/rockchip/evb_rk3588/MAINTAINERS
>> index 2bd44bc587..1604229759 100644
>> --- a/board/rockchip/evb_rk3588/MAINTAINERS
>> +++ b/board/rockchip/evb_rk3588/MAINTAINERS
>> @@ -1,3 +1,10 @@
>> +COOLPI-4B-RK3588S
>> +M: Andy Yan <andyshrk@163.com>
>> +S: Maintained
>> +F: configs/coolpi-4b-rk3588s_defconfig
>> +F: arch/arm/dts/rk3588s-coolpi-4b.dts
>> +F: arch/arm/dts/rk3588s-coolpi-u-boot.dtsi
>> +
>> EVB-RK3588
>> M: Kever Yang <kever.yang@rock-chips.com>
>> S: Maintained
>> diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig
>> new file mode 100644
>> index 0000000000..3e3e5abc86
>> --- /dev/null
>> +++ b/configs/coolpi-4b-rk3588s_defconfig
>> @@ -0,0 +1,105 @@
>> +CONFIG_ARM=y
>> +CONFIG_SKIP_LOWLEVEL_INIT=y
>> +CONFIG_COUNTER_FREQUENCY=24000000
>> +CONFIG_ARCH_ROCKCHIP=y
>> +CONFIG_TEXT_BASE=0x00a00000
>> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
>> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
>> +CONFIG_NR_DRAM_BANKS=2
>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
>> +CONFIG_SF_DEFAULT_SPEED=24000000
>> +CONFIG_SF_DEFAULT_MODE=0x2000
>> +CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
>> +CONFIG_ROCKCHIP_RK3588=y
>> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
>> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>> +CONFIG_SPL_SERIAL=y
>> +CONFIG_SPL_STACK_R_ADDR=0x600000
>> +CONFIG_TARGET_EVB_RK3588=y
>> +CONFIG_SPL_STACK=0x400000
>> +CONFIG_DEBUG_UART_BASE=0xFEB50000
>> +CONFIG_DEBUG_UART_CLOCK=24000000
>> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
>> +CONFIG_SPL_SPI=y
>> +CONFIG_SYS_LOAD_ADDR=0xc00800
>> +CONFIG_PCI=y
>> +CONFIG_DEBUG_UART=y
>> +CONFIG_AHCI=y
>> +CONFIG_FIT=y
>> +CONFIG_FIT_VERBOSE=y
>> +CONFIG_SPL_FIT_SIGNATURE=y
>> +CONFIG_SPL_LOAD_FIT=y
>> +CONFIG_LEGACY_IMAGE_FORMAT=y
>> +CONFIG_OF_BOARD_SETUP=y
>> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb"
>> +# CONFIG_DISPLAY_CPUINFO is not set
>> +CONFIG_DISPLAY_BOARDINFO_LATE=y
>> +CONFIG_SPL_MAX_SIZE=0x40000
>> +CONFIG_SPL_PAD_TO=0x7f8000
>> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>> +CONFIG_SPL_BSS_START_ADDR=0x4000000
>> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
>> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
>> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>> +CONFIG_SPL_STACK_R=y
>> +CONFIG_SPL_SPI_LOAD=y
>> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>> +CONFIG_SPL_ATF=y
>> +CONFIG_CMD_GPIO=y
>> +CONFIG_CMD_GPT=y
>> +CONFIG_CMD_I2C=y
>> +CONFIG_CMD_MMC=y
>> +CONFIG_CMD_PCI=y
>> +CONFIG_CMD_USB=y
>> +# CONFIG_CMD_SETEXPR is not set
>> +CONFIG_CMD_REGULATOR=y
>> +# CONFIG_SPL_DOS_PARTITION is not set
>> +CONFIG_SPL_OF_CONTROL=y
>> +CONFIG_OF_LIVE=y
>> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>> +CONFIG_SPL_REGMAP=y
>> +CONFIG_SPL_SYSCON=y
>> +CONFIG_AHCI_PCI=y
>> +CONFIG_DWC_AHCI=y
>> +CONFIG_SPL_CLK=y
>> +CONFIG_ROCKCHIP_GPIO=y
>> +CONFIG_SYS_I2C_ROCKCHIP=y
>> +CONFIG_MISC=y
>> +CONFIG_SUPPORT_EMMC_RPMB=y
>> +CONFIG_MMC_DW=y
>> +CONFIG_MMC_DW_ROCKCHIP=y
>> +CONFIG_MMC_SDHCI=y
>> +CONFIG_MMC_SDHCI_SDMA=y
>> +CONFIG_MMC_SDHCI_ROCKCHIP=y
>> +CONFIG_SF_DEFAULT_BUS=5
>> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>> +CONFIG_SPI_FLASH_XMC=y
>> +CONFIG_SPI_FLASH_XTX=y
>> +CONFIG_PHY_MOTORCOMM=y
>> +CONFIG_DWC_ETH_QOS=y
>> +CONFIG_DWC_ETH_QOS_ROCKCHIP=y
>> +CONFIG_NVME_PCI=y
>> +CONFIG_PCIE_DW_ROCKCHIP=y
>> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>> +CONFIG_PHY_ROCKCHIP_USBDP=y
>> +CONFIG_SPL_PINCTRL=y
>> +CONFIG_PWM_ROCKCHIP=y
>> +CONFIG_SPL_RAM=y
>> +CONFIG_SCSI=y
>> +CONFIG_BAUDRATE=1500000
>> +CONFIG_DEBUG_UART_SHIFT=2
>> +CONFIG_SYS_NS16550_MEM32=y
>> +CONFIG_ROCKCHIP_SFC=y
>> +CONFIG_SYSRESET=y
>> +CONFIG_USB=y
>> +CONFIG_USB_XHCI_HCD=y
>> +CONFIG_USB_EHCI_HCD=y
>> +CONFIG_USB_EHCI_GENERIC=y
>> +CONFIG_USB_OHCI_HCD=y
>> +CONFIG_USB_OHCI_GENERIC=y
>> +CONFIG_USB_DWC3=y
>> +CONFIG_USB_DWC3_GENERIC=y
>> +CONFIG_ERRNO_STR=y
>
>Is there any reason for NOT enabling MMC_HS400_ES?
No, I just follow the config of other rk3588/s based boards.
It seems that there are no rk3588/s based boards enable MMC_HS400_ES in the current u-boot mainline ?
>
>Cheers,
>Quentin
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B
2024-02-15 10:35 ` Andy Yan
@ 2024-02-15 10:40 ` Quentin Schulz
2024-02-15 11:55 ` Andy Yan
0 siblings, 1 reply; 8+ messages in thread
From: Quentin Schulz @ 2024-02-15 10:40 UTC (permalink / raw)
To: Andy Yan; +Cc: kever.yang, jonas, u-boot
Hi Andy,
On 2/15/24 11:35, Andy Yan wrote:
[...]
>>> diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig
>>> new file mode 100644
>>> index 0000000000..3e3e5abc86
>>> --- /dev/null
>>> +++ b/configs/coolpi-4b-rk3588s_defconfig
>>> @@ -0,0 +1,105 @@
>>> +CONFIG_ARM=y
>>> +CONFIG_SKIP_LOWLEVEL_INIT=y
>>> +CONFIG_COUNTER_FREQUENCY=24000000
>>> +CONFIG_ARCH_ROCKCHIP=y
>>> +CONFIG_TEXT_BASE=0x00a00000
>>> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
>>> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
>>> +CONFIG_NR_DRAM_BANKS=2
>>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
>>> +CONFIG_SF_DEFAULT_SPEED=24000000
>>> +CONFIG_SF_DEFAULT_MODE=0x2000
>>> +CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
>>> +CONFIG_ROCKCHIP_RK3588=y
>>> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
>>> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>>> +CONFIG_SPL_SERIAL=y
>>> +CONFIG_SPL_STACK_R_ADDR=0x600000
>>> +CONFIG_TARGET_EVB_RK3588=y
>>> +CONFIG_SPL_STACK=0x400000
>>> +CONFIG_DEBUG_UART_BASE=0xFEB50000
>>> +CONFIG_DEBUG_UART_CLOCK=24000000
>>> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
>>> +CONFIG_SPL_SPI=y
>>> +CONFIG_SYS_LOAD_ADDR=0xc00800
>>> +CONFIG_PCI=y
>>> +CONFIG_DEBUG_UART=y
>>> +CONFIG_AHCI=y
>>> +CONFIG_FIT=y
>>> +CONFIG_FIT_VERBOSE=y
>>> +CONFIG_SPL_FIT_SIGNATURE=y
>>> +CONFIG_SPL_LOAD_FIT=y
>>> +CONFIG_LEGACY_IMAGE_FORMAT=y
>>> +CONFIG_OF_BOARD_SETUP=y
>>> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb"
>>> +# CONFIG_DISPLAY_CPUINFO is not set
>>> +CONFIG_DISPLAY_BOARDINFO_LATE=y
>>> +CONFIG_SPL_MAX_SIZE=0x40000
>>> +CONFIG_SPL_PAD_TO=0x7f8000
>>> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>>> +CONFIG_SPL_BSS_START_ADDR=0x4000000
>>> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
>>> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
>>> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>>> +CONFIG_SPL_STACK_R=y
>>> +CONFIG_SPL_SPI_LOAD=y
>>> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>>> +CONFIG_SPL_ATF=y
>>> +CONFIG_CMD_GPIO=y
>>> +CONFIG_CMD_GPT=y
>>> +CONFIG_CMD_I2C=y
>>> +CONFIG_CMD_MMC=y
>>> +CONFIG_CMD_PCI=y
>>> +CONFIG_CMD_USB=y
>>> +# CONFIG_CMD_SETEXPR is not set
>>> +CONFIG_CMD_REGULATOR=y
>>> +# CONFIG_SPL_DOS_PARTITION is not set
>>> +CONFIG_SPL_OF_CONTROL=y
>>> +CONFIG_OF_LIVE=y
>>> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>>> +CONFIG_SPL_REGMAP=y
>>> +CONFIG_SPL_SYSCON=y
>>> +CONFIG_AHCI_PCI=y
>>> +CONFIG_DWC_AHCI=y
>>> +CONFIG_SPL_CLK=y
>>> +CONFIG_ROCKCHIP_GPIO=y
>>> +CONFIG_SYS_I2C_ROCKCHIP=y
>>> +CONFIG_MISC=y
>>> +CONFIG_SUPPORT_EMMC_RPMB=y
>>> +CONFIG_MMC_DW=y
>>> +CONFIG_MMC_DW_ROCKCHIP=y
>>> +CONFIG_MMC_SDHCI=y
>>> +CONFIG_MMC_SDHCI_SDMA=y
>>> +CONFIG_MMC_SDHCI_ROCKCHIP=y
>>> +CONFIG_SF_DEFAULT_BUS=5
>>> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>>> +CONFIG_SPI_FLASH_XMC=y
>>> +CONFIG_SPI_FLASH_XTX=y
>>> +CONFIG_PHY_MOTORCOMM=y
>>> +CONFIG_DWC_ETH_QOS=y
>>> +CONFIG_DWC_ETH_QOS_ROCKCHIP=y
>>> +CONFIG_NVME_PCI=y
>>> +CONFIG_PCIE_DW_ROCKCHIP=y
>>> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>>> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>>> +CONFIG_PHY_ROCKCHIP_USBDP=y
>>> +CONFIG_SPL_PINCTRL=y
>>> +CONFIG_PWM_ROCKCHIP=y
>>> +CONFIG_SPL_RAM=y
>>> +CONFIG_SCSI=y
>>> +CONFIG_BAUDRATE=1500000
>>> +CONFIG_DEBUG_UART_SHIFT=2
>>> +CONFIG_SYS_NS16550_MEM32=y
>>> +CONFIG_ROCKCHIP_SFC=y
>>> +CONFIG_SYSRESET=y
>>> +CONFIG_USB=y
>>> +CONFIG_USB_XHCI_HCD=y
>>> +CONFIG_USB_EHCI_HCD=y
>>> +CONFIG_USB_EHCI_GENERIC=y
>>> +CONFIG_USB_OHCI_HCD=y
>>> +CONFIG_USB_OHCI_GENERIC=y
>>> +CONFIG_USB_DWC3=y
>>> +CONFIG_USB_DWC3_GENERIC=y
>>> +CONFIG_ERRNO_STR=y
>>
>> Is there any reason for NOT enabling MMC_HS400_ES?
>
> No, I just follow the config of other rk3588/s based boards.
Fortunately enough, a patch was recently merged to have at least HS200
on RK3588, which is the first mode that actually works, anything below
that is broken right now.
> It seems that there are no rk3588/s based boards enable MMC_HS400_ES in the current u-boot mainline ?
>
Jaguar is hopefully coming soon-ish, maybe not in this release but the
next one (patches are sent already), and we make us of it in U-Boot
proper and the SPL. Up to you, can always be enabled later on.
FWIW, both comments on this patch also apply to the second patch in this
series :)
Cheers,
Quentin
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re:Re: [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B
2024-02-15 10:40 ` Quentin Schulz
@ 2024-02-15 11:55 ` Andy Yan
2024-02-15 12:42 ` Quentin Schulz
0 siblings, 1 reply; 8+ messages in thread
From: Andy Yan @ 2024-02-15 11:55 UTC (permalink / raw)
To: Quentin Schulz; +Cc: kever.yang, jonas, u-boot
Hi Quentin：
At 2024-02-15 18:40:25, "Quentin Schulz" <quentin.schulz@theobroma-systems.com> wrote:
>Hi Andy,
>
>On 2/15/24 11:35, Andy Yan wrote:
>[...]
>>>> diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig
>>>> new file mode 100644
>>>> index 0000000000..3e3e5abc86
>>>> --- /dev/null
>>>> +++ b/configs/coolpi-4b-rk3588s_defconfig
>>>> @@ -0,0 +1,105 @@
>>>> +CONFIG_ARM=y
>>>> +CONFIG_SKIP_LOWLEVEL_INIT=y
>>>> +CONFIG_COUNTER_FREQUENCY=24000000
>>>> +CONFIG_ARCH_ROCKCHIP=y
>>>> +CONFIG_TEXT_BASE=0x00a00000
>>>> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
>>>> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
>>>> +CONFIG_NR_DRAM_BANKS=2
>>>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>>>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
>>>> +CONFIG_SF_DEFAULT_SPEED=24000000
>>>> +CONFIG_SF_DEFAULT_MODE=0x2000
>>>> +CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
>>>> +CONFIG_ROCKCHIP_RK3588=y
>>>> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
>>>> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>>>> +CONFIG_SPL_SERIAL=y
>>>> +CONFIG_SPL_STACK_R_ADDR=0x600000
>>>> +CONFIG_TARGET_EVB_RK3588=y
>>>> +CONFIG_SPL_STACK=0x400000
>>>> +CONFIG_DEBUG_UART_BASE=0xFEB50000
>>>> +CONFIG_DEBUG_UART_CLOCK=24000000
>>>> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
>>>> +CONFIG_SPL_SPI=y
>>>> +CONFIG_SYS_LOAD_ADDR=0xc00800
>>>> +CONFIG_PCI=y
>>>> +CONFIG_DEBUG_UART=y
>>>> +CONFIG_AHCI=y
>>>> +CONFIG_FIT=y
>>>> +CONFIG_FIT_VERBOSE=y
>>>> +CONFIG_SPL_FIT_SIGNATURE=y
>>>> +CONFIG_SPL_LOAD_FIT=y
>>>> +CONFIG_LEGACY_IMAGE_FORMAT=y
>>>> +CONFIG_OF_BOARD_SETUP=y
>>>> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb"
>>>> +# CONFIG_DISPLAY_CPUINFO is not set
>>>> +CONFIG_DISPLAY_BOARDINFO_LATE=y
>>>> +CONFIG_SPL_MAX_SIZE=0x40000
>>>> +CONFIG_SPL_PAD_TO=0x7f8000
>>>> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>>>> +CONFIG_SPL_BSS_START_ADDR=0x4000000
>>>> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
>>>> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
>>>> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>>>> +CONFIG_SPL_STACK_R=y
>>>> +CONFIG_SPL_SPI_LOAD=y
>>>> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>>>> +CONFIG_SPL_ATF=y
>>>> +CONFIG_CMD_GPIO=y
>>>> +CONFIG_CMD_GPT=y
>>>> +CONFIG_CMD_I2C=y
>>>> +CONFIG_CMD_MMC=y
>>>> +CONFIG_CMD_PCI=y
>>>> +CONFIG_CMD_USB=y
>>>> +# CONFIG_CMD_SETEXPR is not set
>>>> +CONFIG_CMD_REGULATOR=y
>>>> +# CONFIG_SPL_DOS_PARTITION is not set
>>>> +CONFIG_SPL_OF_CONTROL=y
>>>> +CONFIG_OF_LIVE=y
>>>> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>>>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>>>> +CONFIG_SPL_REGMAP=y
>>>> +CONFIG_SPL_SYSCON=y
>>>> +CONFIG_AHCI_PCI=y
>>>> +CONFIG_DWC_AHCI=y
>>>> +CONFIG_SPL_CLK=y
>>>> +CONFIG_ROCKCHIP_GPIO=y
>>>> +CONFIG_SYS_I2C_ROCKCHIP=y
>>>> +CONFIG_MISC=y
>>>> +CONFIG_SUPPORT_EMMC_RPMB=y
>>>> +CONFIG_MMC_DW=y
>>>> +CONFIG_MMC_DW_ROCKCHIP=y
>>>> +CONFIG_MMC_SDHCI=y
>>>> +CONFIG_MMC_SDHCI_SDMA=y
>>>> +CONFIG_MMC_SDHCI_ROCKCHIP=y
>>>> +CONFIG_SF_DEFAULT_BUS=5
>>>> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>>>> +CONFIG_SPI_FLASH_XMC=y
>>>> +CONFIG_SPI_FLASH_XTX=y
>>>> +CONFIG_PHY_MOTORCOMM=y
>>>> +CONFIG_DWC_ETH_QOS=y
>>>> +CONFIG_DWC_ETH_QOS_ROCKCHIP=y
>>>> +CONFIG_NVME_PCI=y
>>>> +CONFIG_PCIE_DW_ROCKCHIP=y
>>>> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>>>> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>>>> +CONFIG_PHY_ROCKCHIP_USBDP=y
>>>> +CONFIG_SPL_PINCTRL=y
>>>> +CONFIG_PWM_ROCKCHIP=y
>>>> +CONFIG_SPL_RAM=y
>>>> +CONFIG_SCSI=y
>>>> +CONFIG_BAUDRATE=1500000
>>>> +CONFIG_DEBUG_UART_SHIFT=2
>>>> +CONFIG_SYS_NS16550_MEM32=y
>>>> +CONFIG_ROCKCHIP_SFC=y
>>>> +CONFIG_SYSRESET=y
>>>> +CONFIG_USB=y
>>>> +CONFIG_USB_XHCI_HCD=y
>>>> +CONFIG_USB_EHCI_HCD=y
>>>> +CONFIG_USB_EHCI_GENERIC=y
>>>> +CONFIG_USB_OHCI_HCD=y
>>>> +CONFIG_USB_OHCI_GENERIC=y
>>>> +CONFIG_USB_DWC3=y
>>>> +CONFIG_USB_DWC3_GENERIC=y
>>>> +CONFIG_ERRNO_STR=y
>>>
>>> Is there any reason for NOT enabling MMC_HS400_ES?
>>
>> No, I just follow the config of other rk3588/s based boards.
>
>Fortunately enough, a patch was recently merged to have at least HS200
>on RK3588, which is the first mode that actually works, anything below
>that is broken right now.
>
>> It seems that there are no rk3588/s based boards enable MMC_HS400_ES in the current u-boot mainline ?
>>
>
>Jaguar is hopefully coming soon-ish, maybe not in this release but the
>next one (patches are sent already), and we make us of it in U-Boot
>proper and the SPL. Up to you, can always be enabled later on.
With a quick search， I fond jonas'S patch for enabling HS200 has been merged, but
your patch will bring HS400_ES, does that mean all the rk3588/s based boars will switch to
HS400 ES if they support it?
Thanks.
>
>FWIW, both comments on this patch also apply to the second patch in this
>series :)
>
>Cheers,
>Quentin
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B
2024-02-15 11:55 ` Andy Yan
@ 2024-02-15 12:42 ` Quentin Schulz
2024-02-16 11:37 ` Andy Yan
0 siblings, 1 reply; 8+ messages in thread
From: Quentin Schulz @ 2024-02-15 12:42 UTC (permalink / raw)
To: Andy Yan; +Cc: kever.yang, jonas, u-boot
Hi Andy,
On 2/15/24 12:55, Andy Yan wrote:
> [You don't often get email from andyshrk@163.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> Hi Quentin：
> At 2024-02-15 18:40:25, "Quentin Schulz" <quentin.schulz@theobroma-systems.com> wrote:
>> Hi Andy,
>>
>> On 2/15/24 11:35, Andy Yan wrote:
>> [...]
>>>>> diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig
>>>>> new file mode 100644
>>>>> index 0000000000..3e3e5abc86
>>>>> --- /dev/null
>>>>> +++ b/configs/coolpi-4b-rk3588s_defconfig
>>>>> @@ -0,0 +1,105 @@
>>>>> +CONFIG_ARM=y
>>>>> +CONFIG_SKIP_LOWLEVEL_INIT=y
>>>>> +CONFIG_COUNTER_FREQUENCY=24000000
>>>>> +CONFIG_ARCH_ROCKCHIP=y
>>>>> +CONFIG_TEXT_BASE=0x00a00000
>>>>> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
>>>>> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
>>>>> +CONFIG_NR_DRAM_BANKS=2
>>>>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>>>>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
>>>>> +CONFIG_SF_DEFAULT_SPEED=24000000
>>>>> +CONFIG_SF_DEFAULT_MODE=0x2000
>>>>> +CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
>>>>> +CONFIG_ROCKCHIP_RK3588=y
>>>>> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
>>>>> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>>>>> +CONFIG_SPL_SERIAL=y
>>>>> +CONFIG_SPL_STACK_R_ADDR=0x600000
>>>>> +CONFIG_TARGET_EVB_RK3588=y
>>>>> +CONFIG_SPL_STACK=0x400000
>>>>> +CONFIG_DEBUG_UART_BASE=0xFEB50000
>>>>> +CONFIG_DEBUG_UART_CLOCK=24000000
>>>>> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
>>>>> +CONFIG_SPL_SPI=y
>>>>> +CONFIG_SYS_LOAD_ADDR=0xc00800
>>>>> +CONFIG_PCI=y
>>>>> +CONFIG_DEBUG_UART=y
>>>>> +CONFIG_AHCI=y
>>>>> +CONFIG_FIT=y
>>>>> +CONFIG_FIT_VERBOSE=y
>>>>> +CONFIG_SPL_FIT_SIGNATURE=y
>>>>> +CONFIG_SPL_LOAD_FIT=y
>>>>> +CONFIG_LEGACY_IMAGE_FORMAT=y
>>>>> +CONFIG_OF_BOARD_SETUP=y
>>>>> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb"
>>>>> +# CONFIG_DISPLAY_CPUINFO is not set
>>>>> +CONFIG_DISPLAY_BOARDINFO_LATE=y
>>>>> +CONFIG_SPL_MAX_SIZE=0x40000
>>>>> +CONFIG_SPL_PAD_TO=0x7f8000
>>>>> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>>>>> +CONFIG_SPL_BSS_START_ADDR=0x4000000
>>>>> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
>>>>> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
>>>>> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>>>>> +CONFIG_SPL_STACK_R=y
>>>>> +CONFIG_SPL_SPI_LOAD=y
>>>>> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>>>>> +CONFIG_SPL_ATF=y
>>>>> +CONFIG_CMD_GPIO=y
>>>>> +CONFIG_CMD_GPT=y
>>>>> +CONFIG_CMD_I2C=y
>>>>> +CONFIG_CMD_MMC=y
>>>>> +CONFIG_CMD_PCI=y
>>>>> +CONFIG_CMD_USB=y
>>>>> +# CONFIG_CMD_SETEXPR is not set
>>>>> +CONFIG_CMD_REGULATOR=y
>>>>> +# CONFIG_SPL_DOS_PARTITION is not set
>>>>> +CONFIG_SPL_OF_CONTROL=y
>>>>> +CONFIG_OF_LIVE=y
>>>>> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>>>>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>>>>> +CONFIG_SPL_REGMAP=y
>>>>> +CONFIG_SPL_SYSCON=y
>>>>> +CONFIG_AHCI_PCI=y
>>>>> +CONFIG_DWC_AHCI=y
>>>>> +CONFIG_SPL_CLK=y
>>>>> +CONFIG_ROCKCHIP_GPIO=y
>>>>> +CONFIG_SYS_I2C_ROCKCHIP=y
>>>>> +CONFIG_MISC=y
>>>>> +CONFIG_SUPPORT_EMMC_RPMB=y
>>>>> +CONFIG_MMC_DW=y
>>>>> +CONFIG_MMC_DW_ROCKCHIP=y
>>>>> +CONFIG_MMC_SDHCI=y
>>>>> +CONFIG_MMC_SDHCI_SDMA=y
>>>>> +CONFIG_MMC_SDHCI_ROCKCHIP=y
>>>>> +CONFIG_SF_DEFAULT_BUS=5
>>>>> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>>>>> +CONFIG_SPI_FLASH_XMC=y
>>>>> +CONFIG_SPI_FLASH_XTX=y
>>>>> +CONFIG_PHY_MOTORCOMM=y
>>>>> +CONFIG_DWC_ETH_QOS=y
>>>>> +CONFIG_DWC_ETH_QOS_ROCKCHIP=y
>>>>> +CONFIG_NVME_PCI=y
>>>>> +CONFIG_PCIE_DW_ROCKCHIP=y
>>>>> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>>>>> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>>>>> +CONFIG_PHY_ROCKCHIP_USBDP=y
>>>>> +CONFIG_SPL_PINCTRL=y
>>>>> +CONFIG_PWM_ROCKCHIP=y
>>>>> +CONFIG_SPL_RAM=y
>>>>> +CONFIG_SCSI=y
>>>>> +CONFIG_BAUDRATE=1500000
>>>>> +CONFIG_DEBUG_UART_SHIFT=2
>>>>> +CONFIG_SYS_NS16550_MEM32=y
>>>>> +CONFIG_ROCKCHIP_SFC=y
>>>>> +CONFIG_SYSRESET=y
>>>>> +CONFIG_USB=y
>>>>> +CONFIG_USB_XHCI_HCD=y
>>>>> +CONFIG_USB_EHCI_HCD=y
>>>>> +CONFIG_USB_EHCI_GENERIC=y
>>>>> +CONFIG_USB_OHCI_HCD=y
>>>>> +CONFIG_USB_OHCI_GENERIC=y
>>>>> +CONFIG_USB_DWC3=y
>>>>> +CONFIG_USB_DWC3_GENERIC=y
>>>>> +CONFIG_ERRNO_STR=y
>>>>
>>>> Is there any reason for NOT enabling MMC_HS400_ES?
>>>
>>> No, I just follow the config of other rk3588/s based boards.
>>
>> Fortunately enough, a patch was recently merged to have at least HS200
>> on RK3588, which is the first mode that actually works, anything below
>> that is broken right now.
>>
>>> It seems that there are no rk3588/s based boards enable MMC_HS400_ES in the current u-boot mainline ?
>>>
>>
>> Jaguar is hopefully coming soon-ish, maybe not in this release but the
>> next one (patches are sent already), and we make us of it in U-Boot
>> proper and the SPL. Up to you, can always be enabled later on.
>
> With a quick search， I fond jonas'S patch for enabling HS200 has been merged, but
> your patch will bring HS400_ES, does that mean all the rk3588/s based boars will switch to
> HS400 ES if they support it?
>
No, it's on a per-board basis. Not all eMMC or boards support
HS400/HS400_ES, it depends on the signal quality/integrity and the eMMC
chip itself if I'm not mistaken. If I remember correctly, Jonas had some
RK3588 boards which didn't work with HS400/HS400_ES (probably one of
those boards with the eMMC that is plugged in?).
Now to come to think of it... I don't know how/why HS400 isn't enabled
only when it's present in the DTB?
Cheers,
Quentin
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re:Re: [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B
2024-02-15 12:42 ` Quentin Schulz
@ 2024-02-16 11:37 ` Andy Yan
0 siblings, 0 replies; 8+ messages in thread
From: Andy Yan @ 2024-02-16 11:37 UTC (permalink / raw)
To: Quentin Schulz; +Cc: kever.yang, jonas, u-boot
Hi Quentin：
在 2024-02-15 20:42:56，"Quentin Schulz" <quentin.schulz@theobroma-systems.com> 写道：
>Hi Andy,
>
>On 2/15/24 12:55, Andy Yan wrote:
>> [You don't often get email from andyshrk@163.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>>
>> Hi Quentin：
>> At 2024-02-15 18:40:25, "Quentin Schulz" <quentin.schulz@theobroma-systems.com> wrote:
>>> Hi Andy,
>>>
>>> On 2/15/24 11:35, Andy Yan wrote:
>>> [...]
>>>>>> diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig
>>>>>> new file mode 100644
>>>>>> index 0000000000..3e3e5abc86
>>>>>> --- /dev/null
>>>>>> +++ b/configs/coolpi-4b-rk3588s_defconfig
>>>>>> @@ -0,0 +1,105 @@
>>>>>> +CONFIG_ARM=y
>>>>>> +CONFIG_SKIP_LOWLEVEL_INIT=y
>>>>>> +CONFIG_COUNTER_FREQUENCY=24000000
>>>>>> +CONFIG_ARCH_ROCKCHIP=y
>>>>>> +CONFIG_TEXT_BASE=0x00a00000
>>>>>> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
>>>>>> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
>>>>>> +CONFIG_NR_DRAM_BANKS=2
>>>>>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>>>>>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
>>>>>> +CONFIG_SF_DEFAULT_SPEED=24000000
>>>>>> +CONFIG_SF_DEFAULT_MODE=0x2000
>>>>>> +CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
>>>>>> +CONFIG_ROCKCHIP_RK3588=y
>>>>>> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
>>>>>> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>>>>>> +CONFIG_SPL_SERIAL=y
>>>>>> +CONFIG_SPL_STACK_R_ADDR=0x600000
>>>>>> +CONFIG_TARGET_EVB_RK3588=y
>>>>>> +CONFIG_SPL_STACK=0x400000
>>>>>> +CONFIG_DEBUG_UART_BASE=0xFEB50000
>>>>>> +CONFIG_DEBUG_UART_CLOCK=24000000
>>>>>> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
>>>>>> +CONFIG_SPL_SPI=y
>>>>>> +CONFIG_SYS_LOAD_ADDR=0xc00800
>>>>>> +CONFIG_PCI=y
>>>>>> +CONFIG_DEBUG_UART=y
>>>>>> +CONFIG_AHCI=y
>>>>>> +CONFIG_FIT=y
>>>>>> +CONFIG_FIT_VERBOSE=y
>>>>>> +CONFIG_SPL_FIT_SIGNATURE=y
>>>>>> +CONFIG_SPL_LOAD_FIT=y
>>>>>> +CONFIG_LEGACY_IMAGE_FORMAT=y
>>>>>> +CONFIG_OF_BOARD_SETUP=y
>>>>>> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb"
>>>>>> +# CONFIG_DISPLAY_CPUINFO is not set
>>>>>> +CONFIG_DISPLAY_BOARDINFO_LATE=y
>>>>>> +CONFIG_SPL_MAX_SIZE=0x40000
>>>>>> +CONFIG_SPL_PAD_TO=0x7f8000
>>>>>> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>>>>>> +CONFIG_SPL_BSS_START_ADDR=0x4000000
>>>>>> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
>>>>>> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
>>>>>> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>>>>>> +CONFIG_SPL_STACK_R=y
>>>>>> +CONFIG_SPL_SPI_LOAD=y
>>>>>> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>>>>>> +CONFIG_SPL_ATF=y
>>>>>> +CONFIG_CMD_GPIO=y
>>>>>> +CONFIG_CMD_GPT=y
>>>>>> +CONFIG_CMD_I2C=y
>>>>>> +CONFIG_CMD_MMC=y
>>>>>> +CONFIG_CMD_PCI=y
>>>>>> +CONFIG_CMD_USB=y
>>>>>> +# CONFIG_CMD_SETEXPR is not set
>>>>>> +CONFIG_CMD_REGULATOR=y
>>>>>> +# CONFIG_SPL_DOS_PARTITION is not set
>>>>>> +CONFIG_SPL_OF_CONTROL=y
>>>>>> +CONFIG_OF_LIVE=y
>>>>>> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>>>>>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>>>>>> +CONFIG_SPL_REGMAP=y
>>>>>> +CONFIG_SPL_SYSCON=y
>>>>>> +CONFIG_AHCI_PCI=y
>>>>>> +CONFIG_DWC_AHCI=y
>>>>>> +CONFIG_SPL_CLK=y
>>>>>> +CONFIG_ROCKCHIP_GPIO=y
>>>>>> +CONFIG_SYS_I2C_ROCKCHIP=y
>>>>>> +CONFIG_MISC=y
>>>>>> +CONFIG_SUPPORT_EMMC_RPMB=y
>>>>>> +CONFIG_MMC_DW=y
>>>>>> +CONFIG_MMC_DW_ROCKCHIP=y
>>>>>> +CONFIG_MMC_SDHCI=y
>>>>>> +CONFIG_MMC_SDHCI_SDMA=y
>>>>>> +CONFIG_MMC_SDHCI_ROCKCHIP=y
>>>>>> +CONFIG_SF_DEFAULT_BUS=5
>>>>>> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>>>>>> +CONFIG_SPI_FLASH_XMC=y
>>>>>> +CONFIG_SPI_FLASH_XTX=y
>>>>>> +CONFIG_PHY_MOTORCOMM=y
>>>>>> +CONFIG_DWC_ETH_QOS=y
>>>>>> +CONFIG_DWC_ETH_QOS_ROCKCHIP=y
>>>>>> +CONFIG_NVME_PCI=y
>>>>>> +CONFIG_PCIE_DW_ROCKCHIP=y
>>>>>> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>>>>>> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>>>>>> +CONFIG_PHY_ROCKCHIP_USBDP=y
>>>>>> +CONFIG_SPL_PINCTRL=y
>>>>>> +CONFIG_PWM_ROCKCHIP=y
>>>>>> +CONFIG_SPL_RAM=y
>>>>>> +CONFIG_SCSI=y
>>>>>> +CONFIG_BAUDRATE=1500000
>>>>>> +CONFIG_DEBUG_UART_SHIFT=2
>>>>>> +CONFIG_SYS_NS16550_MEM32=y
>>>>>> +CONFIG_ROCKCHIP_SFC=y
>>>>>> +CONFIG_SYSRESET=y
>>>>>> +CONFIG_USB=y
>>>>>> +CONFIG_USB_XHCI_HCD=y
>>>>>> +CONFIG_USB_EHCI_HCD=y
>>>>>> +CONFIG_USB_EHCI_GENERIC=y
>>>>>> +CONFIG_USB_OHCI_HCD=y
>>>>>> +CONFIG_USB_OHCI_GENERIC=y
>>>>>> +CONFIG_USB_DWC3=y
>>>>>> +CONFIG_USB_DWC3_GENERIC=y
>>>>>> +CONFIG_ERRNO_STR=y
>>>>>
>>>>> Is there any reason for NOT enabling MMC_HS400_ES?
>>>>
>>>> No, I just follow the config of other rk3588/s based boards.
>>>
>>> Fortunately enough, a patch was recently merged to have at least HS200
>>> on RK3588, which is the first mode that actually works, anything below
>>> that is broken right now.
>>>
>>>> It seems that there are no rk3588/s based boards enable MMC_HS400_ES in the current u-boot mainline ?
>>>>
>>>
>>> Jaguar is hopefully coming soon-ish, maybe not in this release but the
>>> next one (patches are sent already), and we make us of it in U-Boot
>>> proper and the SPL. Up to you, can always be enabled later on.
>>
>> With a quick search， I fond jonas'S patch for enabling HS200 has been merged, but
>> your patch will bring HS400_ES, does that mean all the rk3588/s based boars will switch to
>> HS400 ES if they support it?
>>
>
>No, it's on a per-board basis. Not all eMMC or boards support
>HS400/HS400_ES, it depends on the signal quality/integrity and the eMMC
>chip itself if I'm not mistaken. If I remember correctly, Jonas had some
>RK3588 boards which didn't work with HS400/HS400_ES (probably one of
>those boards with the eMMC that is plugged in?).
With the following add to my defconfig：
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_SPL_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_SPL_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
I can see HS400 with mmc ifnfo， but no HS400ES？Maybe the emmc on
the board does not support HS400ES，but I don't have datasheet about the emmc to check it.
With some test , HS400 seems work fine on these two boards, I think I can enable it in the next version.
=> mmc info
Device: mmc@fe2e0000
Manufacturer ID: ec
OEM: 0
Name: AT2S9C
Bus Speed: 200000000
Mode: HS400 (200MHz)
Rd Block Len: 512
MMC version 5.1
High Capacity: Yes
Capacity: 58.2 GiB
Bus Width: 8-bit DDR
Erase Group Size: 512 KiB
HC WP Group Size: 8 MiB
User Capacity: 58.2 GiB WRREL
Boot Capacity: 4 MiB ENH
RPMB Capacity: 4 MiB ENH
Boot area 0 is not write protected
Boot area 1 is not write protected
>
>Now to come to think of it... I don't know how/why HS400 isn't enabled
>only when it's present in the DTB?
>
>Cheers,
>Quentin
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2024-02-16 11:37 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-02-14 9:31 [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B Andy Yan
2024-02-14 9:31 ` [PATCH v2 2/2] board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB Andy Yan
2024-02-14 14:13 ` [PATCH v2 1/2] board: rockchip: Add support for rk3588s based Cool Pi 4B Quentin Schulz
2024-02-15 10:35 ` Andy Yan
2024-02-15 10:40 ` Quentin Schulz
2024-02-15 11:55 ` Andy Yan
2024-02-15 12:42 ` Quentin Schulz
2024-02-16 11:37 ` Andy Yan
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