Re: [PATCH 16/34] clk: sunxi: Add support for the A523 -R CCU

["Jernej Škrabec" <jernej.skrabec@gmail.com>]

Dne nedelja, 23. marec 2025 ob 12:35:26 Srednjeevropski standardni čas je Andre Przywara napisal(a):
> Add a clock driver for the PRCM clock controller on the Allwinner A523
> family of SoCs, often also used with an "r" prefix or suffix.
> This just describes the clock gates and reset lines for the few devices
> that we would need, most prominently the R_I2C device for the PMIC.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  drivers/clk/sunxi/Kconfig      |  7 ++++++
>  drivers/clk/sunxi/Makefile     |  1 +
>  drivers/clk/sunxi/clk_a523_r.c | 44 ++++++++++++++++++++++++++++++++++
>  drivers/clk/sunxi/clk_sunxi.c  |  5 ++++
>  4 files changed, 57 insertions(+)
>  create mode 100644 drivers/clk/sunxi/clk_a523_r.c
> 
> diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig
> index 74e89b86301..1c1cc82719c 100644
> --- a/drivers/clk/sunxi/Kconfig
> +++ b/drivers/clk/sunxi/Kconfig
> @@ -136,4 +136,11 @@ config CLK_SUN55I_A523
>  	  This enables common clock driver support for platforms based
>  	  on Allwinner A523/T527 SoC.
>  
> +config CLK_SUN55I_A523_R
> +	bool "Clock driver for Allwinner A523 generation PRCM"
> +	default MACH_SUN55I_A523
> +	help
> +	  This enables common clock driver support for the PRCM
> +	  in Allwinner A523/T527 SoCs.
> +
>  endif # CLK_SUNXI
> diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
> index dd33eabe2ed..93b542cebcd 100644
> --- a/drivers/clk/sunxi/Makefile
> +++ b/drivers/clk/sunxi/Makefile
> @@ -26,3 +26,4 @@ obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o
>  obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o
>  obj-$(CONFIG_CLK_SUN50I_A100) += clk_a100.o
>  obj-$(CONFIG_CLK_SUN55I_A523) += clk_a523.o
> +obj-$(CONFIG_CLK_SUN55I_A523_R) += clk_a523_r.o
> diff --git a/drivers/clk/sunxi/clk_a523_r.c b/drivers/clk/sunxi/clk_a523_r.c
> new file mode 100644
> index 00000000000..e864ce16199
> --- /dev/null
> +++ b/drivers/clk/sunxi/clk_a523_r.c
> @@ -0,0 +1,44 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2024 Arm Ltd.
> + */
> +
> +#include <clk-uclass.h>
> +#include <dm.h>
> +#include <clk/sunxi.h>
> +#include <dt-bindings/clock/sun55i-a523-r-ccu.h>
> +#include <dt-bindings/reset/sun55i-a523-r-ccu.h>
> +#include <linux/bitops.h>
> +
> +static struct ccu_clk_gate a523_r_gates[] = {
> +	[CLK_R_AHB]             = GATE_DUMMY,
> +	[CLK_R_APB0]            = GATE_DUMMY,
> +	[CLK_R_APB1]            = GATE_DUMMY,
> +	[CLK_BUS_R_TWD]         = GATE(0x12c, BIT(0)),
> +	[CLK_BUS_R_I2C0]        = GATE(0x19c, BIT(0)),
> +	[CLK_BUS_R_I2C1]        = GATE(0x19c, BIT(1)),
> +	[CLK_BUS_R_I2C2]        = GATE(0x19c, BIT(2)),
> +	[CLK_BUS_R_RTC]         = GATE(0x20c, BIT(0)),
> +};
> +
> +static struct ccu_reset a523_r_resets[] = {
> +//	[RST_BUS_R_TIMER]       = RESET(0x11c, BIT(16)),
> +	[RST_BUS_R_TWD]         = RESET(0x12c, BIT(16)),
> +//	[RST_BUS_R_PWMCTRL]     = RESET(0x13c, BIT(16)),
> +//	[RST_BUS_R_SPI]         = RESET(0x15c, BIT(16)),
> +//	[RST_BUS_R_UART0]       = RESET(0x18c, BIT(16)),
> +//	[RST_BUS_R_UART1]       = RESET(0x18c, BIT(17)),
> +	[RST_BUS_R_I2C0]        = RESET(0x19c, BIT(16)),
> +	[RST_BUS_R_I2C1]        = RESET(0x19c, BIT(17)),
> +	[RST_BUS_R_I2C2]        = RESET(0x19c, BIT(18)),
> +//	[RST_BUS_R_PPU1]        = RESET(0x1ac, BIT(17)),
> +	[RST_BUS_R_RTC]         = RESET(0x20c, BIT(16)),
> +//	[RST_BUS_R_CPUCFG]      = RESET(0x22c, BIT(16)),

Any specific reason that you commented out some reset lines?

Best regards,
Jernej

> +};
> +
> +const struct ccu_desc a523_r_ccu_desc = {
> +	.gates = a523_r_gates,
> +	.resets = a523_r_resets,
> +	.num_gates = ARRAY_SIZE(a523_r_gates),
> +	.num_resets = ARRAY_SIZE(a523_r_resets),
> +};
> diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c
> index 30baabaafcd..842a0541bd6 100644
> --- a/drivers/clk/sunxi/clk_sunxi.c
> +++ b/drivers/clk/sunxi/clk_sunxi.c
> @@ -127,6 +127,7 @@ extern const struct ccu_desc h6_r_ccu_desc;
>  extern const struct ccu_desc r40_ccu_desc;
>  extern const struct ccu_desc v3s_ccu_desc;
>  extern const struct ccu_desc a523_ccu_desc;
> +extern const struct ccu_desc a523_r_ccu_desc;
>  
>  static const struct udevice_id sunxi_clk_ids[] = {
>  #ifdef CONFIG_CLK_SUN4I_A10
> @@ -228,6 +229,10 @@ static const struct udevice_id sunxi_clk_ids[] = {
>  #ifdef CONFIG_CLK_SUN55I_A523
>  	{ .compatible = "allwinner,sun55i-a523-ccu",
>  	  .data = (ulong)&a523_ccu_desc },
> +#endif
> +#ifdef CONFIG_CLK_SUN55I_A523_R
> +	{ .compatible = "allwinner,sun55i-a523-r-ccu",
> +	  .data = (ulong)&a523_r_ccu_desc },
>  #endif
>  	{ }
>  };
>