[PATCH v2 0/6] MPFS: add hardware RNG support and fix RNG consumers

[PATCH v2 0/6] MPFS: add hardware RNG support and fix RNG consumers

[Jamie Gibbons]

Hi all,

This series adds support for the hardware random number generator (RNG) on
the Microchip PolarFire SoC (MPFS) and fixes several related issues
uncovered during integration and testing.

The MPFS hardware RNG is accessed indirectly via the MPFS system
controller using the mailbox interface. Unlike typical memory-mapped RNGs,
the system controller mailbox is shared and non‑reentrant, which
introduces integration challenges in U‑Boot’s synchronous, polled
execution model during early boot.
While integrating the RNG support, testing revealed that mailbox requests
issued during autoboot could fail spuriously due to transient mailbox
BUSY states. Investigation showed that the MPFS mailbox BUSY indication
reflects multiple phases of the underlying IHC handshake, allowing
U-Boot’s polled model to observe intermediate states that Linux’s
interrupt-driven model normally hides.

This series addresses those challenges in various ways.
1. Adds missing infrastructure in the MPFS system controller driver to
explicitly receive mailbox responses.
2. Binds the MPFS RNG as a sub‑device of the system controller, mirroring
Linux behaviour and avoiding the need for a device tree node.
3. Introduces a new MPFS RNG driver implementing UCLASS_RNG.
4. Enables RNG support in the Microchip PolarFire SoC generic defconfig.
5. Replaces unbounded polling loops with regmap_read_poll_timeout().
6. Replaces an immediate -EBUSY return with a bounded wait for BUSY to
clear, before issuing requests, avoiding spurious early-boot mailbox
failures and allowing KASLR seed generation to complete successfully
during autoboot.

The resulting behaviour matches Linux semantics where practical while
remaining appropriate for U-Boot’s single-threaded execution model.
Interactive RNG usage and boot-time KASLR seed generation both work
reliably after the mailbox sequencing fixes.

All changes have been tested on the PolarFire SoC Icicle Kit ES.

Regards,
Jamie.

v1 -> v2:
- Removal of patch 1/8 (cmd: rng: fix error handling for dm_rng_read())
  after correcting the MPFS RNG driver to follow existing UCLASS_RNG
  semantics (0 on success, negative errno on failure).
- Removal of patch 8/8 (boot: fdt: downgrade KASLR RNG failure to warning)
  after the mailbox sequencing fixes resolved the early-boot RNG failure
  along with the correct return value fix above.
- Moved `DM_RNG` selection into the defconfig enablement patch.
- Removed special-casing of `-EBUSY` in the system controller path.
- Removed informational RNG registration logging.
- Added review/ack tags where applicable.

Jamie Gibbons (6):
  misc: mpfs_syscontroller: add mailbox RX helper for service responses
  misc: mpfs_syscontroller: bind RNG sub-device
  rng: add Microchip PolarFire SoC hardware RNG driver
  configs: microchip_mpfs_generic: enable MPFS RNG support
  mailbox: mpfs-mbox: replace unbounded BUSY polling with bounded waits
  mailbox: mpfs: add bounded wait for BUSY to clear before sending
    request

 configs/microchip_mpfs_generic_defconfig |   3 +
 drivers/mailbox/mpfs-mbox.c              |  27 ++++--
 drivers/misc/mpfs_syscontroller.c        |  36 +++++++-
 drivers/rng/Kconfig                      |   7 ++
 drivers/rng/Makefile                     |   1 +
 drivers/rng/mpfs_rng.c                   | 101 +++++++++++++++++++++++
 include/mpfs-mailbox.h                   |   2 +
 7 files changed, 165 insertions(+), 12 deletions(-)
 create mode 100644 drivers/rng/mpfs_rng.c

-- 
2.43.0

[PATCH v2 1/6] misc: mpfs_syscontroller: add mailbox RX helper for service responses

[Jamie Gibbons]

The MPFS system controller run_service() helper only submits the mailbox
request but does not read back the response data. However, the caller
must explicitly receive the response.

Add a public system controller helper to receive mailbox service
responses to populate the response buffer after issuing a system
controller request.

Without this, the drivers copy uninitialised stack data instead of
mailbox response data, resulting in deterministic output.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/misc/mpfs_syscontroller.c | 30 ++++++++++++++++++++++++++----
 include/mpfs-mailbox.h            |  2 ++
 2 files changed, 28 insertions(+), 4 deletions(-)

diff --git a/drivers/misc/mpfs_syscontroller.c b/drivers/misc/mpfs_syscontroller.c
index f608d5518b0..8803263ca4c 100644
--- a/drivers/misc/mpfs_syscontroller.c
+++ b/drivers/misc/mpfs_syscontroller.c
@@ -85,6 +85,30 @@ int mpfs_syscontroller_run_service(struct mpfs_syscontroller_priv *sys_controlle
 }
 EXPORT_SYMBOL_GPL(mpfs_syscontroller_run_service);
 
+/**
+ * mpfs_syscontroller_recv_response() - Receive the MPFS system service response
+ * @sys_controller:	MPFS system controller instance
+ * @msg:			System service message
+ * @timeout_ms:		Timeout in milliseconds
+ *
+ * Receive the mailbox response for a previously issued MPFS system
+ * controller service request and populate the response buffer.
+ *
+ * Return: 0 if all goes good, else appropriate error message.
+ */
+int mpfs_syscontroller_recv_response(struct mpfs_syscontroller_priv *sys_controller, struct
+	mpfs_mss_msg * msg, unsigned long timeout_ms)
+{
+	int ret;
+
+	ret = mbox_recv(&sys_controller->chan, msg, timeout_ms);
+	if (ret)
+		dev_err(sys_controller->chan.dev, "Service failed: %d, abort. Failure: %u\n", ret,
+			msg->response->resp_status);
+	return ret;
+}
+EXPORT_SYMBOL_GPL(mpfs_syscontroller_recv_response);
+
 /**
  * mpfs_syscontroller_read_sernum() - Use system service to read the device serial number
  * @sys_serv_priv:	system service private data
@@ -116,11 +140,9 @@ int mpfs_syscontroller_read_sernum(struct mpfs_sys_serv *sys_serv_priv, u8 *devi
 	}
 
 	/* Receive the response */
-	ret = mbox_recv(&sys_serv_priv->sys_controller->chan, &msg, timeoutsecs);
-	if (ret) {
-		dev_err(sys_serv_priv->sys_controller->chan.dev, "Service failed: %d, abort. Failure: %u\n", ret, msg.response->resp_status);
+	ret = mpfs_syscontroller_recv_response(sys_serv_priv->sys_controller, &msg, timeoutsecs);
+	if (ret)
 		return ret;
-	}
 
 	debug("%s: Read successful %s\n",
 	      __func__, sys_serv_priv->sys_controller->chan.dev->name);
diff --git a/include/mpfs-mailbox.h b/include/mpfs-mailbox.h
index c0ff327a4ce..39c998e4c8d 100644
--- a/include/mpfs-mailbox.h
+++ b/include/mpfs-mailbox.h
@@ -58,6 +58,8 @@ struct mpfs_sys_serv {
 };
 
 int mpfs_syscontroller_run_service(struct mpfs_syscontroller_priv *sys_controller, struct mpfs_mss_msg *msg);
+int mpfs_syscontroller_recv_response(struct mpfs_syscontroller_priv
+	*sys_controller, struct mpfs_mss_msg *msg, unsigned long timeout_ms);
 int mpfs_syscontroller_read_sernum(struct mpfs_sys_serv *sys_serv_priv, u8 *device_serial_number);
 void mpfs_syscontroller_process_dtbo(struct mpfs_sys_serv *sys_serv_priv);
 struct mpfs_syscontroller_priv *mpfs_syscontroller_get(struct udevice *dev);
-- 
2.43.0

[PATCH v2 2/6] misc: mpfs_syscontroller: bind RNG sub-device

[Jamie Gibbons]

The MPFS RNG driver is not described by the device tree and is instead
registered dynamically by the system controller. Explicitly bind the
MPFS RNG driver as a child device during system controller probe.

This ensures the RNG device is instantiated and available via UCLASS_RNG
without requiring a device tree node.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/misc/mpfs_syscontroller.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/misc/mpfs_syscontroller.c b/drivers/misc/mpfs_syscontroller.c
index 8803263ca4c..e20f183be3b 100644
--- a/drivers/misc/mpfs_syscontroller.c
+++ b/drivers/misc/mpfs_syscontroller.c
@@ -11,6 +11,7 @@
 #include <asm/system.h>
 #include <dm.h>
 #include <dm/device_compat.h>
+#include <dm/lists.h>
 #include <env.h>
 #include <errno.h>
 #include <linux/compat.h>
@@ -334,6 +335,7 @@ EXPORT_SYMBOL(mpfs_syscontroller_process_dtbo);
 static int mpfs_syscontroller_probe(struct udevice *dev)
 {
 	struct mpfs_syscontroller_priv *sys_controller = dev_get_priv(dev);
+	struct udevice *rng_dev;
 	int ret;
 
 	ret = mbox_get_by_index(dev, 0, &sys_controller->chan);
@@ -343,6 +345,10 @@ static int mpfs_syscontroller_probe(struct udevice *dev)
 		return ret;
 	}
 
+	ret = device_bind_driver(dev, "mpfs_rng", "mpfs-rng", &rng_dev);
+	if (ret)
+		dev_err(dev, "Failed to bind mpfs_rng: %d\n", ret);
+
 	init_completion(&sys_controller->c);
 	dev_info(dev, "Registered MPFS system controller\n");
 
-- 
2.43.0

[PATCH v2 3/6] rng: add Microchip PolarFire SoC hardware RNG driver

[Jamie Gibbons]

Add a U-Boot RNG driver for Microchip's PolarFire SoC (MPFS). The
hardware RNG is accessed indirectly via the MPFS system controller using
the mailbox interface.

The driver implements the UCLASS_RNG interface, requesting random data
from the system controller and returning it to the caller.

This allows use of the PolarFire SoC hardware RNG via the
standard 'rng' command and DM RNG API.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 drivers/rng/Kconfig    |   7 +++
 drivers/rng/Makefile   |   1 +
 drivers/rng/mpfs_rng.c | 101 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 109 insertions(+)
 create mode 100644 drivers/rng/mpfs_rng.c

diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index 19b2b707677..856ffda2f5e 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -23,6 +23,13 @@ config RNG_MESON
 	  Enable support for hardware random number generator
 	  of Amlogic Meson SoCs.
 
+config RNG_MPFS
+	tristate "Microchip PolarFire SoC Random Number Generator support"
+	depends on DM_RNG && MPFS_SYSCONTROLLER
+	help
+	  Enable support for hardware random number generator
+	  of Microchip's PolarFire SoCs.
+
 config RNG_SANDBOX
 	bool "Sandbox random number generator"
 	depends on SANDBOX
diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
index 30c58272d41..50622d4705f 100644
--- a/drivers/rng/Makefile
+++ b/drivers/rng/Makefile
@@ -5,6 +5,7 @@
 
 obj-$(CONFIG_$(PHASE_)DM_RNG) += rng-uclass.o
 obj-$(CONFIG_RNG_MESON) += meson-rng.o
+obj-$(CONFIG_RNG_MPFS) += mpfs_rng.o
 obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
 obj-$(CONFIG_RNG_MSM) += msm_rng.o
 obj-$(CONFIG_RNG_NPCM) += npcm_rng.o
diff --git a/drivers/rng/mpfs_rng.c b/drivers/rng/mpfs_rng.c
new file mode 100644
index 00000000000..820103a0202
--- /dev/null
+++ b/drivers/rng/mpfs_rng.c
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Microchip's PolarFire SoC (MPFS) System Controller Driver
+ *
+ * Copyright (C) 2026 Microchip Technology Inc. All rights reserved.
+ *
+ * Author: Jamie Gibbons <jamie.gibbons@microchip.com>
+ *
+ */
+
+#include <dm.h>
+#include <dm/device.h>
+#include <dm/device_compat.h>
+#include <dm/devres.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/printk.h>
+#include <mailbox.h>
+#include <malloc.h>
+#include <mpfs-mailbox.h>
+#include <rng.h>
+#include <string.h>
+
+#define CMD_OPCODE						0x21
+#define CMD_DATA_SIZE					0U
+#define CMD_DATA						NULL
+#define MBOX_OFFSET						0U
+#define RESP_OFFSET						0U
+#define RNG_RESP_BYTES					32U
+
+/**
+ * struct mpfs_rng_priv - Structure representing System Controller data.
+ * @mpfs_syscontroller_priv:	System Controller
+ */
+struct mpfs_rng_priv {
+	struct mpfs_syscontroller_priv *sys_controller;
+};
+
+static int mpfs_rng_read(struct udevice *dev, void *data, size_t len)
+{
+	struct mpfs_rng_priv *rng_priv = dev_get_priv(dev);
+	u32 response_msg[RNG_RESP_BYTES / sizeof(u32)];
+	size_t count = 0, copy_size;
+	int ret;
+
+	struct mpfs_mss_response response = {
+		.resp_status = 0U,
+		.resp_msg = (u32 *)response_msg,
+		.resp_size = RNG_RESP_BYTES,
+	};
+	struct mpfs_mss_msg msg = {
+		.cmd_opcode = CMD_OPCODE,
+		.cmd_data_size = CMD_DATA_SIZE,
+		.response = &response,
+		.cmd_data = CMD_DATA,
+		.mbox_offset = MBOX_OFFSET,
+		.resp_offset = RESP_OFFSET,
+	};
+
+	while (count < len) {
+		ret = mpfs_syscontroller_run_service(rng_priv->sys_controller, &msg);
+		if (ret)
+			return ret;
+
+		ret = mpfs_syscontroller_recv_response(rng_priv->sys_controller, &msg, 1000);
+		if (ret)
+			return ret;
+
+		copy_size = (len - count > RNG_RESP_BYTES) ? RNG_RESP_BYTES : (len - count);
+		memcpy((u8 *)data + count, response_msg, copy_size);
+		count += copy_size;
+	}
+
+	return 0;
+}
+
+static int mpfs_rng_probe(struct udevice *dev)
+{
+	struct mpfs_rng_priv *rng_priv = dev_get_priv(dev);
+
+	rng_priv->sys_controller = mpfs_syscontroller_get(dev->parent);
+	if (IS_ERR(rng_priv->sys_controller)) {
+		dev_err(dev, "Failed to get system controller\n");
+		return PTR_ERR(rng_priv->sys_controller);
+	}
+
+	return 0;
+}
+
+static const struct dm_rng_ops mpfs_rng_ops = {
+	.read = mpfs_rng_read,
+};
+
+U_BOOT_DRIVER(mpfs_rng) = {
+	.name           = "mpfs_rng",
+	.id             = UCLASS_RNG,
+	.probe          = mpfs_rng_probe,
+	.priv_auto	    = sizeof(struct mpfs_rng_priv),
+	.ops            = &mpfs_rng_ops,
+};
-- 
2.43.0

[PATCH v2 4/6] configs: microchip_mpfs_generic: enable MPFS RNG support

[Jamie Gibbons]

Enable the MPFS hardware RNG and associated infrastructure in
the Microchip PolarFire SoC generic defconfig.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 configs/microchip_mpfs_generic_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/microchip_mpfs_generic_defconfig b/configs/microchip_mpfs_generic_defconfig
index 973ed09fa87..e3d794f08b9 100644
--- a/configs/microchip_mpfs_generic_defconfig
+++ b/configs/microchip_mpfs_generic_defconfig
@@ -21,6 +21,7 @@ CONFIG_SYS_PBSIZE=282
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_CMD_RNG=y
 CONFIG_OF_UPSTREAM=y
 CONFIG_OF_BOARD=y
 CONFIG_OF_LIST="microchip/mpfs-icicle-kit microchip/mpfs-sev-kit"
@@ -29,4 +30,6 @@ CONFIG_ENV_OVERWRITE_ETHADDR_ONCE=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_DM_MTD=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_MPFS=y
 CONFIG_SYSRESET=y
-- 
2.43.0

[PATCH v2 5/6] mailbox: mpfs-mbox: replace unbounded BUSY polling with bounded waits

[Jamie Gibbons]

The MPFS mailbox driver used unbounded polling loops and treated the
BUSY bit as a fatal condition in several paths. On MPFS, BUSY may be
transiently reasserted even after response data is written, which is
observable in U-Boot’s synchronous, polled execution model.

Replace the unbounded loops with a bounded
regmap_read_poll_timeout()-based helper that waits for the controller to
become idle.

This preserves existing behaviour while preventing infinite stalls
and avoiding spurious failures during early boot.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/mailbox/mpfs-mbox.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/mailbox/mpfs-mbox.c b/drivers/mailbox/mpfs-mbox.c
index b1ce377525e..165d9d89630 100644
--- a/drivers/mailbox/mpfs-mbox.c
+++ b/drivers/mailbox/mpfs-mbox.c
@@ -18,6 +18,7 @@
 #include <linux/compat.h>
 #include <linux/err.h>
 #include <linux/errno.h>
+#include <linux/iopoll.h>
 #include <log.h>
 #include <mailbox-uclass.h>
 #include <mpfs-mailbox.h>
@@ -60,6 +61,7 @@ static int mpfs_mbox_send(struct mbox_chan *chan, const void *data)
 	u32 mailbox_val, cmd_shifted, value;
 	u8 *byte_buf;
 	u8 idx, byte_idx, byte_offset;
+	int ret;
 
 	u32 *word_buf = (u32 *)msg->cmd_data;
 
@@ -86,13 +88,19 @@ static int mpfs_mbox_send(struct mbox_chan *chan, const void *data)
 
 	regmap_write(mbox->control_scb, SERVICES_CR_OFFSET, cmd_shifted);
 
-	do {
-		regmap_read(mbox->control_scb, SERVICES_CR_OFFSET, &value);
-	} while (SERVICE_CR_REQ_MASK == (value & SERVICE_CR_REQ_MASK));
+	ret = regmap_read_poll_timeout(mbox->control_scb, SERVICES_CR_OFFSET,
+				       value, !(value & SERVICE_CR_REQ_MASK),
+				       1, /* poll every 1 µs */
+				       20); /* timeout 20 ms */
+	if (ret)
+		return ret;
 
-	do {
-		regmap_read(mbox->control_scb, SERVICES_SR_OFFSET, &value);
-	} while (SERVICE_SR_BUSY_MASK == (value & SERVICE_SR_BUSY_MASK));
+	ret = regmap_read_poll_timeout(mbox->control_scb, SERVICES_SR_OFFSET,
+				       value, !(value & SERVICE_SR_BUSY_MASK),
+				       1,
+				       20);
+	if (ret)
+		return ret;
 
 	msg->response->resp_status = (value >> SERVICE_SR_STATUS_SHIFT);
 	if (msg->response->resp_status)
-- 
2.43.0

[PATCH v2 6/6] mailbox: mpfs: add bounded wait for BUSY to clear before sending request

[Jamie Gibbons]

The MPFS mailbox driver currently checks the BUSY bit at the start of
mpfs_mbox_send() and immediately returns -EBUSY if the controller is
busy.

On MPFS, BUSY may be transiently asserted during early boot even though
no other U-Boot service is actively executing. In Linux, returning
-EBUSY here is retryable via the mailbox framework and scheduler, but in
U-Boot this results in a hard failure.

Replace the immediate BUSY check with a bounded wait using
regmap_read_poll_timeout(), waiting for the controller to become idle
before issuing a new request. This preserves the intent of the BUSY
check while avoiding spurious early-boot failures in U-Boot’s
synchronous, polled execution model.

The timeout is conservative and based on observed MPFS behaviour, where
BUSY clears within a few milliseconds.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/mailbox/mpfs-mbox.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/mailbox/mpfs-mbox.c b/drivers/mailbox/mpfs-mbox.c
index 165d9d89630..8b7a2719330 100644
--- a/drivers/mailbox/mpfs-mbox.c
+++ b/drivers/mailbox/mpfs-mbox.c
@@ -65,8 +65,11 @@ static int mpfs_mbox_send(struct mbox_chan *chan, const void *data)
 
 	u32 *word_buf = (u32 *)msg->cmd_data;
 
-	if (mpfs_mbox_busy(chan))
-		return -EBUSY;
+	ret = regmap_read_poll_timeout(mbox->control_scb, SERVICES_SR_OFFSET,
+				       value, !(value & SERVICE_SR_BUSY_MASK),
+				       1, 20);
+	if (ret)
+		return ret;
 
 	for (idx = 0; idx < (msg->cmd_data_size / BYTES_4); idx++)
 		writel(word_buf[idx], mbox->mbox_base + msg->mbox_offset + idx * BYTES_4);
-- 
2.43.0

Re: [PATCH v2 3/6] rng: add Microchip PolarFire SoC hardware RNG driver

[Leo Liang via U-Boot]

Hi Jamie,

On Thu, Jul 23, 2026 at 8:52 AM Jamie Gibbons
<jamie.gibbons@microchip.com> wrote:
>
> Add a U-Boot RNG driver for Microchip's PolarFire SoC (MPFS). The
> hardware RNG is accessed indirectly via the MPFS system controller using
> the mailbox interface.
>
> The driver implements the UCLASS_RNG interface, requesting random data
> from the system controller and returning it to the caller.
>
> This allows use of the PolarFire SoC hardware RNG via the
> standard 'rng' command and DM RNG API.
>
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
>  drivers/rng/Kconfig    |   7 +++
>  drivers/rng/Makefile   |   1 +
>  drivers/rng/mpfs_rng.c | 101 +++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 109 insertions(+)
>  create mode 100644 drivers/rng/mpfs_rng.c
>
> diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
> index 19b2b707677..856ffda2f5e 100644
> --- a/drivers/rng/Kconfig
> +++ b/drivers/rng/Kconfig
> @@ -23,6 +23,13 @@ config RNG_MESON
>           Enable support for hardware random number generator
>           of Amlogic Meson SoCs.
>
> +config RNG_MPFS
> +       tristate "Microchip PolarFire SoC Random Number Generator support"

Is there a special reason to use 'tristate' instead of 'bool'?
If not, I could convert it to 'bool' when merging the patch,
so you don't have to respin the patchset.

Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>

Best regards,
Leo

> +       depends on DM_RNG && MPFS_SYSCONTROLLER
> +       help
> +         Enable support for hardware random number generator
> +         of Microchip's PolarFire SoCs.
> +

Re: [PATCH v2 4/6] configs: microchip_mpfs_generic: enable MPFS RNG support

[Leo Liang via U-Boot]

On Thu, Jul 23, 2026 at 8:52 AM Jamie Gibbons
<jamie.gibbons@microchip.com> wrote:
>
> Enable the MPFS hardware RNG and associated infrastructure in
> the Microchip PolarFire SoC generic defconfig.
>
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
>  configs/microchip_mpfs_generic_defconfig | 3 +++
>  1 file changed, 3 insertions(+)

Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>

Best Regards,
Leo

Re: [PATCH v2 3/6] rng: add Microchip PolarFire SoC hardware RNG driver

[Jamie.Gibbons--- via U-Boot]

Hi Leo,

On Mon, 2026-07-27 at 15:14 +0800, Leo Liang wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> Hi Jamie,
> 
> On Thu, Jul 23, 2026 at 8:52 AM Jamie Gibbons
> <jamie.gibbons@microchip.com> wrote:
> > 
> > Add a U-Boot RNG driver for Microchip's PolarFire SoC (MPFS). The
> > hardware RNG is accessed indirectly via the MPFS system controller
> > using
> > the mailbox interface.
> > 
> > The driver implements the UCLASS_RNG interface, requesting random
> > data
> > from the system controller and returning it to the caller.
> > 
> > This allows use of the PolarFire SoC hardware RNG via the
> > standard 'rng' command and DM RNG API.
> > 
> > Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> > ---
> >  drivers/rng/Kconfig    |   7 +++
> >  drivers/rng/Makefile   |   1 +
> >  drivers/rng/mpfs_rng.c | 101
> > +++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 109 insertions(+)
> >  create mode 100644 drivers/rng/mpfs_rng.c
> > 
> > diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
> > index 19b2b707677..856ffda2f5e 100644
> > --- a/drivers/rng/Kconfig
> > +++ b/drivers/rng/Kconfig
> > @@ -23,6 +23,13 @@ config RNG_MESON
> >           Enable support for hardware random number generator
> >           of Amlogic Meson SoCs.
> > 
> > +config RNG_MPFS
> > +       tristate "Microchip PolarFire SoC Random Number Generator
> > support"
> 
> Is there a special reason to use 'tristate' instead of 'bool'?
> If not, I could convert it to 'bool' when merging the patch,
> so you don't have to respin the patchset.

No, I don't believe there is a reason - this is a mistake. If you could
fix this on merge, that would be great.

Much appreciated,
Jamie.
> 
> Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
> 
> Best regards,
> Leo
> 
> > +       depends on DM_RNG && MPFS_SYSCONTROLLER
> > +       help
> > +         Enable support for hardware random number generator
> > +         of Microchip's PolarFire SoCs.
> > +

Re: [PATCH v2 3/6] rng: add Microchip PolarFire SoC hardware RNG driver

[Leo Liang via U-Boot]

Hi Jamie,

On Mon, Jul 27, 2026 at 4:12 PM <Jamie.Gibbons@microchip.com> wrote:
>
> Hi Leo,
>
> On Mon, 2026-07-27 at 15:14 +0800, Leo Liang wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you
> > know the content is safe
> >
> > Hi Jamie,
> >
> > On Thu, Jul 23, 2026 at 8:52 AM Jamie Gibbons
> > <jamie.gibbons@microchip.com> wrote:
> > >
> > > Add a U-Boot RNG driver for Microchip's PolarFire SoC (MPFS). The
> > > hardware RNG is accessed indirectly via the MPFS system controller
> > > using
> > > the mailbox interface.
> > >
> > > The driver implements the UCLASS_RNG interface, requesting random
> > > data
> > > from the system controller and returning it to the caller.
> > >
> > > This allows use of the PolarFire SoC hardware RNG via the
> > > standard 'rng' command and DM RNG API.
> > >
> > > Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> > > ---
> > >  drivers/rng/Kconfig    |   7 +++
> > >  drivers/rng/Makefile   |   1 +
> > >  drivers/rng/mpfs_rng.c | 101
> > > +++++++++++++++++++++++++++++++++++++++++
> > >  3 files changed, 109 insertions(+)
> > >  create mode 100644 drivers/rng/mpfs_rng.c
> > >
> > > diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
> > > index 19b2b707677..856ffda2f5e 100644
> > > --- a/drivers/rng/Kconfig
> > > +++ b/drivers/rng/Kconfig
> > > @@ -23,6 +23,13 @@ config RNG_MESON
> > >           Enable support for hardware random number generator
> > >           of Amlogic Meson SoCs.
> > >
> > > +config RNG_MPFS
> > > +       tristate "Microchip PolarFire SoC Random Number Generator
> > > support"
> >
> > Is there a special reason to use 'tristate' instead of 'bool'?
> > If not, I could convert it to 'bool' when merging the patch,
> > so you don't have to respin the patchset.
>
> No, I don't believe there is a reason - this is a mistake. If you could
> fix this on merge, that would be great.
>

Got it! Thanks!

Best regards,
Leo

> Much appreciated,
> Jamie.
> >
> > Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
> >
> > Best regards,
> > Leo
> >
> > > +       depends on DM_RNG && MPFS_SYSCONTROLLER
> > > +       help
> > > +         Enable support for hardware random number generator
> > > +         of Microchip's PolarFire SoCs.
> > > +
>

Re: [PATCH v2 0/6] MPFS: add hardware RNG support and fix RNG consumers

[Leo Liang via U-Boot]

Hi Jamie,

On Thu, Jul 23, 2026 at 8:52 AM Jamie Gibbons
<jamie.gibbons@microchip.com> wrote:
>
> Hi all,
>
> This series adds support for the hardware random number generator (RNG) on
> the Microchip PolarFire SoC (MPFS) and fixes several related issues
> uncovered during integration and testing.
>
> The MPFS hardware RNG is accessed indirectly via the MPFS system
> controller using the mailbox interface. Unlike typical memory-mapped RNGs,
> the system controller mailbox is shared and non‑reentrant, which
> introduces integration challenges in U‑Boot’s synchronous, polled
> execution model during early boot.
> While integrating the RNG support, testing revealed that mailbox requests
> issued during autoboot could fail spuriously due to transient mailbox
> BUSY states. Investigation showed that the MPFS mailbox BUSY indication
> reflects multiple phases of the underlying IHC handshake, allowing
> U-Boot’s polled model to observe intermediate states that Linux’s
> interrupt-driven model normally hides.
>
> This series addresses those challenges in various ways.
> 1. Adds missing infrastructure in the MPFS system controller driver to
> explicitly receive mailbox responses.
> 2. Binds the MPFS RNG as a sub‑device of the system controller, mirroring
> Linux behaviour and avoiding the need for a device tree node.
> 3. Introduces a new MPFS RNG driver implementing UCLASS_RNG.
> 4. Enables RNG support in the Microchip PolarFire SoC generic defconfig.
> 5. Replaces unbounded polling loops with regmap_read_poll_timeout().
> 6. Replaces an immediate -EBUSY return with a bounded wait for BUSY to
> clear, before issuing requests, avoiding spurious early-boot mailbox
> failures and allowing KASLR seed generation to complete successfully
> during autoboot.
>
> The resulting behaviour matches Linux semantics where practical while
> remaining appropriate for U-Boot’s single-threaded execution model.
> Interactive RNG usage and boot-time KASLR seed generation both work
> reliably after the mailbox sequencing fixes.
>
> All changes have been tested on the PolarFire SoC Icicle Kit ES.
>
> Regards,
> Jamie.

Applied to u-boot-riscv/main, thanks,

Best regards,
Leo