[U-Boot] Micron eMMC problem on sabre SD like card

[U-Boot] Micron eMMC problem on sabre SD like card

[jean-francois simon]

Hi,
We have a new design that is based on Freescale SABRE SD card.
We see that accesses made to the eMMC (Micron MTFC64GJVDN-4M ) are not working.
We have placed the eMMC on SD3 (SD4 on Sabre SD). We want to use it in
8bit bus width, DDR, fast speed.
The very first command sent to the device hangs. The hang happens in
this function, when the mmc driver is waiting for an interrupt to
occur:


drivers/mmc/fsl_esdhc.c::esdhc_send_cmd()
        ......snip....
       /* Send the command */
        esdhc_write32(&regs->cmdarg, cmd->cmdarg);
       #if defined(CONFIG_FSL_USDHC)
        esdhc_write32(&regs->mixctrl,
        (esdhc_read32(&regs->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F));
        esdhc_write32(&regs->xfertyp, xfertyp & 0xFFFF0000);
#else
        esdhc_write32(&regs->xfertyp, xfertyp);
#endif

        /* Mask all irqs */
        esdhc_write32(&regs->irqsigen, 0);

        /* Wait for the command to complete */
        while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC |
IRQSTAT_CTOE)))    <<<<<<<HANGS HERE>>>>>>>>>


We have based our u-boot on the official tree, not the Freescale 2009
tree. I can see that the mmc drivers are somewhat different.

This must be obvious since it happens on the first access, but I am
not sure where to look.

Thanks a lot,                      ;


-- 
_______________________________________
jean-francois simon  - www.themis.com
ph: +33 (0)4 76 14 77 85

[U-Boot] Micron eMMC problem on sabre SD like card

[jean-francois simon]

Hi,


On Sat, May 25, 2013 at 8:32 AM, jean-francois simon <jfs@themis.com> wrote:
> We have a new design that is based on Freescale SABRE SD card.
> We see that accesses made to the eMMC (Micron MTFC64GJVDN-4M ) are not working.
> We have placed the eMMC on SD3 (SD4 on Sabre SD). We want to use it in
> 8bit bus width, DDR, fast speed.
> The very first command sent to the device hangs. The hang happens in
> this function, when the mmc driver is waiting for an interrupt to
> occur:
> ....

Still stuck on this.
A naive question: Does u-boot mmc driver support dual data rate? I am
not sure looking at the code. I see mentions of version 4.4 and
higher, but nothing about DDR. I am very ignorant of MMC stuff and
even looking at the jedec 4.4 spec, I am not sure if 4.4 support means
DDR is mandatory.

I saw this u-boot thread:
http://www.mail-archive.com/u-boot at lists.denx.de/msg78023.html
and I wonder it is still the same situation?

If we hack the Freescale 2009 u-boot to make it run on our design, the
eMMC works just fine.

What should I do? start from Freescale driver and try to port it to
u-boot?  I am kind in the dark here , looking which way to go.
Thanks for any help,
-jfs

[U-Boot] Micron eMMC problem on sabre SD like card

[Stefano Babic]

Hi Jean-Francois,

On 25/05/2013 17:32, jean-francois simon wrote:
> Hi,
> We have a new design that is based on Freescale SABRE SD card.
> We see that accesses made to the eMMC (Micron MTFC64GJVDN-4M ) are not working.
> We have placed the eMMC on SD3 (SD4 on Sabre SD). We want to use it in
> 8bit bus width, DDR, fast speed.
> The very first command sent to the device hangs. The hang happens in
> this function, when the mmc driver is waiting for an interrupt to
> occur:
> 
> 
> drivers/mmc/fsl_esdhc.c::esdhc_send_cmd()
>         ......snip....
>        /* Send the command */
>         esdhc_write32(&regs->cmdarg, cmd->cmdarg);
>        #if defined(CONFIG_FSL_USDHC)
>         esdhc_write32(&regs->mixctrl,
>         (esdhc_read32(&regs->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F));
>         esdhc_write32(&regs->xfertyp, xfertyp & 0xFFFF0000);
> #else
>         esdhc_write32(&regs->xfertyp, xfertyp);
> #endif
> 
>         /* Mask all irqs */
>         esdhc_write32(&regs->irqsigen, 0);
> 
>         /* Wait for the command to complete */
>         while (!(esdhc_read32(&regs->irqstat) & (IRQSTAT_CC |
> IRQSTAT_CTOE)))    <<<<<<<HANGS HERE>>>>>>>>>

Could be the same as the issue reported by Fabio at
http://patchwork.ozlabs.org/patch/246928/ ?

Patch is not yet mainline, so I assume that it does not work. You could
make a test using u-boot-imx (git.denx.de/u-boot-imx) instead of u-boot
TOT. Due to this issue I have not yet merged back the mainline tree.

Best regards,
Stefano Babic

-- 
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[U-Boot] Micron eMMC problem on sabre SD like card

[Fabio Estevam]

Hi Jean-Francois,


On Thu, Jun 6, 2013 at 10:34 AM, Stefano Babic <sbabic@denx.de> wrote:

> Could be the same as the issue reported by Fabio at
> http://patchwork.ozlabs.org/patch/246928/ ?

Yes, please apply this one and also:
http://patchwork.ozlabs.org/patch/248877/

With both patches applied SD functionality works well on mx6qsabresd.

Regards,

Fabio Estevam

[U-Boot] Micron eMMC problem on sabre SD like card

[jean-francois simon]

Hi, Stefano, Fabio,

On Thu, Jun 6, 2013 at 6:39 AM, Fabio Estevam <festevam@gmail.com> wrote:
> On Thu, Jun 6, 2013 at 10:34 AM, Stefano Babic <sbabic@denx.de> wrote:
>> Could be the same as the issue reported by Fabio at
>> http://patchwork.ozlabs.org/patch/246928/ ?
>
> Yes, please apply this one and also:
> http://patchwork.ozlabs.org/patch/248877/
>
> With both patches applied SD functionality works well on mx6qsabresd.


Will do.
Also, I was looking around and came across this VSELECT bit in the
VEND_SPEC register (219_80C0 Vendor Specific Register
(uSDHC3_VEND_SPEC)   )

It is used to generate low voltage, like 1.8V (n bus SD3 here) which I
think is needed for DDR mode?
The Freescale code is using it here:

        /* Switch voltage to 1.8V if CMD11 succeeded */
        if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) {
                /* Set SD_VSELECT to switch to 1.8V */
                u32 reg;
                reg = readl(&regs->vendorspec);
                reg |= VENDORSPEC_VSELECT;
                writel(reg, &regs->vendorspec);

                /* Sleep for 5 ms - max time for card to switch to 1.8V */
                udelay(5000);

                /* Turn on SD clock */
                writel(reg | VENDORSPEC_FRC_SDCLK_ON, &regs->vendorspec);

                while (!(readl(&regs->prsstat) & PRSSTAT_DAT0))
                        ;

                /* restore SD clock status */
                writel(reg, &regs->vendorspec);
        }
"drivers/mmc/imx_esdhc.c" 714 lines --31%--

-jfs

[U-Boot] Micron eMMC problem on sabre SD like card

[Fabio Estevam]

On Thu, Jun 6, 2013 at 11:58 AM, jean-francois simon <jfs@themis.com> wrote:

> Will do.
> Also, I was looking around and came across this VSELECT bit in the
> VEND_SPEC register (219_80C0 Vendor Specific Register
> (uSDHC3_VEND_SPEC)   )
>
> It is used to generate low voltage, like 1.8V (n bus SD3 here) which I
> think is needed for DDR mode?
> The Freescale code is using it here:

Yes, please send a patch for this and add Andy Fleming on Cc.

Regards,

Fabio Estevam