[PATCH 0/8] imx: add i.MX94 support

[PATCH 0/8] imx: add i.MX94 support

[Alice Guo (OSS)]

This patch set introduces initial support for the NXP i.MX94 SoC. The
key changes include:
- Addition of i.MX94 CPU type and SoC-level Kconfig entry.
- Printing of the LM/system last booted/shutdown reasons.
- Definition of base addresses for WDG3, WDG4, GPIO6 and GPIO7.
- Support for lifecycle state display.
- Introduction of daisy register offset specific to i.MX94. 

Signed-off-by: Alice Guo <alice.guo@oss.nxp.com>
---
Alice Guo (1):
      pinctrl: nxp: Add i.MX94 daisy register offset

Peng Fan (1):
      imx95: Add get_reset_reason() to retrieve the LM/system last booted/shutdown reasons

Ye Li (6):
      imx9: Add i.MX94 CPU type and SoC-level Kconfig
      imx9: scmi: Add i.MX94 support to get_reset_reason()
      imx9: scmi: Update the files under arch/arm/mach-imx/imx9/scmi/ to support i.MX94
      imx: container: Add i.MX94 support to get_imageset_end()
      imx: ele_ahab: Implement display_life_cycle() for i.MX95
      imx: ele_ahab: Add i.MX94 support to display_life_cycle()

 arch/arm/include/asm/arch-imx/cpu.h        |   2 +
 arch/arm/include/asm/arch-imx9/imx-regs.h  |   9 ++
 arch/arm/include/asm/arch-imx9/sys_proto.h |   1 +
 arch/arm/include/asm/mach-imx/sys_proto.h  |   1 +
 arch/arm/mach-imx/ele_ahab.c               |  55 +++++++-
 arch/arm/mach-imx/image-container.c        |   4 +-
 arch/arm/mach-imx/imx9/Kconfig             |   9 ++
 arch/arm/mach-imx/imx9/scmi/clock.c        |  28 +++--
 arch/arm/mach-imx/imx9/scmi/common.h       |  41 ++++++
 arch/arm/mach-imx/imx9/scmi/soc.c          | 196 +++++++++++++++++++++++++++--
 board/freescale/imx95_evk/spl.c            |   3 +
 drivers/pinctrl/nxp/pinctrl-imx-scmi.c     |   5 +-
 include/scmi_nxp_protocols.h               |  55 ++++++++
 13 files changed, 381 insertions(+), 28 deletions(-)
---
base-commit: 1a7882de8c859467ce931ed23761db1e391aeaff
change-id: 20250901-imx94-5c463a9fe924

Best regards,
-- 
Alice Guo <alice.guo@oss.nxp.com>

[PATCH v1 1/8] imx9: Add i.MX94 CPU type and SoC-level Kconfig

[Alice Guo (OSS)]

From: Ye Li <ye.li@nxp.com>

Introduce support for the new i.MX94 processor, including its CPU type
and SoC-level Kconfig entry.

The i.MX94 is a new member of the i.MX9 family. It uses a System Manager
to handle system-level functions such as power, clock, sensor and pin
control. The System Manager runs on a Cortex-M processor, while the
Cortex-A processor communicates with it via the ARM SCMI protocol and a
messaging unit.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
---
 arch/arm/include/asm/arch-imx/cpu.h       | 2 ++
 arch/arm/include/asm/mach-imx/sys_proto.h | 1 +
 arch/arm/mach-imx/imx9/Kconfig            | 9 +++++++++
 3 files changed, 12 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 1f669c72d00..1af9778f8ce 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -78,6 +78,8 @@
 
 #define MXC_CPU_IMX95		0x1C1 /* dummy ID */
 
+#define MXC_CPU_IMX94		0x1C2 /* dummy ID */
+
 #define MXC_SOC_MX6		0x60
 #define MXC_SOC_MX7		0x70
 #define MXC_SOC_IMX8M		0x80
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index 0780f99b49a..46da7a1eff5 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -97,6 +97,7 @@ struct bd_info;
 #define is_imx9302() (is_cpu_type(MXC_CPU_IMX9302))
 #define is_imx9301() (is_cpu_type(MXC_CPU_IMX9301))
 
+#define is_imx94() (is_cpu_type(MXC_CPU_IMX94))
 #define is_imx95() (is_cpu_type(MXC_CPU_IMX95))
 
 #define is_imx9121() (is_cpu_type(MXC_CPU_IMX9121))
diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index 4e0e194690b..13f2c2de305 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -35,6 +35,15 @@ config IMX95
 	select SPL_IMX_CONTAINER_USE_TRAMPOLINE
 	select IMX_PQC_SUPPORT
 
+config IMX94
+	bool
+	select ARMV8_SPL_EXCEPTION_VECTORS
+	select DM_MAILBOX
+	select IMX9
+	select IMX_PQC_SUPPORT
+	select SCMI_FIRMWARE
+	select SPL_IMX_CONTAINER_USE_TRAMPOLINE
+
 config SYS_SOC
 	default "imx9"
 

-- 
2.43.0

[PATCH v1 2/8] imx95: Add get_reset_reason() to retrieve the LM/system last booted/shutdown reasons

[Alice Guo (OSS)]

From: Peng Fan <peng.fan@nxp.com>

System Manager provides the last booted and shutdown reasons of the
logical machines (LM) and system using the SCMI misc protocol (Protocol
ID: 0x84, Message ID: 0xA). This path adds get_reset_reason() to query
and print these reasons in SPL and U-Boot.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
---
 arch/arm/include/asm/arch-imx9/sys_proto.h |   1 +
 arch/arm/mach-imx/imx9/scmi/soc.c          | 117 +++++++++++++++++++++++++++++
 board/freescale/imx95_evk/spl.c            |   3 +
 include/scmi_nxp_protocols.h               |  55 ++++++++++++++
 4 files changed, 176 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx9/sys_proto.h b/arch/arm/include/asm/arch-imx9/sys_proto.h
index 455aa95339e..dead7a99a66 100644
--- a/arch/arm/include/asm/arch-imx9/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx9/sys_proto.h
@@ -21,6 +21,7 @@ int m33_prepare(void);
 int low_drive_freq_update(void *blob);
 
 enum imx9_soc_voltage_mode soc_target_voltage_mode(void);
+int get_reset_reason(bool sys, bool lm);
 
 #define is_voltage_mode(mode) (soc_target_voltage_mode() == (mode))
 
diff --git a/arch/arm/mach-imx/imx9/scmi/soc.c b/arch/arm/mach-imx/imx9/scmi/soc.c
index f973652d0cb..43f516d3d7f 100644
--- a/arch/arm/mach-imx/imx9/scmi/soc.c
+++ b/arch/arm/mach-imx/imx9/scmi/soc.c
@@ -17,8 +17,10 @@
 #include <env_internal.h>
 #include <fuse.h>
 #include <imx_thermal.h>
+#include <linux/bitfield.h>
 #include <linux/iopoll.h>
 #include <scmi_agent.h>
+#include <scmi_nxp_protocols.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -468,6 +470,114 @@ err:
 	printf("%s: fuse read err: %d\n", __func__, ret);
 }
 
+static char *rst_string[32] = {
+	"cm33_lockup",
+	"cm33_swreq",
+	"cm7_lockup",
+	"cm7_swreq",
+	"fccu",
+	"jtag_sw",
+	"ele",
+	"tempsense",
+	"wdog1",
+	"wdog2",
+	"wdog3",
+	"wdog4",
+	"wdog5",
+	"jtag",
+	"cm33_exc",
+	"bbm",
+	"sw",
+	"sm_err", "fusa_sreco", "pmic", "unused", "unused", "unused",
+	"unused", "unused", "unused", "unused", "unused", "unused",
+	"unused", "unused",
+	"por"
+};
+
+int get_reset_reason(bool sys, bool lm)
+{
+	struct scmi_imx_misc_reset_reason_in in = {
+		.flags = MISC_REASON_FLAG_SYSTEM,
+	};
+
+	struct scmi_imx_misc_reset_reason_out out = { 0 };
+	struct scmi_msg msg = {
+		.protocol_id = SCMI_PROTOCOL_ID_IMX_MISC,
+		.message_id = SCMI_IMX_MISC_RESET_REASON,
+		.in_msg = (u8 *)&in,
+		.in_msg_sz = sizeof(in),
+		.out_msg = (u8 *)&out,
+		.out_msg_sz = sizeof(out),
+	};
+	int ret;
+
+	struct udevice *dev;
+
+	ret = uclass_get_device_by_name(UCLASS_CLK, "protocol@14", &dev);
+	if (ret)
+		return ret;
+
+	if (sys) {
+		ret = devm_scmi_process_msg(dev, &msg);
+		if (out.status) {
+			printf("%s:%d for SYS\n", __func__, out.status);
+			return ret;
+		}
+
+		if (out.bootflags & MISC_BOOT_FLAG_VLD) {
+			printf("SYS Boot reason: %s, origin: %ld, errid: %ld\n",
+			       rst_string[out.bootflags & MISC_BOOT_FLAG_REASON],
+			       out.bootflags & MISC_BOOT_FLAG_ORG_VLD ?
+			       FIELD_GET(MISC_BOOT_FLAG_ORIGIN, out.bootflags) : -1,
+			       out.bootflags & MISC_BOOT_FLAG_ERR_VLD ?
+			       FIELD_GET(MISC_BOOT_FLAG_ERR_ID, out.bootflags) : -1
+			       );
+		}
+		if (out.shutdownflags & MISC_SHUTDOWN_FLAG_VLD) {
+			printf("SYS shutdown reason: %s, origin: %ld, errid: %ld\n",
+			       rst_string[out.bootflags & MISC_SHUTDOWN_FLAG_REASON],
+			       out.bootflags & MISC_SHUTDOWN_FLAG_ORG_VLD ?
+			       FIELD_GET(MISC_SHUTDOWN_FLAG_ORIGIN, out.bootflags) : -1,
+			       out.bootflags & MISC_SHUTDOWN_FLAG_ERR_VLD ?
+			       FIELD_GET(MISC_SHUTDOWN_FLAG_ERR_ID, out.bootflags) : -1
+			       );
+		}
+	}
+
+	if (lm) {
+		in.flags = 0;
+		memset(&out, 0, sizeof(struct scmi_imx_misc_reset_reason_out));
+
+		ret = devm_scmi_process_msg(dev, &msg);
+		if (out.status) {
+			printf("%s:%d for LM\n", __func__, out.status);
+			return ret;
+		}
+
+		if (out.bootflags & MISC_BOOT_FLAG_VLD) {
+			printf("LM Boot reason: %s, origin: %ld, errid: %ld\n",
+			       rst_string[out.bootflags & MISC_BOOT_FLAG_REASON],
+			       out.bootflags & MISC_BOOT_FLAG_ORG_VLD ?
+			       FIELD_GET(MISC_BOOT_FLAG_ORIGIN, out.bootflags) : -1,
+			       out.bootflags & MISC_BOOT_FLAG_ERR_VLD ?
+			       FIELD_GET(MISC_BOOT_FLAG_ERR_ID, out.bootflags) : -1
+			       );
+		}
+
+		if (out.shutdownflags & MISC_SHUTDOWN_FLAG_VLD) {
+			printf("LM shutdown reason: %s, origin: %ld, errid: %ld\n",
+			       rst_string[out.bootflags & MISC_SHUTDOWN_FLAG_REASON],
+			       out.bootflags & MISC_SHUTDOWN_FLAG_ORG_VLD ?
+			       FIELD_GET(MISC_SHUTDOWN_FLAG_ORIGIN, out.bootflags) : -1,
+			       out.bootflags & MISC_SHUTDOWN_FLAG_ERR_VLD ?
+			       FIELD_GET(MISC_SHUTDOWN_FLAG_ERR_ID, out.bootflags) : -1
+			       );
+		}
+	}
+
+	return 0;
+}
+
 const char *get_imx_type(u32 imxtype)
 {
 	switch (imxtype) {
@@ -478,6 +588,13 @@ const char *get_imx_type(u32 imxtype)
 	}
 }
 
+int print_cpuinfo(void)
+{
+	get_reset_reason(false, true);
+
+	return 0;
+}
+
 void build_info(void)
 {
 	u32 fw_version, sha1, res = 0, status;
diff --git a/board/freescale/imx95_evk/spl.c b/board/freescale/imx95_evk/spl.c
index 08f4da0bb73..3d64097b4c7 100644
--- a/board/freescale/imx95_evk/spl.c
+++ b/board/freescale/imx95_evk/spl.c
@@ -5,6 +5,7 @@
 
 #include <asm/arch/clock.h>
 #include <asm/arch/mu.h>
+#include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/sections.h>
 #include <hang.h>
@@ -65,5 +66,7 @@ void board_init_f(ulong dummy)
 	debug("SOC: 0x%x\n", gd->arch.soc_rev);
 	debug("LC: 0x%x\n", gd->arch.lifecycle);
 
+	get_reset_reason(true, false);
+
 	board_init_r(NULL, 0);
 }
diff --git a/include/scmi_nxp_protocols.h b/include/scmi_nxp_protocols.h
new file mode 100644
index 00000000000..fe6ecd6a7cf
--- /dev/null
+++ b/include/scmi_nxp_protocols.h
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
+/*
+ * Copyright 2025 NXP
+ */
+
+#ifndef _SCMI_NXP_PROTOCOLS_H
+#define _SCMI_NXP_PROTOCOLS_H
+
+#include <asm/types.h>
+#include <linux/bitops.h>
+
+enum scmi_imx_protocol {
+	SCMI_IMX_PROTOCOL_ID_MISC = 0x84,
+};
+
+#define SCMI_PAYLOAD_LEN	100
+
+#define SCMI_ARRAY(X, Y)	((SCMI_PAYLOAD_LEN - (X)) / sizeof(Y))
+
+#define SCMI_IMX_MISC_RESET_REASON	0xA
+
+struct scmi_imx_misc_reset_reason_in {
+#define MISC_REASON_FLAG_SYSTEM		BIT(0)
+	u32 flags;
+};
+
+struct scmi_imx_misc_reset_reason_out {
+	s32 status;
+	/* Boot reason flags */
+#define MISC_BOOT_FLAG_VLD	BIT(31)
+#define MISC_BOOT_FLAG_ORG_VLD	BIT(28)
+#define MISC_BOOT_FLAG_ORIGIN	GENMASK(27, 24)
+#define MISC_BOOT_FLAG_O_SHIFT	24
+#define MISC_BOOT_FLAG_ERR_VLD	BIT(23)
+#define MISC_BOOT_FLAG_ERR_ID	GENMASK(22, 8)
+#define MISC_BOOT_FLAG_E_SHIFT	8
+#define MISC_BOOT_FLAG_REASON	GENMASK(7, 0)
+	u32 bootflags;
+	/* Shutdown reason flags */
+#define MISC_SHUTDOWN_FLAG_VLD		BIT(31)
+#define MISC_SHUTDOWN_FLAG_EXT_LEN	GENMASK(30, 29)
+#define MISC_SHUTDOWN_FLAG_ORG_VLD	BIT(28)
+#define MISC_SHUTDOWN_FLAG_ORIGIN	GENMASK(27, 24)
+#define MISC_SHUTDOWN_FLAG_O_SHIFT	24
+#define MISC_SHUTDOWN_FLAG_ERR_VLD	BIT(23)
+#define MISC_SHUTDOWN_FLAG_ERR_ID	GENMASK(22, 8)
+#define MISC_SHUTDOWN_FLAG_E_SHIFT	8
+#define MISC_SHUTDOWN_FLAG_REASON	GENMASK(7, 0)
+	u32 shutdownflags;
+	/* Array of extended info words */
+#define MISC_MAX_EXTINFO	SCMI_ARRAY(16, u32)
+	u32 extInfo[MISC_MAX_EXTINFO];
+};
+
+#endif

-- 
2.43.0

[PATCH v1 3/8] imx9: scmi: Add i.MX94 support to get_reset_reason()

[Alice Guo (OSS)]

From: Ye Li <ye.li@nxp.com>

Update get_reset_reason() to support i.MX94 to send message to the
System Manager to retrieve the LM/system last booted/shutdown reasons.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/imx9/scmi/soc.c | 39 +++++++++++++++++++++++++++++++++++----
 1 file changed, 35 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-imx/imx9/scmi/soc.c b/arch/arm/mach-imx/imx9/scmi/soc.c
index 43f516d3d7f..f0b2aad8701 100644
--- a/arch/arm/mach-imx/imx9/scmi/soc.c
+++ b/arch/arm/mach-imx/imx9/scmi/soc.c
@@ -494,6 +494,31 @@ static char *rst_string[32] = {
 	"por"
 };
 
+static char *rst_string_imx94[32] = {
+	"cm33_lockup",
+	"cm33_swreq",
+	"cm70_lockup",
+	"cm70_swreq",
+	"fccu",
+	"jtag_sw",
+	"ele",
+	"tempsense",
+	"wdog1",
+	"wdog2",
+	"wdog3",
+	"wdog4",
+	"wdog5",
+	"jtag",
+	"wdog6",
+	"wdog7",
+	"wdog8",
+	"wo_netc", "cm33s_lockup", "cm33s_swreq", "cm71_lockup", "cm71_swreq", "cm33_exc",
+	"bbm", "sw", "sm_err", "fusa_sreco", "pmic", "unused",
+	"unused", "unused",
+	"por"
+};
+
+
 int get_reset_reason(bool sys, bool lm)
 {
 	struct scmi_imx_misc_reset_reason_in in = {
@@ -512,6 +537,12 @@ int get_reset_reason(bool sys, bool lm)
 	int ret;
 
 	struct udevice *dev;
+	char **rst;
+
+	if (is_imx94())
+		rst = rst_string_imx94;
+	else
+		rst = rst_string;
 
 	ret = uclass_get_device_by_name(UCLASS_CLK, "protocol@14", &dev);
 	if (ret)
@@ -526,7 +557,7 @@ int get_reset_reason(bool sys, bool lm)
 
 		if (out.bootflags & MISC_BOOT_FLAG_VLD) {
 			printf("SYS Boot reason: %s, origin: %ld, errid: %ld\n",
-			       rst_string[out.bootflags & MISC_BOOT_FLAG_REASON],
+			       rst[out.bootflags & MISC_BOOT_FLAG_REASON],
 			       out.bootflags & MISC_BOOT_FLAG_ORG_VLD ?
 			       FIELD_GET(MISC_BOOT_FLAG_ORIGIN, out.bootflags) : -1,
 			       out.bootflags & MISC_BOOT_FLAG_ERR_VLD ?
@@ -535,7 +566,7 @@ int get_reset_reason(bool sys, bool lm)
 		}
 		if (out.shutdownflags & MISC_SHUTDOWN_FLAG_VLD) {
 			printf("SYS shutdown reason: %s, origin: %ld, errid: %ld\n",
-			       rst_string[out.bootflags & MISC_SHUTDOWN_FLAG_REASON],
+			       rst[out.bootflags & MISC_SHUTDOWN_FLAG_REASON],
 			       out.bootflags & MISC_SHUTDOWN_FLAG_ORG_VLD ?
 			       FIELD_GET(MISC_SHUTDOWN_FLAG_ORIGIN, out.bootflags) : -1,
 			       out.bootflags & MISC_SHUTDOWN_FLAG_ERR_VLD ?
@@ -556,7 +587,7 @@ int get_reset_reason(bool sys, bool lm)
 
 		if (out.bootflags & MISC_BOOT_FLAG_VLD) {
 			printf("LM Boot reason: %s, origin: %ld, errid: %ld\n",
-			       rst_string[out.bootflags & MISC_BOOT_FLAG_REASON],
+			       rst[out.bootflags & MISC_BOOT_FLAG_REASON],
 			       out.bootflags & MISC_BOOT_FLAG_ORG_VLD ?
 			       FIELD_GET(MISC_BOOT_FLAG_ORIGIN, out.bootflags) : -1,
 			       out.bootflags & MISC_BOOT_FLAG_ERR_VLD ?
@@ -566,7 +597,7 @@ int get_reset_reason(bool sys, bool lm)
 
 		if (out.shutdownflags & MISC_SHUTDOWN_FLAG_VLD) {
 			printf("LM shutdown reason: %s, origin: %ld, errid: %ld\n",
-			       rst_string[out.bootflags & MISC_SHUTDOWN_FLAG_REASON],
+			       rst[out.bootflags & MISC_SHUTDOWN_FLAG_REASON],
 			       out.bootflags & MISC_SHUTDOWN_FLAG_ORG_VLD ?
 			       FIELD_GET(MISC_SHUTDOWN_FLAG_ORIGIN, out.bootflags) : -1,
 			       out.bootflags & MISC_SHUTDOWN_FLAG_ERR_VLD ?

-- 
2.43.0

[PATCH v1 4/8] imx9: scmi: Update the files under arch/arm/mach-imx/imx9/scmi/ to support i.MX94

[Alice Guo (OSS)]

From: Ye Li <ye.li@nxp.com>

- Add base addresses for WDG3, WDG4, GPIO6, and GPIO7 for i.MX94.
- Introduce common.h with macros of clock IDs, power domains, and CPU
  types for platform-specific replacement (e.g., i.MX94, i.MX95).
- Extend imx_get_mac_from_fuse() to support i.MX94.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
---
 arch/arm/include/asm/arch-imx9/imx-regs.h |  9 ++++++
 arch/arm/mach-imx/imx9/scmi/clock.c       | 28 +++++++++--------
 arch/arm/mach-imx/imx9/scmi/common.h      | 41 +++++++++++++++++++++++++
 arch/arm/mach-imx/imx9/scmi/soc.c         | 50 ++++++++++++++++++++++++-------
 4 files changed, 105 insertions(+), 23 deletions(-)

diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h
index 5127fe8f286..a44fa6663c3 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -17,14 +17,23 @@
 
 #define ANATOP_BASE_ADDR    0x44480000UL
 
+#ifdef CONFIG_IMX94
+#define WDG3_BASE_ADDR      0x49220000UL
+#define WDG4_BASE_ADDR      0x49230000UL
+#else
 #define WDG3_BASE_ADDR      0x42490000UL
 #define WDG4_BASE_ADDR      0x424a0000UL
+#endif
 #define WDG5_BASE_ADDR      0x424b0000UL
 
 #define GPIO2_BASE_ADDR	    0x43810000UL
 #define GPIO3_BASE_ADDR	    0x43820000UL
 #define GPIO4_BASE_ADDR	    0x43840000UL
 #define GPIO5_BASE_ADDR	    0x43850000UL
+#ifdef CONFIG_IMX94
+#define GPIO6_BASE_ADDR	    0x43860000UL
+#define GPIO7_BASE_ADDR	    0x43870000UL
+#endif
 
 #define FSB_BASE_ADDR       0x47510000UL
 
diff --git a/arch/arm/mach-imx/imx9/scmi/clock.c b/arch/arm/mach-imx/imx9/scmi/clock.c
index 6e6541eaa31..1f071873dca 100644
--- a/arch/arm/mach-imx/imx9/scmi/clock.c
+++ b/arch/arm/mach-imx/imx9/scmi/clock.c
@@ -6,16 +6,18 @@
 #include <asm/arch/clock.h>
 #include <dm/uclass.h>
 #include <scmi_agent.h>
+#include <scmi_nxp_protocols.h>
 #include "../../../../../dts/upstream/src/arm64/freescale/imx95-clock.h"
+#include "common.h"
 
 u32 get_arm_core_clk(void)
 {
 	u32 val;
 
-	val = imx_clk_scmi_get_rate(IMX95_CLK_SEL_A55C0);
+	val = imx_clk_scmi_get_rate(SCMI_CLK(SEL_A55C0));
 	if (val)
 		return val;
-	return imx_clk_scmi_get_rate(IMX95_CLK_A55);
+	return imx_clk_scmi_get_rate(SCMI_CLK(A55));
 }
 
 void init_uart_clk(u32 index)
@@ -24,13 +26,13 @@ void init_uart_clk(u32 index)
 
 	switch (index) {
 	case 0:
-		clock_id = IMX95_CLK_LPUART1;
+		clock_id = SCMI_CLK(LPUART1);
 		break;
 	case 1:
-		clock_id = IMX95_CLK_LPUART2;
+		clock_id = SCMI_CLK(LPUART2);
 		break;
 	case 2:
-		clock_id = IMX95_CLK_LPUART3;
+		clock_id = SCMI_CLK(LPUART3);
 		break;
 	default:
 		return;
@@ -38,7 +40,7 @@ void init_uart_clk(u32 index)
 
 	/* 24MHz */
 	imx_clk_scmi_enable(clock_id, false);
-	imx_clk_scmi_set_parent(clock_id, IMX95_CLK_24M);
+	imx_clk_scmi_set_parent(clock_id, SCMI_CLK(24M));
 	imx_clk_scmi_set_rate(clock_id, 24000000);
 	imx_clk_scmi_enable(clock_id, true);
 }
@@ -49,19 +51,19 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
 	case MXC_ARM_CLK:
 		return get_arm_core_clk();
 	case MXC_IPG_CLK:
-		return imx_clk_scmi_get_rate(IMX95_CLK_BUSWAKEUP);
+		return imx_clk_scmi_get_rate(SCMI_CLK(BUSWAKEUP));
 	case MXC_CSPI_CLK:
-		return imx_clk_scmi_get_rate(IMX95_CLK_LPSPI1);
+		return imx_clk_scmi_get_rate(SCMI_CLK(LPSPI1));
 	case MXC_ESDHC_CLK:
-		return imx_clk_scmi_get_rate(IMX95_CLK_USDHC1);
+		return imx_clk_scmi_get_rate(SCMI_CLK(USDHC1));
 	case MXC_ESDHC2_CLK:
-		return imx_clk_scmi_get_rate(IMX95_CLK_USDHC2);
+		return imx_clk_scmi_get_rate(SCMI_CLK(USDHC2));
 	case MXC_ESDHC3_CLK:
-		return imx_clk_scmi_get_rate(IMX95_CLK_USDHC3);
+		return imx_clk_scmi_get_rate(SCMI_CLK(USDHC3));
 	case MXC_UART_CLK:
-		return imx_clk_scmi_get_rate(IMX95_CLK_LPUART1);
+		return imx_clk_scmi_get_rate(SCMI_CLK(LPUART1));
 	case MXC_FLEXSPI_CLK:
-		return imx_clk_scmi_get_rate(IMX95_CLK_FLEXSPI1);
+		return imx_clk_scmi_get_rate(SCMI_CLK(FLEXSPI1));
 	default:
 		return -1;
 	};
diff --git a/arch/arm/mach-imx/imx9/scmi/common.h b/arch/arm/mach-imx/imx9/scmi/common.h
new file mode 100644
index 00000000000..df26ecff3e4
--- /dev/null
+++ b/arch/arm/mach-imx/imx9/scmi/common.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2025 NXP
+ */
+
+#ifndef _SCMI_CLOCK_COMMON_H_
+#define _SCMI_CLOCK_COMMON_H_
+
+#ifdef CONFIG_IMX94
+#define IMX_PLAT 94
+#include <../dts/upstream/src/arm64/freescale/imx94-clock.h>
+#include <../dts/upstream/src/arm64/freescale/imx94-power.h>
+
+#define IMX94_CLK_FLEXSPI1 IMX94_CLK_XSPI1
+#endif
+
+#ifdef CONFIG_IMX95
+#define IMX_PLAT 95
+#include <../dts/upstream/src/arm64/freescale/imx95-clock.h>
+#include <../dts/upstream/src/arm64/freescale/imx95-power.h>
+
+#define IMX95_PD_M70 IMX95_PD_M7
+#endif
+
+#define IMX_PLAT_STR__(plat) # plat
+#define IMX_PLAT_STR_(IMX_PLAT) IMX_PLAT_STR__(IMX_PLAT)
+#define IMX_PLAT_STR IMX_PLAT_STR_(IMX_PLAT)
+
+#define SCMI_CLK__(plat, clk) IMX ## plat ## _CLK_ ## clk
+#define SCMI_CLK_(plat, clk) SCMI_CLK__(plat, clk)
+#define SCMI_CLK(clk) SCMI_CLK_(IMX_PLAT, clk)
+
+#define SCMI_PD__(plat, pd) IMX ## plat ## _PD_ ## pd
+#define SCMI_PD_(plat, pd) SCMI_PD__(plat, pd)
+#define SCMI_PD(pd) SCMI_PD_(IMX_PLAT, pd)
+
+#define SCMI_CPU__(plat) MXC_CPU_IMX ## plat
+#define SCMI_CPU_(plat) SCMI_CPU__(plat)
+#define SCMI_CPU SCMI_CPU_(IMX_PLAT)
+
+#endif
diff --git a/arch/arm/mach-imx/imx9/scmi/soc.c b/arch/arm/mach-imx/imx9/scmi/soc.c
index f0b2aad8701..43aecca6f48 100644
--- a/arch/arm/mach-imx/imx9/scmi/soc.c
+++ b/arch/arm/mach-imx/imx9/scmi/soc.c
@@ -21,6 +21,7 @@
 #include <linux/iopoll.h>
 #include <scmi_agent.h>
 #include <scmi_nxp_protocols.h>
+#include "common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -176,7 +177,7 @@ u32 get_cpu_rev(void)
 {
 	u32 rev = (gd->arch.soc_rev >> 24) - 0xa0;
 
-	return (MXC_CPU_IMX95 << 12) | (CHIP_REV_1_0 + rev);
+	return (SCMI_CPU << 12) | (CHIP_REV_1_0 + rev);
 }
 
 #define UNLOCK_WORD 0xD928C520
@@ -437,12 +438,16 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 {
 	u32 val[2] = {};
 	int ret, num_of_macs;
+	u32 bank = 40;
 
-	ret = fuse_read(40, 5, &val[0]);
+	if (is_imx94())
+		bank = 66;
+
+	ret = fuse_read(bank, 5, &val[0]);
 	if (ret)
 		goto err;
 
-	ret = fuse_read(40, 6, &val[1]);
+	ret = fuse_read(bank, 6, &val[1]);
 	if (ret)
 		goto err;
 
@@ -458,10 +463,32 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 	mac[3] = (val[0] >> 24) & 0xff;
 	mac[4] = val[1] & 0xff;
 	mac[5] = (val[1] >> 8) & 0xff;
-	if (dev_id == 1)
-		mac[5] = mac[5] + 3;
-	if (dev_id == 2)
-		mac[5] = mac[5] + 6;
+
+	if (is_imx94()) {
+		/*
+		 * i.MX94 uses the following mac address offset list:
+		 * | No.    | Module      | Mac address user          |
+		 * |--------|-------------|---------------------------|
+		 * | 0 ~ 1  | ethercat    | port0/port1               |
+		 * | 2      | netc switch | internal enetc3 mac/swp0  |
+		 * | 3 ~ 6  |             | enetc3 vf1~3/swp1         |
+		 * | 7      | enetc mac   | enetc0 pf                 |
+		 * | 8      |             | enetc1 pf                 |
+		 * | 9      |             | enetc2 pf                 |
+		 * | 10     | netc switch | swp2                      |
+		 */
+		if (dev_id == 0)
+			mac[5] = mac[5] + 2; /* enetc3 mac/swp0 */
+		if (dev_id == 1)
+			mac[5] = mac[5] + 8; /* enetc1 */
+		if (dev_id == 2)
+			mac[5] = mac[5] + 9; /* enetc2 */
+	} else {
+		if (dev_id == 1)
+			mac[5] = mac[5] + 3;
+		if (dev_id == 2)
+			mac[5] = mac[5] + 6;
+	}
 
 	debug("%s: MAC%d: %pM\n", __func__, dev_id, mac);
 	return;
@@ -518,7 +545,6 @@ static char *rst_string_imx94[32] = {
 	"por"
 };
 
-
 int get_reset_reason(bool sys, bool lm)
 {
 	struct scmi_imx_misc_reset_reason_in in = {
@@ -612,8 +638,8 @@ int get_reset_reason(bool sys, bool lm)
 const char *get_imx_type(u32 imxtype)
 {
 	switch (imxtype) {
-	case MXC_CPU_IMX95:
-		return "95";/* iMX95 FULL */
+	case SCMI_CPU:
+		return IMX_PLAT_STR;
 	default:
 		return "??";
 	}
@@ -701,6 +727,10 @@ int arch_cpu_init(void)
 		gpio_reset(GPIO3_BASE_ADDR);
 		gpio_reset(GPIO4_BASE_ADDR);
 		gpio_reset(GPIO5_BASE_ADDR);
+#ifdef CONFIG_IMX94
+		gpio_reset(GPIO6_BASE_ADDR);
+		gpio_reset(GPIO7_BASE_ADDR);
+#endif
 	}
 
 	return 0;

-- 
2.43.0

[PATCH v1 5/8] imx: container: Add i.MX94 support to get_imageset_end()

[Alice Guo (OSS)]

From: Ye Li <ye.li@nxp.com>

Extend get_imageset_end() to handle i.MX94 family.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/image-container.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c
index 3a9e6dcf225..78f2488cf6d 100644
--- a/arch/arm/mach-imx/image-container.c
+++ b/arch/arm/mach-imx/image-container.c
@@ -297,7 +297,7 @@ static ulong get_imageset_end(void *dev, int dev_type)
 
 	debug("seco container size 0x%x\n", value_container[0]);
 
-	if (is_imx95()) {
+	if (is_imx95() || is_imx94()) {
 		offset[1] = ALIGN(hdr_length, CONTAINER_HDR_ALIGNMENT) + offset[0];
 
 		value_container[1] = get_dev_container_size(dev, dev_type, offset[1], &hdr_length, &v2x_fw);
@@ -321,7 +321,7 @@ static ulong get_imageset_end(void *dev, int dev_type)
 	value_container[2] = get_dev_container_size(dev, dev_type, offset[2], &hdr_length, NULL);
 	if (value_container[2] < 0) {
 		debug("Parse scu container image failed %d, only seco container\n", value_container[2]);
-		if (is_imx95())
+		if (is_imx95() || is_imx94())
 			return value_container[1] + offset[1]; /* return seco + v2x container total size */
 		else
 			return value_container[0] + offset[0]; /* return seco container total size */

-- 
2.43.0

[PATCH v1 6/8] imx: ele_ahab: Implement display_life_cycle() for i.MX95

[Alice Guo (OSS)]

From: Ye Li <ye.li@nxp.com>

The register reflects lifecycle and some lifecycle-derived state of
i.MX95 has new offset address and layout, so display_life_cycle() is
added specifically for it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/ele_ahab.c | 55 +++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 52 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c
index 647daeb6562..39aba65d29e 100644
--- a/arch/arm/mach-imx/ele_ahab.c
+++ b/arch/arm/mach-imx/ele_ahab.c
@@ -411,6 +411,54 @@ static int do_authenticate(struct cmd_tbl *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
+#if IS_ENABLED(CONFIG_IMX95)
+#define FSB_LC_OFFSET 0x414
+#define LC_OEM_OPEN 0x10
+static void display_life_cycle(u32 lc)
+{
+	printf("Lifecycle: 0x%08X, ", lc);
+	switch (lc) {
+	case 0x1:
+		printf("BLANK\n\n");
+		break;
+	case 0x2:
+		printf("FAB Default\n\n");
+		break;
+	case 0x4:
+		printf("FAB\n\n");
+		break;
+	case 0x8:
+		printf("NXP Provisioned\n\n");
+		break;
+	case 0x10:
+		printf("OEM Open\n\n");
+		break;
+	case 0x20:
+		printf("OEM secure world closed\n\n");
+		break;
+	case 0x40:
+		printf("OEM closed\n\n");
+		break;
+	case 0x80:
+		printf("OEM Locked\n\n");
+		break;
+	case 0x100:
+		printf("Field Return OEM\n\n");
+		break;
+	case 0x200:
+		printf("Field Return NXP\n\n");
+		break;
+	case 0x400:
+		printf("BRICKED\n\n");
+		break;
+	default:
+		printf("Unknown\n\n");
+		break;
+	}
+}
+#else
+#define FSB_LC_OFFSET 0x41c
+#define LC_OEM_OPEN 0x8
 static void display_life_cycle(u32 lc)
 {
 	printf("Lifecycle: 0x%08X, ", lc);
@@ -447,6 +495,7 @@ static void display_life_cycle(u32 lc)
 		break;
 	}
 }
+#endif
 
 static int confirm_close(void)
 {
@@ -474,10 +523,10 @@ static int do_ahab_close(struct cmd_tbl *cmdtp, int flag, int argc,
 	if (!confirm_close())
 		return -EACCES;
 
-	lc = readl(FSB_BASE_ADDR + 0x41c);
+	lc = readl(FSB_BASE_ADDR + FSB_LC_OFFSET);
 	lc &= 0x3ff;
 
-	if (lc != 0x8) {
+	if (lc != LC_OEM_OPEN) {
 		puts("Current lifecycle is NOT OEM open, can't move to OEM closed\n");
 		display_life_cycle(lc);
 		return -EPERM;
@@ -540,7 +589,7 @@ static int do_ahab_status(struct cmd_tbl *cmdtp, int flag, int argc, char *const
 	u32 cnt = AHAB_MAX_EVENTS;
 	int ret;
 
-	lc = readl(FSB_BASE_ADDR + 0x41c);
+	lc = readl(FSB_BASE_ADDR + FSB_LC_OFFSET);
 	lc &= 0x3ff;
 
 	display_life_cycle(lc);

-- 
2.43.0

[PATCH v1 7/8] imx: ele_ahab: Add i.MX94 support to display_life_cycle()

[Alice Guo (OSS)]

From: Ye Li <ye.li@nxp.com>

Extend display_life_cycle() to support i.MX94.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/ele_ahab.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c
index 39aba65d29e..38e671e3935 100644
--- a/arch/arm/mach-imx/ele_ahab.c
+++ b/arch/arm/mach-imx/ele_ahab.c
@@ -411,7 +411,7 @@ static int do_authenticate(struct cmd_tbl *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-#if IS_ENABLED(CONFIG_IMX95)
+#if IS_ENABLED(CONFIG_IMX95) || IS_ENABLED(CONFIG_IMX94)
 #define FSB_LC_OFFSET 0x414
 #define LC_OEM_OPEN 0x10
 static void display_life_cycle(u32 lc)

-- 
2.43.0

[PATCH v1 8/8] pinctrl: nxp: Add i.MX94 daisy register offset

[Alice Guo (OSS)]

From: Alice Guo <alice.guo@nxp.com>

Define the daisy register offset for i.MX94 at 0x608 within the iomuxc
register space. This enables correct pad selection for daisy chain
configuration on i.MX94 platforms.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/pinctrl/nxp/pinctrl-imx-scmi.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/nxp/pinctrl-imx-scmi.c b/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
index aed47be337d..781835c6852 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
@@ -16,6 +16,7 @@
 #include "pinctrl-imx.h"
 
 #define DAISY_OFFSET_IMX95      0x408
+#define DAISY_OFFSET_IMX94      0x608
 
 /* SCMI pin control types */
 #define PINCTRL_TYPE_MUX        192
@@ -133,6 +134,8 @@ static int imx_scmi_pinctrl_probe(struct udevice *dev)
 
 	if (IS_ENABLED(CONFIG_IMX95))
 		priv->daisy_offset = DAISY_OFFSET_IMX95;
+	else if (IS_ENABLED(CONFIG_IMX94))
+		priv->daisy_offset = DAISY_OFFSET_IMX94;
 	else
 		return -EINVAL;
 
@@ -141,7 +144,7 @@ static int imx_scmi_pinctrl_probe(struct udevice *dev)
 
 static int imx_scmi_pinctrl_bind(struct udevice *dev)
 {
-	if (IS_ENABLED(CONFIG_IMX95))
+	if (IS_ENABLED(CONFIG_IMX95) || IS_ENABLED(CONFIG_IMX94))
 		return 0;
 
 	return -ENODEV;

-- 
2.43.0

Re: [PATCH v1 4/8] imx9: scmi: Update the files under arch/arm/mach-imx/imx9/scmi/ to support i.MX94

[E Shattow]

Hi Alice,

On 9/1/25 03:48, Alice Guo (OSS) wrote:
> From: Ye Li <ye.li@nxp.com>
> 
> - Add base addresses for WDG3, WDG4, GPIO6, and GPIO7 for i.MX94.
> - Introduce common.h with macros of clock IDs, power domains, and CPU
>   types for platform-specific replacement (e.g., i.MX94, i.MX95).
> - Extend imx_get_mac_from_fuse() to support i.MX94.
> 
> Signed-off-by: Ye Li <ye.li@nxp.com>
> Signed-off-by: Alice Guo <alice.guo@nxp.com>
> Acked-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
> ---
>  arch/arm/include/asm/arch-imx9/imx-regs.h |  9 ++++++
>  arch/arm/mach-imx/imx9/scmi/clock.c       | 28 +++++++++--------
>  arch/arm/mach-imx/imx9/scmi/common.h      | 41 +++++++++++++++++++++++++
>  arch/arm/mach-imx/imx9/scmi/soc.c         | 50 ++++++++++++++++++++++++-------
>  4 files changed, 105 insertions(+), 23 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h
> index 5127fe8f286..a44fa6663c3 100644
> --- a/arch/arm/include/asm/arch-imx9/imx-regs.h
> +++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
> @@ -17,14 +17,23 @@
>  
>  #define ANATOP_BASE_ADDR    0x44480000UL
>  
> +#ifdef CONFIG_IMX94
> +#define WDG3_BASE_ADDR      0x49220000UL
> +#define WDG4_BASE_ADDR      0x49230000UL
> +#else
>  #define WDG3_BASE_ADDR      0x42490000UL
>  #define WDG4_BASE_ADDR      0x424a0000UL
> +#endif
>  #define WDG5_BASE_ADDR      0x424b0000UL
>  
>  #define GPIO2_BASE_ADDR	    0x43810000UL
>  #define GPIO3_BASE_ADDR	    0x43820000UL
>  #define GPIO4_BASE_ADDR	    0x43840000UL
>  #define GPIO5_BASE_ADDR	    0x43850000UL
> +#ifdef CONFIG_IMX94
> +#define GPIO6_BASE_ADDR	    0x43860000UL
> +#define GPIO7_BASE_ADDR	    0x43870000UL
> +#endif
>  
>  #define FSB_BASE_ADDR       0x47510000UL
>  
> diff --git a/arch/arm/mach-imx/imx9/scmi/clock.c b/arch/arm/mach-imx/imx9/scmi/clock.c
> index 6e6541eaa31..1f071873dca 100644
> --- a/arch/arm/mach-imx/imx9/scmi/clock.c
> +++ b/arch/arm/mach-imx/imx9/scmi/clock.c
> @@ -6,16 +6,18 @@
>  #include <asm/arch/clock.h>
>  #include <dm/uclass.h>
>  #include <scmi_agent.h>
> +#include <scmi_nxp_protocols.h>

>  #include "../../../../../dts/upstream/src/arm64/freescale/imx95-clock.h"

What is this? I asked and it was suggested to send a patch upstream, but
they said no. Ref:
https://lore.kernel.org/lkml/PAXPR04MB845970863A16718967270D1A880EA@PAXPR04MB8459.eurprd04.prod.outlook.com/

> +#include "common.h"
>  
>  u32 get_arm_core_clk(void)
>  {
>  	u32 val;
>  
> -	val = imx_clk_scmi_get_rate(IMX95_CLK_SEL_A55C0);
> +	val = imx_clk_scmi_get_rate(SCMI_CLK(SEL_A55C0));
>  	if (val)
>  		return val;
> -	return imx_clk_scmi_get_rate(IMX95_CLK_A55);
> +	return imx_clk_scmi_get_rate(SCMI_CLK(A55));
>  }
>  
>  void init_uart_clk(u32 index)
> @@ -24,13 +26,13 @@ void init_uart_clk(u32 index)
>  
>  	switch (index) {
>  	case 0:
> -		clock_id = IMX95_CLK_LPUART1;
> +		clock_id = SCMI_CLK(LPUART1);
>  		break;
>  	case 1:
> -		clock_id = IMX95_CLK_LPUART2;
> +		clock_id = SCMI_CLK(LPUART2);
>  		break;
>  	case 2:
> -		clock_id = IMX95_CLK_LPUART3;
> +		clock_id = SCMI_CLK(LPUART3);
>  		break;
>  	default:
>  		return;
> @@ -38,7 +40,7 @@ void init_uart_clk(u32 index)
>  
>  	/* 24MHz */
>  	imx_clk_scmi_enable(clock_id, false);
> -	imx_clk_scmi_set_parent(clock_id, IMX95_CLK_24M);
> +	imx_clk_scmi_set_parent(clock_id, SCMI_CLK(24M));
>  	imx_clk_scmi_set_rate(clock_id, 24000000);
>  	imx_clk_scmi_enable(clock_id, true);
>  }
> @@ -49,19 +51,19 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
>  	case MXC_ARM_CLK:
>  		return get_arm_core_clk();
>  	case MXC_IPG_CLK:
> -		return imx_clk_scmi_get_rate(IMX95_CLK_BUSWAKEUP);
> +		return imx_clk_scmi_get_rate(SCMI_CLK(BUSWAKEUP));
>  	case MXC_CSPI_CLK:
> -		return imx_clk_scmi_get_rate(IMX95_CLK_LPSPI1);
> +		return imx_clk_scmi_get_rate(SCMI_CLK(LPSPI1));
>  	case MXC_ESDHC_CLK:
> -		return imx_clk_scmi_get_rate(IMX95_CLK_USDHC1);
> +		return imx_clk_scmi_get_rate(SCMI_CLK(USDHC1));
>  	case MXC_ESDHC2_CLK:
> -		return imx_clk_scmi_get_rate(IMX95_CLK_USDHC2);
> +		return imx_clk_scmi_get_rate(SCMI_CLK(USDHC2));
>  	case MXC_ESDHC3_CLK:
> -		return imx_clk_scmi_get_rate(IMX95_CLK_USDHC3);
> +		return imx_clk_scmi_get_rate(SCMI_CLK(USDHC3));
>  	case MXC_UART_CLK:
> -		return imx_clk_scmi_get_rate(IMX95_CLK_LPUART1);
> +		return imx_clk_scmi_get_rate(SCMI_CLK(LPUART1));
>  	case MXC_FLEXSPI_CLK:
> -		return imx_clk_scmi_get_rate(IMX95_CLK_FLEXSPI1);
> +		return imx_clk_scmi_get_rate(SCMI_CLK(FLEXSPI1));
>  	default:
>  		return -1;
>  	};
> diff --git a/arch/arm/mach-imx/imx9/scmi/common.h b/arch/arm/mach-imx/imx9/scmi/common.h
> new file mode 100644
> index 00000000000..df26ecff3e4
> --- /dev/null
> +++ b/arch/arm/mach-imx/imx9/scmi/common.h
> @@ -0,0 +1,41 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2025 NXP
> + */
> +
> +#ifndef _SCMI_CLOCK_COMMON_H_
> +#define _SCMI_CLOCK_COMMON_H_
> +

> +#ifdef CONFIG_IMX94
> +#define IMX_PLAT 94
> +#include <../dts/upstream/src/arm64/freescale/imx94-clock.h>
> +#include <../dts/upstream/src/arm64/freescale/imx94-power.h>
> +
> +#define IMX94_CLK_FLEXSPI1 IMX94_CLK_XSPI1
> +#endif
> +
> +#ifdef CONFIG_IMX95
> +#define IMX_PLAT 95
> +#include <../dts/upstream/src/arm64/freescale/imx95-clock.h>
> +#include <../dts/upstream/src/arm64/freescale/imx95-power.h>
> +
> +#define IMX95_PD_M70 IMX95_PD_M7
> +#endif

Again this weird include relative-global path... not good.

I don't know what it should be, sorry. It is fragile and we should do
something better.

> +
> +#define IMX_PLAT_STR__(plat) # plat
> +#define IMX_PLAT_STR_(IMX_PLAT) IMX_PLAT_STR__(IMX_PLAT)
> +#define IMX_PLAT_STR IMX_PLAT_STR_(IMX_PLAT)
> +
> +#define SCMI_CLK__(plat, clk) IMX ## plat ## _CLK_ ## clk
> +#define SCMI_CLK_(plat, clk) SCMI_CLK__(plat, clk)
> +#define SCMI_CLK(clk) SCMI_CLK_(IMX_PLAT, clk)
> +
> +#define SCMI_PD__(plat, pd) IMX ## plat ## _PD_ ## pd
> +#define SCMI_PD_(plat, pd) SCMI_PD__(plat, pd)
> +#define SCMI_PD(pd) SCMI_PD_(IMX_PLAT, pd)
> +
> +#define SCMI_CPU__(plat) MXC_CPU_IMX ## plat
> +#define SCMI_CPU_(plat) SCMI_CPU__(plat)
> +#define SCMI_CPU SCMI_CPU_(IMX_PLAT)
> +
> +#endif
> diff --git a/arch/arm/mach-imx/imx9/scmi/soc.c b/arch/arm/mach-imx/imx9/scmi/soc.c
> index f0b2aad8701..43aecca6f48 100644
> --- a/arch/arm/mach-imx/imx9/scmi/soc.c
> +++ b/arch/arm/mach-imx/imx9/scmi/soc.c
> @@ -21,6 +21,7 @@
>  #include <linux/iopoll.h>
>  #include <scmi_agent.h>
>  #include <scmi_nxp_protocols.h>
> +#include "common.h"
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -176,7 +177,7 @@ u32 get_cpu_rev(void)
>  {
>  	u32 rev = (gd->arch.soc_rev >> 24) - 0xa0;
>  
> -	return (MXC_CPU_IMX95 << 12) | (CHIP_REV_1_0 + rev);
> +	return (SCMI_CPU << 12) | (CHIP_REV_1_0 + rev);
>  }
>  
>  #define UNLOCK_WORD 0xD928C520
> @@ -437,12 +438,16 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
>  {
>  	u32 val[2] = {};
>  	int ret, num_of_macs;
> +	u32 bank = 40;
>  
> -	ret = fuse_read(40, 5, &val[0]);
> +	if (is_imx94())
> +		bank = 66;
> +
> +	ret = fuse_read(bank, 5, &val[0]);
>  	if (ret)
>  		goto err;
>  
> -	ret = fuse_read(40, 6, &val[1]);
> +	ret = fuse_read(bank, 6, &val[1]);
>  	if (ret)
>  		goto err;
>  
> @@ -458,10 +463,32 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
>  	mac[3] = (val[0] >> 24) & 0xff;
>  	mac[4] = val[1] & 0xff;
>  	mac[5] = (val[1] >> 8) & 0xff;
> -	if (dev_id == 1)
> -		mac[5] = mac[5] + 3;
> -	if (dev_id == 2)
> -		mac[5] = mac[5] + 6;
> +
> +	if (is_imx94()) {
> +		/*
> +		 * i.MX94 uses the following mac address offset list:
> +		 * | No.    | Module      | Mac address user          |
> +		 * |--------|-------------|---------------------------|
> +		 * | 0 ~ 1  | ethercat    | port0/port1               |
> +		 * | 2      | netc switch | internal enetc3 mac/swp0  |
> +		 * | 3 ~ 6  |             | enetc3 vf1~3/swp1         |
> +		 * | 7      | enetc mac   | enetc0 pf                 |
> +		 * | 8      |             | enetc1 pf                 |
> +		 * | 9      |             | enetc2 pf                 |
> +		 * | 10     | netc switch | swp2                      |
> +		 */
> +		if (dev_id == 0)
> +			mac[5] = mac[5] + 2; /* enetc3 mac/swp0 */
> +		if (dev_id == 1)
> +			mac[5] = mac[5] + 8; /* enetc1 */
> +		if (dev_id == 2)
> +			mac[5] = mac[5] + 9; /* enetc2 */
> +	} else {
> +		if (dev_id == 1)
> +			mac[5] = mac[5] + 3;
> +		if (dev_id == 2)
> +			mac[5] = mac[5] + 6;
> +	}
>  
>  	debug("%s: MAC%d: %pM\n", __func__, dev_id, mac);
>  	return;
> @@ -518,7 +545,6 @@ static char *rst_string_imx94[32] = {
>  	"por"
>  };
>  
> -
>  int get_reset_reason(bool sys, bool lm)
>  {
>  	struct scmi_imx_misc_reset_reason_in in = {
> @@ -612,8 +638,8 @@ int get_reset_reason(bool sys, bool lm)
>  const char *get_imx_type(u32 imxtype)
>  {
>  	switch (imxtype) {
> -	case MXC_CPU_IMX95:
> -		return "95";/* iMX95 FULL */
> +	case SCMI_CPU:
> +		return IMX_PLAT_STR;
>  	default:
>  		return "??";
>  	}
> @@ -701,6 +727,10 @@ int arch_cpu_init(void)
>  		gpio_reset(GPIO3_BASE_ADDR);
>  		gpio_reset(GPIO4_BASE_ADDR);
>  		gpio_reset(GPIO5_BASE_ADDR);
> +#ifdef CONFIG_IMX94
> +		gpio_reset(GPIO6_BASE_ADDR);
> +		gpio_reset(GPIO7_BASE_ADDR);
> +#endif
>  	}
>  
>  	return 0;
> 

Best regards,

-E Shattow

回复: [EXT] Re: [PATCH v1 4/8] imx9: scmi: Update the files under arch/arm/mach-imx/imx9/scmi/ to support i.MX94

[Alice Guo (OSS)]

> -----邮件原件-----
> 发件人: E Shattow <e@freeshell.de>
> 发送时间: 2025年9月11日 9:57
> 收件人: Alice Guo (OSS) <alice.guo@oss.nxp.com>; Stefano Babic
> <sbabic@nabladev.com>; Fabio Estevam <festevam@gmail.com>;
> dl-uboot-imx <uboot-imx@nxp.com>; Tom Rini <trini@konsulko.com>; Alice
> Guo <alice.guo@nxp.com>
> 抄送: u-boot@lists.denx.de; Ye Li <ye.li@nxp.com>; Peng Fan
> <peng.fan@nxp.com>; Jacky Bai <ping.bai@nxp.com>
> 主题: [EXT] Re: [PATCH v1 4/8] imx9: scmi: Update the files under
> arch/arm/mach-imx/imx9/scmi/ to support i.MX94
> > --- a/arch/arm/mach-imx/imx9/scmi/clock.c
> > +++ b/arch/arm/mach-imx/imx9/scmi/clock.c
> > @@ -6,16 +6,18 @@
> >  #include <asm/arch/clock.h>
> >  #include <dm/uclass.h>
> >  #include <scmi_agent.h>
> > +#include <scmi_nxp_protocols.h>
>
> >  #include "../../../../../dts/upstream/src/arm64/freescale/imx95-clock.h"
>
> What is this? I asked and it was suggested to send a patch upstream, but they
> said no. Ref:
> https://lore.ker/
> nel.org%2Flkml%2FPAXPR04MB845970863A16718967270D1A880EA%40PAX
> PR04MB8459.eurprd04.prod.outlook.com%2F&data=05%7C02%7Calice.guo%
> 40nxp.com%7C35789f31bec8404e95ac08ddf0d67aea%7C686ea1d3bc2b4c6f
> a92cd99c5c301635%7C0%7C0%7C638931526200310361%7CUnknown%7CT
> WFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXa
> W4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=BLR6u
> pUWK8XEkHMAt5m0X%2BAn8gfONvDqwL6gULQZ2Oc%3D&reserved=0

This line of code is unnecessary and can be deleted.

> > +#include "common.h"
> >
> >  u32 get_arm_core_clk(void)
> >  {
> >       u32 val;
> >
> > -     val = imx_clk_scmi_get_rate(IMX95_CLK_SEL_A55C0);
> > +     val = imx_clk_scmi_get_rate(SCMI_CLK(SEL_A55C0));
> >       if (val)
> >               return val;
> > -     return imx_clk_scmi_get_rate(IMX95_CLK_A55);
> > +     return imx_clk_scmi_get_rate(SCMI_CLK(A55));
> >  }
> >
> >  void init_uart_clk(u32 index)
> > @@ -24,13 +26,13 @@ void init_uart_clk(u32 index)
> >
> >       switch (index) {
> >       case 0:
> > -             clock_id = IMX95_CLK_LPUART1;
> > +             clock_id = SCMI_CLK(LPUART1);
> >               break;
> >       case 1:
> > -             clock_id = IMX95_CLK_LPUART2;
> > +             clock_id = SCMI_CLK(LPUART2);
> >               break;
> >       case 2:
> > -             clock_id = IMX95_CLK_LPUART3;
> > +             clock_id = SCMI_CLK(LPUART3);
> >               break;
> >       default:
> >               return;
> > @@ -38,7 +40,7 @@ void init_uart_clk(u32 index)
> >
> >       /* 24MHz */
> >       imx_clk_scmi_enable(clock_id, false);
> > -     imx_clk_scmi_set_parent(clock_id, IMX95_CLK_24M);
> > +     imx_clk_scmi_set_parent(clock_id, SCMI_CLK(24M));
> >       imx_clk_scmi_set_rate(clock_id, 24000000);
> >       imx_clk_scmi_enable(clock_id, true);  } @@ -49,19 +51,19 @@
> > unsigned int mxc_get_clock(enum mxc_clock clk)
> >       case MXC_ARM_CLK:
> >               return get_arm_core_clk();
> >       case MXC_IPG_CLK:
> > -             return imx_clk_scmi_get_rate(IMX95_CLK_BUSWAKEUP);
> > +             return imx_clk_scmi_get_rate(SCMI_CLK(BUSWAKEUP));
> >       case MXC_CSPI_CLK:
> > -             return imx_clk_scmi_get_rate(IMX95_CLK_LPSPI1);
> > +             return imx_clk_scmi_get_rate(SCMI_CLK(LPSPI1));
> >       case MXC_ESDHC_CLK:
> > -             return imx_clk_scmi_get_rate(IMX95_CLK_USDHC1);
> > +             return imx_clk_scmi_get_rate(SCMI_CLK(USDHC1));
> >       case MXC_ESDHC2_CLK:
> > -             return imx_clk_scmi_get_rate(IMX95_CLK_USDHC2);
> > +             return imx_clk_scmi_get_rate(SCMI_CLK(USDHC2));
> >       case MXC_ESDHC3_CLK:
> > -             return imx_clk_scmi_get_rate(IMX95_CLK_USDHC3);
> > +             return imx_clk_scmi_get_rate(SCMI_CLK(USDHC3));
> >       case MXC_UART_CLK:
> > -             return imx_clk_scmi_get_rate(IMX95_CLK_LPUART1);
> > +             return imx_clk_scmi_get_rate(SCMI_CLK(LPUART1));
> >       case MXC_FLEXSPI_CLK:
> > -             return imx_clk_scmi_get_rate(IMX95_CLK_FLEXSPI1);
> > +             return imx_clk_scmi_get_rate(SCMI_CLK(FLEXSPI1));
> >       default:
> >               return -1;
> >       };
> > diff --git a/arch/arm/mach-imx/imx9/scmi/common.h
> > b/arch/arm/mach-imx/imx9/scmi/common.h
> > new file mode 100644
> > index 00000000000..df26ecff3e4
> > --- /dev/null
> > +++ b/arch/arm/mach-imx/imx9/scmi/common.h
> > @@ -0,0 +1,41 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright 2025 NXP
> > + */
> > +
> > +#ifndef _SCMI_CLOCK_COMMON_H_
> > +#define _SCMI_CLOCK_COMMON_H_
> > +
>
> > +#ifdef CONFIG_IMX94
> > +#define IMX_PLAT 94
> > +#include <../dts/upstream/src/arm64/freescale/imx94-clock.h>
> > +#include <../dts/upstream/src/arm64/freescale/imx94-power.h>
> > +
> > +#define IMX94_CLK_FLEXSPI1 IMX94_CLK_XSPI1 #endif
> > +
> > +#ifdef CONFIG_IMX95
> > +#define IMX_PLAT 95
> > +#include <../dts/upstream/src/arm64/freescale/imx95-clock.h>
> > +#include <../dts/upstream/src/arm64/freescale/imx95-power.h>
> > +
> > +#define IMX95_PD_M70 IMX95_PD_M7
> > +#endif
>
> Again this weird include relative-global path... not good.
>
> I don't know what it should be, sorry. It is fragile and we should do something
> better.
>

These files are derived from the Linux source code.

Best Regards,
Alice Guo

Re: [EXT] Re: [PATCH v1 4/8] imx9: scmi: Update the files under arch/arm/mach-imx/imx9/scmi/ to support i.MX94

[Fabio Estevam]

Hi Alice,

On Thu, Sep 11, 2025 at 3:42 AM Alice Guo (OSS) <alice.guo@oss.nxp.com> wrote:

> > >  #include "../../../../../dts/upstream/src/arm64/freescale/imx95-clock.h"
> >
> > What is this? I asked and it was suggested to send a patch upstream, but they
> > said no. Ref:
...
> This line of code is unnecessary and can be deleted.

> > Again this weird include relative-global path... not good.
> >
> > I don't know what it should be, sorry. It is fragile and we should do something
> > better.
> >
>
> These files are derived from the Linux source code.

Please address E Shattow's comments and send a v2 that also contains
the imx94-evk support.

This way, we can achieve build coverage for the entire series.

Thanks

Re: [EXT] Re: [PATCH v1 4/8] imx9: scmi: Update the files under arch/arm/mach-imx/imx9/scmi/ to support i.MX94

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 1249 bytes --]

On Sun, Sep 21, 2025 at 09:15:43AM -0300, Fabio Estevam wrote:
> Hi Alice,
> 
> On Thu, Sep 11, 2025 at 3:42 AM Alice Guo (OSS) <alice.guo@oss.nxp.com> wrote:
> 
> > > >  #include "../../../../../dts/upstream/src/arm64/freescale/imx95-clock.h"
> > >
> > > What is this? I asked and it was suggested to send a patch upstream, but they
> > > said no. Ref:
> ...
> > This line of code is unnecessary and can be deleted.
> 
> > > Again this weird include relative-global path... not good.
> > >
> > > I don't know what it should be, sorry. It is fragile and we should do something
> > > better.
> > >
> >
> > These files are derived from the Linux source code.
> 
> Please address E Shattow's comments and send a v2 that also contains
> the imx94-evk support.
> 
> This way, we can achieve build coverage for the entire series.

There was some discussion of this on IRC as well, and the issue is that
(for now?) this header in the kernel is supposed to be with the dts
files and not dt-bindings and so it's not in a normal search path.

I think that for us that means we should do some Makefile games in that
directory and add a -I$(srctree)/dts/... and comment in the code to say
this is a DT header file.

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

回复: [EXT] Re: [PATCH v1 4/8] imx9: scmi: Update the files under arch/arm/mach-imx/imx9/scmi/ to support i.MX94

[Alice Guo (OSS)]

> -----邮件原件-----
> 发件人: Tom Rini <trini@konsulko.com>
> 发送时间: 2025年9月22日 0:07
> 收件人: Fabio Estevam <festevam@gmail.com>
> 抄送: Alice Guo (OSS) <alice.guo@oss.nxp.com>; E Shattow <e@freeshell.de>;
> Stefano Babic <sbabic@nabladev.com>; dl-uboot-imx <uboot-imx@nxp.com>;
> Alice Guo <alice.guo@nxp.com>; u-boot@lists.denx.de; Ye Li <ye.li@nxp.com>;
> Peng Fan <peng.fan@nxp.com>; Jacky Bai <ping.bai@nxp.com>
> 主题: Re: [EXT] Re: [PATCH v1 4/8] imx9: scmi: Update the files under
> arch/arm/mach-imx/imx9/scmi/ to support i.MX94
> 
> On Sun, Sep 21, 2025 at 09:15:43AM -0300, Fabio Estevam wrote:
> > Hi Alice,
> >
> > On Thu, Sep 11, 2025 at 3:42 AM Alice Guo (OSS) <alice.guo@oss.nxp.com>
> wrote:
> >
> > > > >  #include
> "../../../../../dts/upstream/src/arm64/freescale/imx95-clock.h"
> > > >
> > > > What is this? I asked and it was suggested to send a patch
> > > > upstream, but they said no. Ref:
> > ...
> > > This line of code is unnecessary and can be deleted.
> >
> > > > Again this weird include relative-global path... not good.
> > > >
> > > > I don't know what it should be, sorry. It is fragile and we should
> > > > do something better.
> > > >
> > >
> > > These files are derived from the Linux source code.
> >
> > Please address E Shattow's comments and send a v2 that also contains
> > the imx94-evk support.
> >
> > This way, we can achieve build coverage for the entire series.
> 
> There was some discussion of this on IRC as well, and the issue is that (for now?)
> this header in the kernel is supposed to be with the dts files and not dt-bindings
> and so it's not in a normal search path.
> 
> I think that for us that means we should do some Makefile games in that
> directory and add a -I$(srctree)/dts/... and comment in the code to say this is a
> DT header file.
> 
> --
> Tom

Hi Tom,

Thank you for your suggestion. I will address this issue by modifying the Makefile in the next version.

Best regards,
Alice Guo