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From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: Tom Rini <trini@konsulko.com>
Cc: <joe.hershberger@ni.com>, <rfried.dev@gmail.com>,
	<sjg@chromium.org>, <u-boot@lists.denx.de>, <s-anna@ti.com>,
	<srk@ti.com>, <s-vadapalli@ti.com>
Subject: Re: [PATCH 3/6] net: ti: am65-cpsw-nuss: Add logic to support MDIO reset
Date: Mon, 31 Jul 2023 14:06:26 +0530	[thread overview]
Message-ID: <628ac8ae-7c58-0ffb-292d-3fe831e168af@ti.com> (raw)
In-Reply-To: <d9c79fd2-4813-7543-dd5e-729dd38c7799@ti.com>



On 31/07/23 10:13, Siddharth Vadapalli wrote:
> Tom,
> 
> On 22/07/23 01:06, Tom Rini wrote:
>> On Sat, Jul 08, 2023 at 04:15:20PM +0530, Siddharth Vadapalli wrote:
>>
>>> From: Suman Anna <s-anna@ti.com>
>>>
>>> Enhance the AM65 CPSW NUSS driver to perform a MDIO reset using a GPIO
>>> line. Logic is also added to perform a pre and post delay around reset
>>> using the optional 'reset-delay-us' and 'reset-post-delay-us' properties.
>>> This is similar to the reset being performed in the Linux kernel. The
>>> reset is done once when the CPSW MDIO bus is being initialized.
>>>
>>> Signed-off-by: Suman Anna <s-anna@ti.com>
>>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>>> ---
>>>  drivers/net/ti/am65-cpsw-nuss.c | 34 ++++++++++++++++++++++++++++++++-
>>>  1 file changed, 33 insertions(+), 1 deletion(-)
>>
>> So this breaks building on am62x_evm_a53 because now TI_AM65_CPSW_NUSS
>> needs to select DM_GPIO.  And the next problem is that we don't enable a
>> GPIO driver on that platform as we should I suspect make DA8XX_GPIO
>> default y if K3.
> 
> Sorry for the delayed response. I am planning to address this issue by using:
> #if CONFIG_IS_ENABLED(DM_GPIO)

Instead of CONFIG_IS_ENABLED(DM_GPIO), I will use:
if (IS_ENABLED(CONFIG_DM_GPIO)) {
in the functions.

> in the driver, similar to how it is done for other ethernet drivers such as:
> drivers/net/mvneta.c and drivers/net/mvpp2.c.
> 
> Also, the GPIO hog and reset capabilities are only required on those boards
> which have the Ethernet PHY present on a daughtercard connected to the board.
> 
> I will post the v2 of this series with the above changes to fix the build
> issues. Please let me know if the above approach is acceptable.
> 
>>
> 

-- 
Regards,
Siddharth.

  reply	other threads:[~2023-07-31  8:36 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-08 10:45 [PATCH 0/6] Add SGMII support for MAIN CPSW on TI's J7200 SoC Siddharth Vadapalli
2023-07-08 10:45 ` [PATCH 1/6] dma: ti: Update J21E PSIL endpoint information for MAIN CPSW0 Siddharth Vadapalli
2023-07-08 10:45 ` [PATCH 2/6] net: ti: am65-cpsw-nuss: Add support for SGMII mode Siddharth Vadapalli
2023-07-08 10:45 ` [PATCH 3/6] net: ti: am65-cpsw-nuss: Add logic to support MDIO reset Siddharth Vadapalli
2023-07-21 19:36   ` Tom Rini
2023-07-31  4:43     ` Siddharth Vadapalli
2023-07-31  8:36       ` Siddharth Vadapalli [this message]
2023-07-31 15:12         ` Tom Rini
2023-07-08 10:45 ` [PATCH 4/6] phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200 Siddharth Vadapalli
2023-07-08 10:45 ` [PATCH 5/6] phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J721E Siddharth Vadapalli
2023-07-08 10:45 ` [PATCH 6/6] configs: j7200_evm_a72: Enable configs for SGMII support with MAIN CPSW0 Siddharth Vadapalli

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