[PATCH] mtd: spinor: winbond: Describe several chips

[PATCH] mtd: spinor: winbond: Describe several chips

[Miquel Raynal]

All these chips are dual and quad capable. They are also DTR capable,
but the core is not yet ready for that.

Performances of all chips are comparable at 30MHz and are as follow:
Eraseblock single read speed: 938kiB/s
Eraseblock dual read speed:  1068kiB/s
Eraseblock quad read speed:  3751kiB/s

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/spi/spi-nor-ids.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 91ae49c94841..892bfd2db6f1 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -586,6 +586,12 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25h02jv", 0xef9022, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25h512nw-am", 0xefa020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25h01nw-am", 0xefa021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25h02nw-am", 0xefa022, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25q01nw-iq", 0xef6021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25q01nw-im", 0xef8021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25q02nw-im", 0xef8022, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 #endif
 #ifdef CONFIG_SPI_FLASH_XMC
 	/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
-- 
2.49.0

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Miquel Raynal]

Hello,

On 03/07/2025 at 19:02:53 +02, Miquel Raynal <miquel.raynal@bootlin.com> wrote:

> All these chips are dual and quad capable. They are also DTR capable,
> but the core is not yet ready for that.
>
> Performances of all chips are comparable at 30MHz and are as follow:
> Eraseblock single read speed: 938kiB/s
> Eraseblock dual read speed:  1068kiB/s
> Eraseblock quad read speed:  3751kiB/s
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

I believe this patch has been out for more than 2 months and is simple
enough, any plans for taking it soon?

Thanks,
Miquèl

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Miquel Raynal]

Hi,

I am manually adding Michael, as apparently he was not listed
automatically.

On 09/09/2025 at 12:12:26 +02, Miquel Raynal <miquel.raynal@bootlin.com> wrote:

> Hello,
>
> On 03/07/2025 at 19:02:53 +02, Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
>> All these chips are dual and quad capable. They are also DTR capable,
>> but the core is not yet ready for that.
>>
>> Performances of all chips are comparable at 30MHz and are as follow:
>> Eraseblock single read speed: 938kiB/s
>> Eraseblock dual read speed:  1068kiB/s
>> Eraseblock quad read speed:  3751kiB/s
>>
>> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
>
> I believe this patch has been out for more than 2 months and is simple
> enough, any plans for taking it soon?

It's now been few more months and I haven't been notified this patch got
merged. It is also not visible in upstream U-Boot. Could we please speed
up the merging process, especially for such simple change?

Thanks,
Miquèl

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 1247 bytes --]

On Thu, Nov 13, 2025 at 10:50:34AM +0100, Miquel Raynal wrote:
> Hi,
> 
> I am manually adding Michael, as apparently he was not listed
> automatically.
> 
> On 09/09/2025 at 12:12:26 +02, Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> 
> > Hello,
> >
> > On 03/07/2025 at 19:02:53 +02, Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> >
> >> All these chips are dual and quad capable. They are also DTR capable,
> >> but the core is not yet ready for that.
> >>
> >> Performances of all chips are comparable at 30MHz and are as follow:
> >> Eraseblock single read speed: 938kiB/s
> >> Eraseblock dual read speed:  1068kiB/s
> >> Eraseblock quad read speed:  3751kiB/s
> >>
> >> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> >
> > I believe this patch has been out for more than 2 months and is simple
> > enough, any plans for taking it soon?
> 
> It's now been few more months and I haven't been notified this patch got
> merged. It is also not visible in upstream U-Boot. Could we please speed
> up the merging process, especially for such simple change?

Jagan, Michael, Dario, do you need some help with the mtd/spi related
patches? This hass been going on for some time. Thanks!

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Michael Nazzareno Trimarchi]

Hi

Conference. I will pick him up this weekend together with others. Sorry for
it

Michael

Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com

Il gio 13 nov 2025, 15:27 Tom Rini <trini@konsulko.com> ha scritto:

> On Thu, Nov 13, 2025 at 10:50:34AM +0100, Miquel Raynal wrote:
> > Hi,
> >
> > I am manually adding Michael, as apparently he was not listed
> > automatically.
> >
> > On 09/09/2025 at 12:12:26 +02, Miquel Raynal <miquel.raynal@bootlin.com>
> wrote:
> >
> > > Hello,
> > >
> > > On 03/07/2025 at 19:02:53 +02, Miquel Raynal <
> miquel.raynal@bootlin.com> wrote:
> > >
> > >> All these chips are dual and quad capable. They are also DTR capable,
> > >> but the core is not yet ready for that.
> > >>
> > >> Performances of all chips are comparable at 30MHz and are as follow:
> > >> Eraseblock single read speed: 938kiB/s
> > >> Eraseblock dual read speed:  1068kiB/s
> > >> Eraseblock quad read speed:  3751kiB/s
> > >>
> > >> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > >
> > > I believe this patch has been out for more than 2 months and is simple
> > > enough, any plans for taking it soon?
> >
> > It's now been few more months and I haven't been notified this patch got
> > merged. It is also not visible in upstream U-Boot. Could we please speed
> > up the merging process, especially for such simple change?
>
> Jagan, Michael, Dario, do you need some help with the mtd/spi related
> patches? This hass been going on for some time. Thanks!
>
> --
> Tom
>

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 466 bytes --]

On Thu, Nov 13, 2025 at 03:36:00PM +0100, Michael Nazzareno Trimarchi wrote:

> Hi
> 
> Conference. I will pick him up this weekend together with others. Sorry for
> it

Hey, so it's Tuesday now and I haven't seen a PR and it doesn't look
like you made it to pushing anything to the custodian trees either.
Again I ask, do you need help here? I can go and pick up things that are
either clear or reviewed and start pushing it through. Thanks.

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Michael Nazzareno Trimarchi]

Hi Tom

On Tue, Nov 18, 2025 at 3:34 PM Tom Rini <trini@konsulko.com> wrote:
>
> On Thu, Nov 13, 2025 at 03:36:00PM +0100, Michael Nazzareno Trimarchi wrote:
>
> > Hi
> >
> > Conference. I will pick him up this weekend together with others. Sorry for
> > it
>
> Hey, so it's Tuesday now and I haven't seen a PR and it doesn't look
> like you made it to pushing anything to the custodian trees either.
> Again I ask, do you need help here? I can go and pick up things that are
> either clear or reviewed and start pushing it through. Thanks.
>
> --
> Tom

Let me sync with Dario.

Sorry for the delay

Michael


-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Michael Nazzareno Trimarchi]

Hi Tom, and Miguel

I pick a large part of the patches now, and check them and rebase all
of them. I will prepare one pull request today and another later this
week

All trivial patches are included and part of spi-nor patcheset

Michael

On Tue, Nov 18, 2025 at 3:43 PM Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:
>
> Hi Tom
>
> On Tue, Nov 18, 2025 at 3:34 PM Tom Rini <trini@konsulko.com> wrote:
> >
> > On Thu, Nov 13, 2025 at 03:36:00PM +0100, Michael Nazzareno Trimarchi wrote:
> >
> > > Hi
> > >
> > > Conference. I will pick him up this weekend together with others. Sorry for
> > > it
> >
> > Hey, so it's Tuesday now and I haven't seen a PR and it doesn't look
> > like you made it to pushing anything to the custodian trees either.
> > Again I ask, do you need help here? I can go and pick up things that are
> > either clear or reviewed and start pushing it through. Thanks.
> >
> > --
> > Tom
>
> Let me sync with Dario.
>
> Sorry for the delay
>
> Michael
>
>
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> michael@amarulasolutions.com
> __________________________________
>
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> T. +31 (0)85 111 9172
> info@amarulasolutions.com
> www.amarulasolutions.com



-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Miquel Raynal]

Hi Michael,

On 19/11/2025 at 10:06:42 +01, Michael Nazzareno Trimarchi <michael@amarulasolutions.com> wrote:

> Hi Tom, and Miguel
>
> I pick a large part of the patches now, and check them and rebase all
> of them. I will prepare one pull request today and another later this
> week

What do you mean by "a large part"? Can you be more specific about
which patches you would not be picking and why?

I am not comfortable with this sentence given for how long these have
been reviewed and applied in Linux and also submitted to
U-Boot. Custodians are supposed to work in best effort mode, but
delaying, delaying and further delaying is not what I would qualify as
an adapted behaviour. I understand you have other work to do. I also
take my responsibility in reviewing and collecting and merging patches,
I may do errors and I correct them when that happens, but try not to put
all the pressure on my very own shoulders, down to the situation where
nothing moves anymore. Tom has been regularly trying to provide support
and help. I would friendly suggest Amarula folks to adopts a softer/more
progressive approach regarding maintainance roles.

Thanks,
Miquèl

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Michael Nazzareno Trimarchi]

Hi Miquel

On Wed, Nov 19, 2025 at 11:01 AM Miquel Raynal
<miquel.raynal@bootlin.com> wrote:
>
> Hi Michael,
>
> On 19/11/2025 at 10:06:42 +01, Michael Nazzareno Trimarchi <michael@amarulasolutions.com> wrote:
>
> > Hi Tom, and Miguel
> >
> > I pick a large part of the patches now, and check them and rebase all
> > of them. I will prepare one pull request today and another later this
> > week
>

First of all I make a mistake with your name

> What do you mean by "a large part"? Can you be more specific about
> which patches you would not be picking and why?
>

Yes some of the patches are connected to Altera one and I need to look better
on them and I will look the next two days. Some of the patches are trivial:

- mtd: spinor: winbond: Describe several chips
- nand: raw: Kconfig: Correct some dependency issues
- cmd: mtd: benchmark: use lldiv() instead of 64-bit division
- spl: nand: typo 'destintion'
- mtd: spinand: add support for FudanMicro FM25S01A
- mtd: nand: raw: Drop SYS_NAND_SOFT_ECC from NAND_SANDBOX
- spi: spi-mem: fix coverity report CID 537478

Then I have applied the airoha spi patches on top of my queue.


> I am not comfortable with this sentence given for how long these have
> been reviewed and applied in Linux and also submitted to
> U-Boot. Custodians are supposed to work in best effort mode, but
> delaying, delaying and further delaying is not what I would qualify as
> an adapted behaviour. I understand you have other work to do. I also
> take my responsibility in reviewing and collecting and merging patches,

I will not delay anymore I will be more active regarding my duties

This is the branch u-boot-nand-20250918 . If you still want to go further
in the discussion and make the process better, I'm more then happy to
follow your suggestions.

> I may do errors and I correct them when that happens, but try not to put
> all the pressure on my very own shoulders, down to the situation where
> nothing moves anymore. Tom has been regularly trying to provide support
> and help. I would friendly suggest Amarula folks to adopts a softer/more
> progressive approach regarding maintainance roles.

We will try to work better.

Thanks,
Michael

>
> Thanks,
> Miquèl



-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com

Re: [PATCH] mtd: spinor: winbond: Describe several chips

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 2975 bytes --]

On Wed, Nov 19, 2025 at 11:08:29AM +0100, Michael Nazzareno Trimarchi wrote:
> Hi Miquel
> 
> On Wed, Nov 19, 2025 at 11:01 AM Miquel Raynal
> <miquel.raynal@bootlin.com> wrote:
> >
> > Hi Michael,
> >
> > On 19/11/2025 at 10:06:42 +01, Michael Nazzareno Trimarchi <michael@amarulasolutions.com> wrote:
> >
> > > Hi Tom, and Miguel
> > >
> > > I pick a large part of the patches now, and check them and rebase all
> > > of them. I will prepare one pull request today and another later this
> > > week
> >
> 
> First of all I make a mistake with your name
> 
> > What do you mean by "a large part"? Can you be more specific about
> > which patches you would not be picking and why?
> >
> 
> Yes some of the patches are connected to Altera one and I need to look better
> on them and I will look the next two days. Some of the patches are trivial:
> 
> - mtd: spinor: winbond: Describe several chips
> - nand: raw: Kconfig: Correct some dependency issues
> - cmd: mtd: benchmark: use lldiv() instead of 64-bit division
> - spl: nand: typo 'destintion'
> - mtd: spinand: add support for FudanMicro FM25S01A
> - mtd: nand: raw: Drop SYS_NAND_SOFT_ECC from NAND_SANDBOX
> - spi: spi-mem: fix coverity report CID 537478
> 
> Then I have applied the airoha spi patches on top of my queue.
> 
> 
> > I am not comfortable with this sentence given for how long these have
> > been reviewed and applied in Linux and also submitted to
> > U-Boot. Custodians are supposed to work in best effort mode, but
> > delaying, delaying and further delaying is not what I would qualify as
> > an adapted behaviour. I understand you have other work to do. I also
> > take my responsibility in reviewing and collecting and merging patches,
> 
> I will not delay anymore I will be more active regarding my duties
> 
> This is the branch u-boot-nand-20250918 . If you still want to go further
> in the discussion and make the process better, I'm more then happy to
> follow your suggestions.
> 
> > I may do errors and I correct them when that happens, but try not to put
> > all the pressure on my very own shoulders, down to the situation where
> > nothing moves anymore. Tom has been regularly trying to provide support
> > and help. I would friendly suggest Amarula folks to adopts a softer/more
> > progressive approach regarding maintainance roles.
> 
> We will try to work better.

Please, yes. And while a lot of the patches have been around for a while
I think at this point things that are left need to go in to the -next
branch as well. Which is unfortunate as they have been out for some
time, but given the point in the release cycle this is at, is the best
choice I think. And this also goes for "spi" patches as well, as the
split between "nand", "mtd' and "spi" is not always logically easy and
compounded by our custodians being at the same company with presumably
similar things vying for time. Thanks!

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]