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From: David Lechner <dlechner@baylibre.com>
To: Tom Rini <trini@konsulko.com>
Cc: Ryder Lee <ryder.lee@mediatek.com>,
	Weijie Gao <weijie.gao@mediatek.com>,
	 Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Igor Belwon <igor.belwon@mentallysanemainliners.org>,
	GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
	Macpaul Lin <macpaul.lin@mediatek.com>,
	Lukasz Majewski <lukma@denx.de>,
	Julien Stephan <jstephan@baylibre.com>,
	u-boot@lists.denx.de
Subject: Re: [PATCH v3 1/6] clk: mediatek: mt8189: add some VLP clocks
Date: Mon, 23 Mar 2026 15:59:09 -0500	[thread overview]
Message-ID: <8ffb6e52-d161-49fd-b815-2eff4e864bd4@baylibre.com> (raw)
In-Reply-To: <20260323203333.GN502704@bill-the-cat>

On 3/23/26 3:33 PM, Tom Rini wrote:
> On Mon, Mar 23, 2026 at 02:23:58PM -0600, Tom Rini wrote:
>> On Mon, Mar 23, 2026 at 03:16:52PM -0500, David Lechner wrote:
>>
>>> Add some VLP clocks needed by the PMIC on MT8189 and similar SoCs.
>>>
>>> Signed-off-by: David Lechner <dlechner@baylibre.com>
>>> ---
>>>  drivers/clk/mediatek/clk-mt8189.c | 289 ++++++++++++++++++++++++++++++++++++++
>>>  1 file changed, 289 insertions(+)
>>
>> I'm working on a series now to fix this globally, and it's not a
>> MediaTek only problem, but:
>>
>>> @@ -1733,6 +2012,16 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
>>>  	.flags = DM_FLAG_PRE_RELOC,
>>>  };
>>>  
>>> +U_BOOT_DRIVER(mtk_clk_vlpckgen) = {
>>
>> This is a bad name to use. I bet in other parts of the series you re-use
>> it. These names need to be unique within a binary, and while today they
>> will be I bet (since all the other examples are fine), someday we'd like
>> to be able to compile test (and so static analyize) more code, and it
>> will clash and fail to link. A better one would be
>> "mt8189_clk_vlpckgen".
> 
> Ugh, and I just hit the build problem where I see these re-used names
> are important. So, thinking about things harder now.
> 

I assume you are referring to the use in mtk_find_parent_rate() and
a few of the mtk_common_clk_*_init() functions.

FYI, I would like to get away from that usage eventually. It seems
pretty fragile. And now you've give another reason to motivate that
change as well. I have so many other MediaTek clock refactor patches
that I'm juggling right now, it will take a while to get around to it
though.

As it happens, mtk_clk_vlpckgen is actually globally unique, so I will
just keep it to be consistent for now and work towards unique naming
for all of the MediaTek clocks later.

  reply	other threads:[~2026-03-23 20:59 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-23 20:16 [PATCH v3 0/6] boards: mediatek: initial support for Genio 720 EVK David Lechner
2026-03-23 20:16 ` [PATCH v3 1/6] clk: mediatek: mt8189: add some VLP clocks David Lechner
2026-03-23 20:23   ` Tom Rini
2026-03-23 20:33     ` Tom Rini
2026-03-23 20:59       ` David Lechner [this message]
2026-03-23 21:13         ` Tom Rini
2026-03-23 20:16 ` [PATCH v3 2/6] arm: mediatek: add support of MT8189 SoC family David Lechner
2026-03-23 20:16 ` [PATCH v3 3/6] arm: dts: mediatek: mt8189: Add pinmux macro header file David Lechner
2026-03-23 20:16 ` [PATCH v3 4/6] arm: dts: mediatek: Add MediaTek MT8189 dtsi file David Lechner
2026-03-23 20:16 ` [PATCH v3 5/6] arm: dts: mediatek: Add MediaTek Genio 520/720 EVK DTS David Lechner
2026-03-23 20:16 ` [PATCH v3 6/6] board: mediatek: Add Genio 520/720 EVK defconfigs David Lechner
2026-03-30 15:21   ` Julien Stephan
2026-03-30 15:56     ` David Lechner
2026-04-07 13:32     ` Macpaul Lin (林智斌)
2026-04-07 16:01 ` [PATCH v3 0/6] boards: mediatek: initial support for Genio 720 EVK David Lechner

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