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From: Wadim Egorov <w.egorov@phytec.de>
To: Santhosh Kumar K <s-k6@ti.com>, <trini@konsulko.com>,
	<m-chawdhry@ti.com>,  <nm@ti.com>, <u-kumar1@ti.com>,
	<vigneshr@ti.com>, <bb@ti.com>
Cc: <u-boot@lists.denx.de>, <n-francis@ti.com>
Subject: Re: [PATCH v4 7/8] board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled
Date: Tue, 22 Oct 2024 12:04:33 +0200	[thread overview]
Message-ID: <94cc6dcf-fe92-414f-b5f6-5797c8fa64ff@phytec.de> (raw)
In-Reply-To: <20241021044024.835846-8-s-k6@ti.com>

Hi Santhosh,

Am 21.10.24 um 06:40 schrieb Santhosh Kumar K:
> As there are few redundant functions in board/ti/*/evm.c files, pull
> them to a common location of access to reuse and include the common file
> to access the functions.
> 
> Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
> device tree and resize the available amount of DDR, if ECC is enabled.
> Otherwise, fixup the device tree using the regular
> fdt_fixup_memory_banks().
> 
> Also call dram_init_banksize() after every call to
> fixup_ddr_driver_for_ecc() is made so that gd->bd is populated
> correctly.
> 
> Ensure that fixup_ddr_driver_for_ecc() is agnostic to the number of DDR
> controllers present.
> 
> Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
<snip>

> +obj-y += common.o security.o k3-ddr.o
>   obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
>   obj-$(CONFIG_SOC_K3_AM62P5) += am62px/
>   obj-$(CONFIG_SOC_K3_AM625) += am62x/
> diff --git a/arch/arm/mach-k3/include/mach/k3-ddr.h b/arch/arm/mach-k3/include/mach/k3-ddr.h
> new file mode 100644
> index 000000000000..754e9ba29dac
> --- /dev/null
<snip>

> +#include <fdt_support.h>
> +#include <dm/uclass.h>
> +#include <k3-ddrss.h>
> +#include <spl.h>
> +
> +#include <asm/arch/k3-ddr.h>
> +
> +int dram_init(void)
> +{
> +        s32 ret;
> +
> +        ret = fdtdec_setup_mem_size_base_lowest();
> +        if (ret)
> +                printf("Error setting up mem size and base. %d\n", ret);
> +
> +        return ret;
> +}
> +
> +int dram_init_banksize(void)
> +{
> +        s32 ret;
> +
> +        ret = fdtdec_setup_memory_banksize();
> +        if (ret)
> +                printf("Error setting up memory banksize. %d\n", ret);
> +
> +        return ret;
> +}
> +Moving dram_init() and dram_init_banksize() into a generic part forces 
every K3 based board to use your implementation.

This also breaks the builds for phycore_am62x, phycore_am64x and also 
the verdin-am62,

   phycore-am62x.c:49: multiple definition of `dram_init'
   phycore-am62x.c:97: multiple definition of `dram_init_banksize

Regards,
Wadim

  reply	other threads:[~2024-10-22 10:04 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-21  4:40 [PATCH v4 0/8] Inline ECC Series Santhosh Kumar K
2024-10-21  4:40 ` [PATCH v4 1/8] ram: k3-ddrss: Use the DDR controller BIST engine for ECC priming Santhosh Kumar K
2024-10-21  4:40 ` [PATCH v4 2/8] ram: k3-ddrss: Add k3_ddrss_ddr_bank_base_size_calc() to solve 'calculations restricted to 32 bits' issue Santhosh Kumar K
2024-10-23  4:44   ` Manorit Chawdhry
2024-12-12 14:38     ` Santhosh Kumar K
2024-10-23 14:39   ` Bryan Brattlof
2024-10-24  4:01     ` Neha Malcom Francis
2024-10-24 16:19       ` Bryan Brattlof
2024-12-06 12:53         ` Wadim Egorov
2024-12-06 17:40           ` Bryan Brattlof
2024-12-12 14:39     ` Santhosh Kumar K
2024-10-21  4:40 ` [PATCH v4 3/8] ram: k3-ddrss: Setup ECC region start and range Santhosh Kumar K
2024-10-21  4:40 ` [PATCH v4 4/8] ram: k3-ddrss: Enable ECC interrupts Santhosh Kumar K
2024-10-21  4:40 ` [PATCH v4 5/8] drivers: ram: Kconfig: Add CONFIG_K3_INLINE_ECC Santhosh Kumar K
2024-10-23 14:45   ` Bryan Brattlof
2024-10-24  4:03     ` Neha Malcom Francis
2024-12-12 14:39       ` Santhosh Kumar K
2024-10-21  4:40 ` [PATCH v4 6/8] configs: j7*_evm_r5_defconfig: Set NR_DRAM_BANKS to 2 Santhosh Kumar K
2024-10-23 14:48   ` Bryan Brattlof
2024-12-12 14:40     ` Santhosh Kumar K
2024-10-21  4:40 ` [PATCH v4 7/8] board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled Santhosh Kumar K
2024-10-22 10:04   ` Wadim Egorov [this message]
2024-12-12 14:40     ` Santhosh Kumar K
2024-10-21  4:40 ` [PATCH v4 8/8] arm: dts: k3-*-ddr: Add ss_cfg reg entry Santhosh Kumar K
2024-10-22  9:22   ` Neha Malcom Francis
2024-12-12 14:40     ` Santhosh Kumar K
2024-12-12 14:38 ` [PATCH v4 0/8] Inline ECC Series Santhosh Kumar K

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