* [PATCH] wdt: designware: fix timeout calculation due to expecting KHz
@ 2020-09-17 9:30 Jack Mitchell
2020-09-17 10:24 ` Sean Anderson
2020-10-09 13:02 ` Tom Rini
0 siblings, 2 replies; 3+ messages in thread
From: Jack Mitchell @ 2020-09-17 9:30 UTC (permalink / raw)
To: u-boot
The timeout calculation is based on the clk being in KHz but
the clk api returns the clk value in Hz. Convert this to KHz
to calculate the correct timeout value.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
---
drivers/watchdog/designware_wdt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c
index 12f09a7a39..7caa6c550c 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -130,7 +130,7 @@ static int designware_wdt_probe(struct udevice *dev)
if (ret)
return ret;
- priv->clk_khz = clk_get_rate(&clk);
+ priv->clk_khz = clk_get_rate(&clk) / 1000;
if (!priv->clk_khz)
return -EINVAL;
#else
--
2.28.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH] wdt: designware: fix timeout calculation due to expecting KHz
2020-09-17 9:30 [PATCH] wdt: designware: fix timeout calculation due to expecting KHz Jack Mitchell
@ 2020-09-17 10:24 ` Sean Anderson
2020-10-09 13:02 ` Tom Rini
1 sibling, 0 replies; 3+ messages in thread
From: Sean Anderson @ 2020-09-17 10:24 UTC (permalink / raw)
To: u-boot
On 9/17/20 5:30 AM, Jack Mitchell wrote:
> The timeout calculation is based on the clk being in KHz but
> the clk api returns the clk value in Hz. Convert this to KHz
> to calculate the correct timeout value.
>
> Signed-off-by: Jack Mitchell <ml@embed.me.uk>
> ---
> drivers/watchdog/designware_wdt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c
> index 12f09a7a39..7caa6c550c 100644
> --- a/drivers/watchdog/designware_wdt.c
> +++ b/drivers/watchdog/designware_wdt.c
> @@ -130,7 +130,7 @@ static int designware_wdt_probe(struct udevice *dev)
> if (ret)
> return ret;
>
> - priv->clk_khz = clk_get_rate(&clk);
> + priv->clk_khz = clk_get_rate(&clk) / 1000;
> if (!priv->clk_khz)
> return -EINVAL;
> #else
>
Hi,
Thanks for submitting this. I believe it is a duplicate of [1].
--Sean
[1] https://patchwork.ozlabs.org/project/uboot/patch/20200909210420.243190-4-seanga2 at gmail.com/
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH] wdt: designware: fix timeout calculation due to expecting KHz
2020-09-17 9:30 [PATCH] wdt: designware: fix timeout calculation due to expecting KHz Jack Mitchell
2020-09-17 10:24 ` Sean Anderson
@ 2020-10-09 13:02 ` Tom Rini
1 sibling, 0 replies; 3+ messages in thread
From: Tom Rini @ 2020-10-09 13:02 UTC (permalink / raw)
To: u-boot
On Thu, Sep 17, 2020 at 10:30:40AM +0100, Jack Mitchell wrote:
> The timeout calculation is based on the clk being in KHz but
> the clk api returns the clk value in Hz. Convert this to KHz
> to calculate the correct timeout value.
>
> Signed-off-by: Jack Mitchell <ml@embed.me.uk>
Applied to u-boot/master, thanks!
--
Tom
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