* [PATCH v3 1/7] clk: sophgo: cv1800b: Add SoC-specific compatible strings
2026-08-06 12:13 [PATCH v3 0/7] riscv: sophgo: Use upstream devicetrees for CV18xx boards Zhuxu Ran via U-Boot
@ 2026-08-06 12:13 ` Zhuxu Ran via U-Boot
2026-08-06 12:13 ` [PATCH v3 2/7] mmc: cv1800b: Add SG2002 compatible string Zhuxu Ran via U-Boot
` (5 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Zhuxu Ran via U-Boot @ 2026-08-06 12:13 UTC (permalink / raw)
To: u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Zhuxu Ran, Peng Fan, Jaehoon Chung,
Stefan Roese, Hiago De Franco, Thomas Bonnefille, Kongyang Liu,
Tim Ouyang, Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
The upstream CV1800B and SG2002 devicetrees use
"sophgo,cv1800b-clk" and "sophgo,sg2002-clk" respectively.
Add both compatible strings to the existing CV1800B clock driver.
Signed-off-by: Zhuxu Ran <zhuxu_ran@zohomail.com>
---
drivers/clk/sophgo/clk-cv1800b.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/sophgo/clk-cv1800b.c b/drivers/clk/sophgo/clk-cv1800b.c
index 248a69321fc..57051c1ec0a 100644
--- a/drivers/clk/sophgo/clk-cv1800b.c
+++ b/drivers/clk/sophgo/clk-cv1800b.c
@@ -744,6 +744,8 @@ const struct clk_ops cv1800b_clk_ops = {
static const struct udevice_id cv1800b_clk_of_match[] = {
{ .compatible = "sophgo,cv1800-clk" },
+ { .compatible = "sophgo,cv1800b-clk" },
+ { .compatible = "sophgo,sg2002-clk" },
{ },
};
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 2/7] mmc: cv1800b: Add SG2002 compatible string
2026-08-06 12:13 [PATCH v3 0/7] riscv: sophgo: Use upstream devicetrees for CV18xx boards Zhuxu Ran via U-Boot
2026-08-06 12:13 ` [PATCH v3 1/7] clk: sophgo: cv1800b: Add SoC-specific compatible strings Zhuxu Ran via U-Boot
@ 2026-08-06 12:13 ` Zhuxu Ran via U-Boot
2026-08-06 12:13 ` [PATCH v3 3/7] riscv: licheerv_nano: Enable hardware system reset Zhuxu Ran via U-Boot
` (4 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Zhuxu Ran via U-Boot @ 2026-08-06 12:13 UTC (permalink / raw)
To: u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Zhuxu Ran, Peng Fan, Jaehoon Chung,
Stefan Roese, Hiago De Franco, Thomas Bonnefille, Kongyang Liu,
Tim Ouyang, Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
The upstream SG2002 devicetree uses "sophgo,sg2002-dwcmshc"
for the SDHCI controller.
Add the compatible string to the existing CV1800B SDHCI driver.
Signed-off-by: Zhuxu Ran <zhuxu_ran@zohomail.com>
---
drivers/mmc/cv1800b_sdhci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/cv1800b_sdhci.c b/drivers/mmc/cv1800b_sdhci.c
index b756649f90f..f8d94232170 100644
--- a/drivers/mmc/cv1800b_sdhci.c
+++ b/drivers/mmc/cv1800b_sdhci.c
@@ -110,6 +110,7 @@ static int cv1800b_sdhci_probe(struct udevice *dev)
static const struct udevice_id cv1800b_sdhci_match[] = {
{ .compatible = "sophgo,cv1800b-dwcmshc" },
+ { .compatible = "sophgo,sg2002-dwcmshc" },
{ }
};
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 3/7] riscv: licheerv_nano: Enable hardware system reset
2026-08-06 12:13 [PATCH v3 0/7] riscv: sophgo: Use upstream devicetrees for CV18xx boards Zhuxu Ran via U-Boot
2026-08-06 12:13 ` [PATCH v3 1/7] clk: sophgo: cv1800b: Add SoC-specific compatible strings Zhuxu Ran via U-Boot
2026-08-06 12:13 ` [PATCH v3 2/7] mmc: cv1800b: Add SG2002 compatible string Zhuxu Ran via U-Boot
@ 2026-08-06 12:13 ` Zhuxu Ran via U-Boot
2026-08-06 14:19 ` Junhui Liu
2026-08-06 12:13 ` [PATCH v3 4/7] riscv: milkv_duo: Use upstream devicetree Zhuxu Ran via U-Boot
` (3 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Zhuxu Ran via U-Boot @ 2026-08-06 12:13 UTC (permalink / raw)
To: u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Zhuxu Ran, Peng Fan, Jaehoon Chung,
Stefan Roese, Hiago De Franco, Thomas Bonnefille, Kongyang Liu,
Tim Ouyang, Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
The LicheeRV Nano configuration disables board_init(), so the existing
CV1800B sysreset driver is never bound. This is an existing board issue
exposed while validating the upstream SG2002 devicetree conversion.
SG2002 uses the same RTC system reset registers as CV1800B. Enable
board-specific initialization and bind the driver in board_init(),
following the approach used by Milk-V Duo.
Signed-off-by: Zhuxu Ran <zhuxu_ran@zohomail.com>
---
board/sophgo/licheerv_nano/board.c | 9 +++++++++
configs/sipeed_licheerv_nano_defconfig | 1 -
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/board/sophgo/licheerv_nano/board.c b/board/sophgo/licheerv_nano/board.c
index e6099d35dbf..c0685c44662 100644
--- a/board/sophgo/licheerv_nano/board.c
+++ b/board/sophgo/licheerv_nano/board.c
@@ -3,3 +3,12 @@
* Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
*/
+#include <dm/lists.h>
+
+int board_init(void)
+{
+ if (IS_ENABLED(CONFIG_SYSRESET_CV1800B))
+ device_bind_driver(gd->dm_root, "cv1800b_sysreset", "sysreset", NULL);
+
+ return 0;
+}
diff --git a/configs/sipeed_licheerv_nano_defconfig b/configs/sipeed_licheerv_nano_defconfig
index 9aa3ede10c5..ab29f327d7a 100644
--- a/configs/sipeed_licheerv_nano_defconfig
+++ b/configs/sipeed_licheerv_nano_defconfig
@@ -17,7 +17,6 @@ CONFIG_SD_BOOT=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_SYS_CBSIZE=512
CONFIG_SYS_PBSIZE=544
-# CONFIG_BOARD_INIT is not set
CONFIG_SYS_PROMPT="licheerv_nano# "
# CONFIG_CMD_BOOTDEV is not set
CONFIG_CMD_MBR=y
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v3 3/7] riscv: licheerv_nano: Enable hardware system reset
2026-08-06 12:13 ` [PATCH v3 3/7] riscv: licheerv_nano: Enable hardware system reset Zhuxu Ran via U-Boot
@ 2026-08-06 14:19 ` Junhui Liu
0 siblings, 0 replies; 12+ messages in thread
From: Junhui Liu @ 2026-08-06 14:19 UTC (permalink / raw)
To: Zhuxu Ran, u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Peng Fan, Jaehoon Chung, Stefan Roese,
Hiago De Franco, Thomas Bonnefille, Kongyang Liu, Tim Ouyang,
Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
Hi Zhuxu,
On Thu Aug 6, 2026 at 8:13 PM CST, Zhuxu Ran wrote:
> The LicheeRV Nano configuration disables board_init(), so the existing
> CV1800B sysreset driver is never bound. This is an existing board issue
> exposed while validating the upstream SG2002 devicetree conversion.
>
> SG2002 uses the same RTC system reset registers as CV1800B. Enable
> board-specific initialization and bind the driver in board_init(),
> following the approach used by Milk-V Duo.
>
> Signed-off-by: Zhuxu Ran <zhuxu_ran@zohomail.com>
> ---
> board/sophgo/licheerv_nano/board.c | 9 +++++++++
> configs/sipeed_licheerv_nano_defconfig | 1 -
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/board/sophgo/licheerv_nano/board.c b/board/sophgo/licheerv_nano/board.c
> index e6099d35dbf..c0685c44662 100644
> --- a/board/sophgo/licheerv_nano/board.c
> +++ b/board/sophgo/licheerv_nano/board.c
> @@ -3,3 +3,12 @@
> * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
> */
>
> +#include <dm/lists.h>
> +
> +int board_init(void)
> +{
> + if (IS_ENABLED(CONFIG_SYSRESET_CV1800B))
> + device_bind_driver(gd->dm_root, "cv1800b_sysreset", "sysreset", NULL);
> +
> + return 0;
> +}
This looks the same as what Milk-V Duo already does. Since this is an
SoC-level driver that doesn’t change across different boards, could you
please look into extracting it into common code instead?
Also see:
https://lists.u-boot-project.org/pipermail/u-boot/2026-July/625352.html
> diff --git a/configs/sipeed_licheerv_nano_defconfig b/configs/sipeed_licheerv_nano_defconfig
> index 9aa3ede10c5..ab29f327d7a 100644
> --- a/configs/sipeed_licheerv_nano_defconfig
> +++ b/configs/sipeed_licheerv_nano_defconfig
> @@ -17,7 +17,6 @@ CONFIG_SD_BOOT=y
> CONFIG_BOOTCOMMAND="run distro_bootcmd"
> CONFIG_SYS_CBSIZE=512
> CONFIG_SYS_PBSIZE=544
> -# CONFIG_BOARD_INIT is not set
> CONFIG_SYS_PROMPT="licheerv_nano# "
> # CONFIG_CMD_BOOTDEV is not set
> CONFIG_CMD_MBR=y
--
Best regards,
Junhui Liu
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 4/7] riscv: milkv_duo: Use upstream devicetree
2026-08-06 12:13 [PATCH v3 0/7] riscv: sophgo: Use upstream devicetrees for CV18xx boards Zhuxu Ran via U-Boot
` (2 preceding siblings ...)
2026-08-06 12:13 ` [PATCH v3 3/7] riscv: licheerv_nano: Enable hardware system reset Zhuxu Ran via U-Boot
@ 2026-08-06 12:13 ` Zhuxu Ran via U-Boot
2026-08-06 12:45 ` Zhuxu Ran via U-Boot
` (2 more replies)
2026-08-06 12:13 ` [PATCH v3 5/7] riscv: licheerv_nano: " Zhuxu Ran via U-Boot
` (2 subsequent siblings)
6 siblings, 3 replies; 12+ messages in thread
From: Zhuxu Ran via U-Boot @ 2026-08-06 12:13 UTC (permalink / raw)
To: u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Zhuxu Ran, Peng Fan, Jaehoon Chung,
Stefan Roese, Hiago De Franco, Thomas Bonnefille, Kongyang Liu,
Tim Ouyang, Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
Switch Milk-V Duo to the upstream CV1800B devicetree by enabling
CONFIG_OF_UPSTREAM and selecting sophgo/cv1800b-milkv-duo.
The upstream devicetree keeps the Ethernet MAC disabled and does not
describe the CV1800B SPIF controller. Add U-Boot overrides to preserve
the existing networking and SPI NOR support.
Signed-off-by: Zhuxu Ran <zhuxu_ran@zohomail.com>
---
arch/riscv/dts/cv1800b-milkv-duo-u-boot.dtsi | 36 ++++++++++++++++++++++++++++
board/sophgo/milkv_duo/MAINTAINERS | 1 +
configs/milkv_duo_defconfig | 3 ++-
3 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/dts/cv1800b-milkv-duo-u-boot.dtsi b/arch/riscv/dts/cv1800b-milkv-duo-u-boot.dtsi
new file mode 100644
index 00000000000..e34d105ba4a
--- /dev/null
+++ b/arch/riscv/dts/cv1800b-milkv-duo-u-boot.dtsi
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
+ * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
+ * Copyright (C) 2026 Zhuxu Ran <zhuxu_ran@zohomail.com>
+ */
+
+/*
+ * The upstream Linux device tree describes the CV1800B Ethernet MAC, but
+ * keeps it disabled. Enable it here to preserve the existing U-Boot
+ * networking support when using the upstream device tree.
+ */
+&gmac0 {
+ status = "okay";
+};
+
+&{/soc} {
+ spif: spi@10000000 {
+ compatible = "sophgo,cv1800b-spif";
+ reg = <0x10000000 0x10000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk CLK_AHB_SF>;
+ interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <75000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ m25p,fast-read;
+ };
+ };
+};
diff --git a/board/sophgo/milkv_duo/MAINTAINERS b/board/sophgo/milkv_duo/MAINTAINERS
index 651a0592f7a..a6ff5585240 100644
--- a/board/sophgo/milkv_duo/MAINTAINERS
+++ b/board/sophgo/milkv_duo/MAINTAINERS
@@ -4,3 +4,4 @@ S: Maintained
F: board/sophgo/milkv_duo/
F: configs/milkv_duo_defconfig
F: doc/board/sophgo/milkv_duo.rst
+F: arch/riscv/dts/cv1800b-milkv-duo-u-boot.dtsi
diff --git a/configs/milkv_duo_defconfig b/configs/milkv_duo_defconfig
index f1f3930564b..9d6b80362d5 100644
--- a/configs/milkv_duo_defconfig
+++ b/configs/milkv_duo_defconfig
@@ -4,7 +4,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82300000
-CONFIG_DEFAULT_DEVICE_TREE="cv1800b-milkv-duo"
+CONFIG_DEFAULT_DEVICE_TREE="sophgo/cv1800b-milkv-duo"
+CONFIG_OF_UPSTREAM=y
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_IDENT_STRING="milkv_duo"
CONFIG_TARGET_MILKV_DUO=y
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v3 4/7] riscv: milkv_duo: Use upstream devicetree
2026-08-06 12:13 ` [PATCH v3 4/7] riscv: milkv_duo: Use upstream devicetree Zhuxu Ran via U-Boot
@ 2026-08-06 12:45 ` Zhuxu Ran via U-Boot
2026-08-06 14:22 ` Junhui Liu
2026-08-27 17:35 ` Andrei Lalaev
2 siblings, 0 replies; 12+ messages in thread
From: Zhuxu Ran via U-Boot @ 2026-08-06 12:45 UTC (permalink / raw)
To: Zhuxu Ran, u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Peng Fan, Jaehoon Chung, Stefan Roese,
Hiago De Franco, Thomas Bonnefille, Kongyang Liu, Tim Ouyang,
Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
Apologies for the oversight. The following tag from v1 was
inadvertently omitted after addressing the SPIF concern:
Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
--
Best regards,
Zhuxu Ran
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 4/7] riscv: milkv_duo: Use upstream devicetree
2026-08-06 12:13 ` [PATCH v3 4/7] riscv: milkv_duo: Use upstream devicetree Zhuxu Ran via U-Boot
2026-08-06 12:45 ` Zhuxu Ran via U-Boot
@ 2026-08-06 14:22 ` Junhui Liu
2026-08-27 17:35 ` Andrei Lalaev
2 siblings, 0 replies; 12+ messages in thread
From: Junhui Liu @ 2026-08-06 14:22 UTC (permalink / raw)
To: Zhuxu Ran, u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Peng Fan, Jaehoon Chung, Stefan Roese,
Hiago De Franco, Thomas Bonnefille, Kongyang Liu, Tim Ouyang,
Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
Hi Zhuxu,
On Thu Aug 6, 2026 at 8:13 PM CST, Zhuxu Ran wrote:
> Switch Milk-V Duo to the upstream CV1800B devicetree by enabling
> CONFIG_OF_UPSTREAM and selecting sophgo/cv1800b-milkv-duo.
>
> The upstream devicetree keeps the Ethernet MAC disabled and does not
> describe the CV1800B SPIF controller. Add U-Boot overrides to preserve
> the existing networking and SPI NOR support.
>
> Signed-off-by: Zhuxu Ran <zhuxu_ran@zohomail.com>
> ---
> arch/riscv/dts/cv1800b-milkv-duo-u-boot.dtsi | 36 ++++++++++++++++++++++++++++
> board/sophgo/milkv_duo/MAINTAINERS | 1 +
> configs/milkv_duo_defconfig | 3 ++-
> 3 files changed, 39 insertions(+), 1 deletion(-)
>
[...]
> diff --git a/board/sophgo/milkv_duo/MAINTAINERS b/board/sophgo/milkv_duo/MAINTAINERS
> index 651a0592f7a..a6ff5585240 100644
> --- a/board/sophgo/milkv_duo/MAINTAINERS
> +++ b/board/sophgo/milkv_duo/MAINTAINERS
> @@ -4,3 +4,4 @@ S: Maintained
> F: board/sophgo/milkv_duo/
> F: configs/milkv_duo_defconfig
> F: doc/board/sophgo/milkv_duo.rst
> +F: arch/riscv/dts/cv1800b-milkv-duo-u-boot.dtsi
How about sorting these alphabetically?
> diff --git a/configs/milkv_duo_defconfig b/configs/milkv_duo_defconfig
> index f1f3930564b..9d6b80362d5 100644
> --- a/configs/milkv_duo_defconfig
> +++ b/configs/milkv_duo_defconfig
> @@ -4,7 +4,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000
> CONFIG_NR_DRAM_BANKS=1
> CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82300000
> -CONFIG_DEFAULT_DEVICE_TREE="cv1800b-milkv-duo"
> +CONFIG_DEFAULT_DEVICE_TREE="sophgo/cv1800b-milkv-duo"
> +CONFIG_OF_UPSTREAM=y
> CONFIG_SYS_LOAD_ADDR=0x80080000
> CONFIG_IDENT_STRING="milkv_duo"
> CONFIG_TARGET_MILKV_DUO=y
--
Best regards,
Junhui Liu
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 4/7] riscv: milkv_duo: Use upstream devicetree
2026-08-06 12:13 ` [PATCH v3 4/7] riscv: milkv_duo: Use upstream devicetree Zhuxu Ran via U-Boot
2026-08-06 12:45 ` Zhuxu Ran via U-Boot
2026-08-06 14:22 ` Junhui Liu
@ 2026-08-27 17:35 ` Andrei Lalaev
2 siblings, 0 replies; 12+ messages in thread
From: Andrei Lalaev @ 2026-08-27 17:35 UTC (permalink / raw)
To: u-boot
Cc: guodong, hfranco, jh80.chung, junhui.liu, leo.liang, lukma, me,
peng.fan, schwab, seashell11234455, stefan.roese,
thomas.bonnefille, tim609, trini, zhuxu_ran, andrey.lalaev
Hi Zhuxu,
Thank you for your patches.
I am playing with Duo and Duo-256M and faced an interesting thing
regarding reserved-memory on these boards.
It looks like your patchset may cause a memory corruption
of U-Boot or coprocessor FW for Milk-V Duo.
DTS in U-Boot limits RAM to 63.25 MB:
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x3f40000>;
};
Because the last 0.75 MB (0xc0000) is reserved for coprocessor.
Kernel uses different approach by declaring all RAM and
relying on `reserved-memory` for coprocessor.
However, this doesn't work for U-Boot because it places its stack
and heap near the top of RAM, therefore region in the top of RAM
is not reserved. So coprocessor FW or U-Boot may be corrupted.
With your patches it also gives an ERROR during reserving (because the region
is already used by U-Boot itself):
U-Boot 2026.10-rc3-00007-g8e48ce755361 (Aug 27 2026 - 18:53:59 +0200)milkv_duo
DRAM: 64 MiB
ERROR: reserving fdt memory region failed (addr=83f40000 size=c0000 flags=2): -17
Core: 23 devices, 15 uclasses, devicetree: separate
MMC: mmc@4310000: 0
Loading Environment from nowhere... OK
In: serial@4140000
Out: serial@4140000
Err: serial@4140000
Net:
Warning: ethernet@4070000 (eth0) using random MAC address - 0a:06:39:79:c7:ed
eth0: ethernet@4070000
milkv_duo# bdinfo
boot_params = 0x0000000000000000
DRAM bank = 0x0000000000000000
-> start = 0x0000000080000000
-> size = 0x0000000004000000
...
relocaddr = 0x0000000083f73000
reloc off = 0x0000000003d73000
...
fdt_blob = 0x000000008372ec60
lmb_dump_all:
memory.count = 0x1
memory[0] [0x80000000-0x83ffffff], 0x4000000 bytes, flags: none
reserved.count = 0x3
reserved[0] [0x80000000-0x8005ffff], 0x60000 bytes, flags: no-map
reserved[1] [0x8272b000-0x8272dfff], 0x3000 bytes, flags: no-notify, no-overwrite
reserved[2] [0x8272ec50-0x83ffffff], 0x18d13b0 bytes, flags: no-overwrite
devicetree = separate
...
stack ptr = 0x000000008372e980
ram_top ptr = 0x0000000084000000
malloc base = 0x0000000083733000
boot hart = 0x0000000000000000
firmware fdt= 0x0000000080080000
milkv_duo# meminfo
DRAM: 64 MiB
Region Base Size End Gap
--------------------------------------------------------------------
code 83f73000 8cc30 83fffc30
malloc 83733000 840000 83f73000 0
board_info 83732fb0 50 83733000 0
global_data 83732e40 168 83732fa8 8
devicetree 8372ec60 41da 83732e3a 6
stack 8272ec50 1000000 8372ec50 10
lmb 8272ec50 0 8272ec50 0
lmb 8272b000 3c50 8272ec50 0
lmb 80000000 272b000 8272b000 0
free 80000000 0 80000000 0
Main branch with the original U-Boot DTS:
U-Boot 2026.10-rc3-00001-g7cbe3e32b6b4 (Aug 27 2026 - 18:30:42 +0200)milkv_duo
DRAM: 63.3 MiB
Core: 22 devices, 15 uclasses, devicetree: separate
MMC: mmc@4310000: 0
Loading Environment from nowhere... OK
In: serial@4140000
Out: serial@4140000
Err: serial@4140000
Net:
Warning: ethernet@4070000 (eth0) using random MAC address - 82:8a:04:d3:35:d0
eth0: ethernet@4070000
milkv_duo# bdinfo
boot_params = 0x0000000000000000
DRAM bank = 0x0000000000000000
-> start = 0x0000000080000000
-> size = 0x0000000003f40000
...
relocaddr = 0x0000000083eb3000
reloc off = 0x0000000003cb3000
...
fdt_blob = 0x00000000836705e0
lmb_dump_all:
memory.count = 0x1
memory[0] [0x80000000-0x83f3ffff], 0x3f40000 bytes, flags: none
reserved.count = 0x3
reserved[0] [0x80000000-0x8005ffff], 0x60000 bytes, flags: no-map
reserved[1] [0x8266d000-0x8266ffff], 0x3000 bytes, flags: no-notify, no-overwrite
reserved[2] [0x826705d0-0x83f3ffff], 0x18cfa30 bytes, flags: no-overwrite
devicetree = separate
...
stack ptr = 0x0000000083670300
ram_top ptr = 0x0000000083f40000
malloc base = 0x0000000083673000
boot hart = 0x0000000000000000
firmware fdt= 0x0000000080080000
I'm not sure of a better solution here other than limiting the RAM node
to exclude the coprocessor region.
Best regards,
Andrei Lalaev
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 5/7] riscv: licheerv_nano: Use upstream devicetree
2026-08-06 12:13 [PATCH v3 0/7] riscv: sophgo: Use upstream devicetrees for CV18xx boards Zhuxu Ran via U-Boot
` (3 preceding siblings ...)
2026-08-06 12:13 ` [PATCH v3 4/7] riscv: milkv_duo: Use upstream devicetree Zhuxu Ran via U-Boot
@ 2026-08-06 12:13 ` Zhuxu Ran via U-Boot
2026-08-06 12:13 ` [PATCH v3 6/7] riscv: dts: sophgo: Drop local CV18xx devicetrees Zhuxu Ran via U-Boot
2026-08-06 12:13 ` [PATCH v3 7/7] clk: sophgo: cv1800b: Drop legacy compatible string Zhuxu Ran via U-Boot
6 siblings, 0 replies; 12+ messages in thread
From: Zhuxu Ran via U-Boot @ 2026-08-06 12:13 UTC (permalink / raw)
To: u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Zhuxu Ran, Peng Fan, Jaehoon Chung,
Stefan Roese, Hiago De Franco, Thomas Bonnefille, Kongyang Liu,
Tim Ouyang, Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
Switch LicheeRV Nano to the upstream SG2002 devicetree by enabling
CONFIG_OF_UPSTREAM and selecting sophgo/sg2002-licheerv-nano-b.
The SG2002 clock and MMC compatible strings used by the upstream
devicetree are now supported by the existing U-Boot drivers.
Signed-off-by: Zhuxu Ran <zhuxu_ran@zohomail.com>
---
configs/sipeed_licheerv_nano_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/configs/sipeed_licheerv_nano_defconfig b/configs/sipeed_licheerv_nano_defconfig
index ab29f327d7a..6754f3c0f7c 100644
--- a/configs/sipeed_licheerv_nano_defconfig
+++ b/configs/sipeed_licheerv_nano_defconfig
@@ -4,7 +4,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82300000
-CONFIG_DEFAULT_DEVICE_TREE="sg2002-licheerv-nano-b"
+CONFIG_DEFAULT_DEVICE_TREE="sophgo/sg2002-licheerv-nano-b"
+CONFIG_OF_UPSTREAM=y
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_IDENT_STRING="licheerv_nano"
CONFIG_TARGET_LICHEERV_NANO=y
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 6/7] riscv: dts: sophgo: Drop local CV18xx devicetrees
2026-08-06 12:13 [PATCH v3 0/7] riscv: sophgo: Use upstream devicetrees for CV18xx boards Zhuxu Ran via U-Boot
` (4 preceding siblings ...)
2026-08-06 12:13 ` [PATCH v3 5/7] riscv: licheerv_nano: " Zhuxu Ran via U-Boot
@ 2026-08-06 12:13 ` Zhuxu Ran via U-Boot
2026-08-06 12:13 ` [PATCH v3 7/7] clk: sophgo: cv1800b: Drop legacy compatible string Zhuxu Ran via U-Boot
6 siblings, 0 replies; 12+ messages in thread
From: Zhuxu Ran via U-Boot @ 2026-08-06 12:13 UTC (permalink / raw)
To: u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Zhuxu Ran, Peng Fan, Jaehoon Chung,
Stefan Roese, Hiago De Franco, Thomas Bonnefille, Kongyang Liu,
Tim Ouyang, Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
Milk-V Duo and LicheeRV Nano now use the upstream CV1800B and SG2002
devicetrees.
Remove the unused local devicetree files and their Makefile entries.
Signed-off-by: Zhuxu Ran <zhuxu_ran@zohomail.com>
---
arch/riscv/dts/Makefile | 2 -
arch/riscv/dts/cv1800b-milkv-duo.dts | 64 ---------
arch/riscv/dts/cv1800b.dtsi | 22 ---
arch/riscv/dts/cv18xx.dtsi | 232 ------------------------------
arch/riscv/dts/sg2002-licheerv-nano-b.dts | 45 ------
arch/riscv/dts/sg2002.dtsi | 34 -----
6 files changed, 399 deletions(-)
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 71c5c13d221..c588ce546bf 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -4,8 +4,6 @@ dtb-$(CONFIG_TARGET_ANDES_AE350) += ae350_32.dtb ae350_64.dtb
dtb-$(CONFIG_TARGET_ANDES_VOYAGER) += qilai-voyager.dtb
dtb-$(CONFIG_TARGET_K230_CANMV) += k230-canmv.dtb
dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += mpfs-icicle-kit.dtb
-dtb-$(CONFIG_TARGET_MILKV_DUO) += cv1800b-milkv-duo.dtb
-dtb-$(CONFIG_TARGET_LICHEERV_NANO) += sg2002-licheerv-nano-b.dtb
dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt32.dtb qemu-virt64.dtb
dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
diff --git a/arch/riscv/dts/cv1800b-milkv-duo.dts b/arch/riscv/dts/cv1800b-milkv-duo.dts
deleted file mode 100644
index e7cc0e8bd14..00000000000
--- a/arch/riscv/dts/cv1800b-milkv-duo.dts
+++ /dev/null
@@ -1,64 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
- */
-
-/dts-v1/;
-
-#include "cv1800b.dtsi"
-
-/ {
- model = "Milk-V Duo";
- compatible = "milkv,duo", "sophgo,cv1800b";
-
- aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
- serial4 = &uart4;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x80000000 0x3f40000>;
- };
-};
-
-ðernet0 {
- status = "okay";
- phy-mode = "rmii";
-};
-
-&osc {
- clock-frequency = <25000000>;
-};
-
-&sdhci0 {
- status = "okay";
- bus-width = <4>;
- no-1-8-v;
- no-mmc;
- no-sdio;
-};
-
-&spif {
- status = "okay";
-
- spiflash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <75000000>;
- spi-tx-bus-width = <4>;
- spi-rx-bus-width = <4>;
- m25p,fast-read;
- };
-};
-
-&uart0 {
- status = "okay";
-};
diff --git a/arch/riscv/dts/cv1800b.dtsi b/arch/riscv/dts/cv1800b.dtsi
deleted file mode 100644
index baf641829e7..00000000000
--- a/arch/riscv/dts/cv1800b.dtsi
+++ /dev/null
@@ -1,22 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
- */
-
-#include "cv18xx.dtsi"
-
-/ {
- compatible = "sophgo,cv1800b";
-};
-
-&plic {
- compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
-};
-
-&clint {
- compatible = "sophgo,cv1800b-clint", "thead,c900-clint";
-};
-
-&clk {
- compatible = "sophgo,cv1800-clk";
-};
diff --git a/arch/riscv/dts/cv18xx.dtsi b/arch/riscv/dts/cv18xx.dtsi
deleted file mode 100644
index 8530527aa39..00000000000
--- a/arch/riscv/dts/cv18xx.dtsi
+++ /dev/null
@@ -1,232 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
- * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/clock/sophgo,cv1800.h>
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus: cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- timebase-frequency = <25000000>;
-
- cpu0: cpu@0 {
- compatible = "thead,c906", "riscv";
- device_type = "cpu";
- reg = <0>;
- d-cache-block-size = <64>;
- d-cache-sets = <512>;
- d-cache-size = <65536>;
- i-cache-block-size = <64>;
- i-cache-sets = <128>;
- i-cache-size = <32768>;
- mmu-type = "riscv,sv39";
- riscv,isa = "rv64imafdc";
- riscv,isa-base = "rv64i";
- riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
- "zifencei", "zihpm";
-
- cpu0_intc: interrupt-controller {
- compatible = "riscv,cpu-intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- };
- };
- };
-
- osc: oscillator {
- compatible = "fixed-clock";
- clock-output-names = "osc_25m";
- #clock-cells = <0>;
- };
-
- soc {
- compatible = "simple-bus";
- interrupt-parent = <&plic>;
- #address-cells = <1>;
- #size-cells = <1>;
- dma-noncoherent;
- ranges;
-
- clk: clock-controller@3002000 {
- reg = <0x03002000 0x1000>;
- clocks = <&osc>;
- #clock-cells = <1>;
- };
-
- gpio0: gpio@3020000 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x3020000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- porta: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <32>;
- reg = <0>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <60 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- gpio1: gpio@3021000 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x3021000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- portb: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <32>;
- reg = <0>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- gpio2: gpio@3022000 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x3022000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- portc: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <32>;
- reg = <0>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- gpio3: gpio@3023000 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x3023000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- portd: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <32>;
- reg = <0>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- ethernet0: ethernet@4070000 {
- compatible = "sophgo,cv1800b-dwmac";
- reg = <0x04070000 0x10000>;
- interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk CLK_ETH0_500M>, <&clk CLK_AXI4_ETH0>;
- clock-names = "stmmaceth", "pclk";
- status = "disabled";
- };
-
- uart0: serial@4140000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x04140000 0x100>;
- interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk CLK_UART0>, <&clk CLK_APB_UART0>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- status = "disabled";
- };
-
- uart1: serial@4150000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x04150000 0x100>;
- interrupts = <45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk CLK_UART4>, <&clk CLK_APB_UART4>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- status = "disabled";
- };
-
- uart2: serial@4160000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x04160000 0x100>;
- interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk CLK_UART2>, <&clk CLK_APB_UART2>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- status = "disabled";
- };
-
- uart3: serial@4170000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x04170000 0x100>;
- interrupts = <47 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk CLK_UART3>, <&clk CLK_APB_UART3>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- status = "disabled";
- };
-
- uart4: serial@41c0000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x041c0000 0x100>;
- interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk CLK_UART4>, <&clk CLK_APB_UART4>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- status = "disabled";
- };
-
- sdhci0: mmc@4310000 {
- compatible = "sophgo,cv1800b-dwcmshc";
- reg = <0x4310000 0x1000>;
- interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk CLK_AXI4_SD0>, <&clk CLK_SD0>;
- clock-names = "core", "bus";
- status = "disabled";
- };
-
- spif: spi@10000000 {
- compatible = "sophgo,cv1800b-spif";
- reg = <0x10000000 0x10000000>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clk CLK_AHB_SF>;
- interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- plic: interrupt-controller@70000000 {
- reg = <0x70000000 0x4000000>;
- interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <2>;
- riscv,ndev = <101>;
- };
-
- clint: timer@74000000 {
- reg = <0x74000000 0x10000>;
- interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
- };
- };
-};
diff --git a/arch/riscv/dts/sg2002-licheerv-nano-b.dts b/arch/riscv/dts/sg2002-licheerv-nano-b.dts
deleted file mode 100644
index 9871a75836c..00000000000
--- a/arch/riscv/dts/sg2002-licheerv-nano-b.dts
+++ /dev/null
@@ -1,45 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
- */
-
-/dts-v1/;
-
-#include "sg2002.dtsi"
-
-/ {
- model = "LicheeRV Nano B";
- compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";
-
- aliases {
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- gpio2 = &gpio2;
- gpio3 = &gpio3;
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
- serial4 = &uart4;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&osc {
- clock-frequency = <25000000>;
-};
-
-&sdhci0 {
- status = "okay";
- bus-width = <4>;
- no-1-8-v;
- no-mmc;
- no-sdio;
-};
-
-&uart0 {
- status = "okay";
-};
diff --git a/arch/riscv/dts/sg2002.dtsi b/arch/riscv/dts/sg2002.dtsi
deleted file mode 100644
index 0f97000fa8b..00000000000
--- a/arch/riscv/dts/sg2002.dtsi
+++ /dev/null
@@ -1,34 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include "cv18xx.dtsi"
-
-/ {
- compatible = "sophgo,sg2002";
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x80000000 0x10000000>;
- };
-};
-
-&plic {
- compatible = "sophgo,sg2002-plic", "sophgo,cv1800b-plic", "thead,c900-plic";
-};
-
-&clint {
- compatible = "sophgo,sg2002-plic", "sophgo,cv1800b-clint", "thead,c900-clint";
-};
-
-&clk {
- compatible = "sophgo,sg2002-clk", "sophgo,cv1800-clk";
-};
-
-&sdhci0 {
- compatible = "sophgo,sg2002-dwcmshc", "sophgo,cv1800b-dwcmshc";
-};
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 7/7] clk: sophgo: cv1800b: Drop legacy compatible string
2026-08-06 12:13 [PATCH v3 0/7] riscv: sophgo: Use upstream devicetrees for CV18xx boards Zhuxu Ran via U-Boot
` (5 preceding siblings ...)
2026-08-06 12:13 ` [PATCH v3 6/7] riscv: dts: sophgo: Drop local CV18xx devicetrees Zhuxu Ran via U-Boot
@ 2026-08-06 12:13 ` Zhuxu Ran via U-Boot
6 siblings, 0 replies; 12+ messages in thread
From: Zhuxu Ran via U-Boot @ 2026-08-06 12:13 UTC (permalink / raw)
To: u-boot, Yao Zi
Cc: Lukasz Majewski, Tom Rini, Zhuxu Ran, Peng Fan, Jaehoon Chung,
Stefan Roese, Hiago De Franco, Thomas Bonnefille, Kongyang Liu,
Tim Ouyang, Leo Liang, Guodong Xu, Andreas Schwab, Junhui Liu
Milk-V Duo and LicheeRV Nano now use upstream devicetrees with the
SoC-specific "sophgo,cv1800b-clk" and "sophgo,sg2002-clk"
compatible strings.
Remove the now-unused legacy "sophgo,cv1800-clk" compatible string.
Signed-off-by: Zhuxu Ran <zhuxu_ran@zohomail.com>
---
drivers/clk/sophgo/clk-cv1800b.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/clk/sophgo/clk-cv1800b.c b/drivers/clk/sophgo/clk-cv1800b.c
index 57051c1ec0a..2270a076ce2 100644
--- a/drivers/clk/sophgo/clk-cv1800b.c
+++ b/drivers/clk/sophgo/clk-cv1800b.c
@@ -743,7 +743,6 @@ const struct clk_ops cv1800b_clk_ops = {
};
static const struct udevice_id cv1800b_clk_of_match[] = {
- { .compatible = "sophgo,cv1800-clk" },
{ .compatible = "sophgo,cv1800b-clk" },
{ .compatible = "sophgo,sg2002-clk" },
{ },
--
2.55.0
^ permalink raw reply related [flat|nested] 12+ messages in thread