* [U-Boot] [PATCH] arm: ls102xa: Fixed a register definition error @ 2014-09-18 9:12 Tang Yuantian 2014-09-18 11:24 ` Albert ARIBAUD 0 siblings, 1 reply; 6+ messages in thread From: Tang Yuantian @ 2014-09-18 9:12 UTC (permalink / raw) To: u-boot There are 8 SCFG_SPARECR registers in SCFG memory block, not just one. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> --- arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index 7995fe2..b5db720 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -182,7 +182,7 @@ struct ccsr_scfg { u32 etsecmcr; u32 sdhciovserlcr; u32 resv14[61]; - u32 sparecr; + u32 sparecr[8]; }; /* Clocking */ -- 2.1.0.27.g96db324 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] arm: ls102xa: Fixed a register definition error 2014-09-18 9:12 [U-Boot] [PATCH] arm: ls102xa: Fixed a register definition error Tang Yuantian @ 2014-09-18 11:24 ` Albert ARIBAUD 2014-09-19 1:45 ` Yuantian Tang 2014-09-19 5:02 ` Huan Wang 0 siblings, 2 replies; 6+ messages in thread From: Albert ARIBAUD @ 2014-09-18 11:24 UTC (permalink / raw) To: u-boot Hi Tang, On Thu, 18 Sep 2014 17:12:06 +0800, Tang Yuantian <Yuantian.Tang@freescale.com> wrote: > There are 8 SCFG_SPARECR registers in SCFG memory block, not > just one. > > Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> > --- > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > index 7995fe2..b5db720 100644 > --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > @@ -182,7 +182,7 @@ struct ccsr_scfg { > u32 etsecmcr; > u32 sdhciovserlcr; > u32 resv14[61]; > - u32 sparecr; > + u32 sparecr[8]; > }; > > /* Clocking */ Obviously the original code was not problematic as sparecr was not used. Is your change dictated by a patch or series that you are preparing and that will use sparecr? Amicalement, -- Albert. ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] arm: ls102xa: Fixed a register definition error 2014-09-18 11:24 ` Albert ARIBAUD @ 2014-09-19 1:45 ` Yuantian Tang 2014-09-19 15:59 ` Albert ARIBAUD 2014-09-19 5:02 ` Huan Wang 1 sibling, 1 reply; 6+ messages in thread From: Yuantian Tang @ 2014-09-19 1:45 UTC (permalink / raw) To: u-boot > -----Original Message----- > From: Albert ARIBAUD [mailto:albert.u.boot at aribaud.net] > Sent: Thursday, September 18, 2014 7:25 PM > To: Tang Yuantian-B29983 > Cc: Wang Huan-B18965; Lu Jingchang-B35083; Jin Zhengxiong-R64188; > Kushwaha Prabhakar-B32579; u-boot at lists.denx.de > Subject: Re: [PATCH] arm: ls102xa: Fixed a register definition error > > Hi Tang, > > On Thu, 18 Sep 2014 17:12:06 +0800, Tang Yuantian > <Yuantian.Tang@freescale.com> wrote: > > > There are 8 SCFG_SPARECR registers in SCFG memory block, not just one. > > > > Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> > > --- > > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > index 7995fe2..b5db720 100644 > > --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > @@ -182,7 +182,7 @@ struct ccsr_scfg { > > u32 etsecmcr; > > u32 sdhciovserlcr; > > u32 resv14[61]; > > - u32 sparecr; > > + u32 sparecr[8]; > > }; > > > > /* Clocking */ > > Obviously the original code was not problematic as sparecr was not used. Is your > change dictated by a patch or series that you are preparing and that will use > sparecr? > Yes, they will be used by deep sleep patches I am preparing. Thanks, Yuantian > Amicalement, > -- > Albert. ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] arm: ls102xa: Fixed a register definition error 2014-09-19 1:45 ` Yuantian Tang @ 2014-09-19 15:59 ` Albert ARIBAUD 2014-09-22 2:20 ` Yuantian Tang 0 siblings, 1 reply; 6+ messages in thread From: Albert ARIBAUD @ 2014-09-19 15:59 UTC (permalink / raw) To: u-boot Hi Yuantian, On Fri, 19 Sep 2014 01:45:52 +0000, Yuantian Tang <Yuantian.Tang@freescale.com> wrote: > > > -----Original Message----- > > From: Albert ARIBAUD [mailto:albert.u.boot at aribaud.net] > > Sent: Thursday, September 18, 2014 7:25 PM > > To: Tang Yuantian-B29983 > > Cc: Wang Huan-B18965; Lu Jingchang-B35083; Jin Zhengxiong-R64188; > > Kushwaha Prabhakar-B32579; u-boot at lists.denx.de > > Subject: Re: [PATCH] arm: ls102xa: Fixed a register definition error > > > > Hi Tang, > > > > On Thu, 18 Sep 2014 17:12:06 +0800, Tang Yuantian > > <Yuantian.Tang@freescale.com> wrote: > > > > > There are 8 SCFG_SPARECR registers in SCFG memory block, not just one. > > > > > > Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> > > > --- > > > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > > b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > > index 7995fe2..b5db720 100644 > > > --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > > +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > > @@ -182,7 +182,7 @@ struct ccsr_scfg { > > > u32 etsecmcr; > > > u32 sdhciovserlcr; > > > u32 resv14[61]; > > > - u32 sparecr; > > > + u32 sparecr[8]; > > > }; > > > > > > /* Clocking */ > > > > Obviously the original code was not problematic as sparecr was not used. Is your > > change dictated by a patch or series that you are preparing and that will use > > sparecr? > > > Yes, they will be used by deep sleep patches I am preparing. Then please post them inside the deep sleep patch series. > Thanks, > Yuantian > > > Amicalement, Amicalement, -- Albert. ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] arm: ls102xa: Fixed a register definition error 2014-09-19 15:59 ` Albert ARIBAUD @ 2014-09-22 2:20 ` Yuantian Tang 0 siblings, 0 replies; 6+ messages in thread From: Yuantian Tang @ 2014-09-22 2:20 UTC (permalink / raw) To: u-boot OK, if you say so. Thanks, Yuantian > -----Original Message----- > From: Albert ARIBAUD [mailto:albert.u.boot at aribaud.net] > Sent: Friday, September 19, 2014 11:59 PM > To: Tang Yuantian-B29983 > Cc: Wang Huan-B18965; Lu Jingchang-B35083; Jin Zhengxiong-R64188; > Kushwaha Prabhakar-B32579; u-boot at lists.denx.de > Subject: Re: [PATCH] arm: ls102xa: Fixed a register definition error > > Hi Yuantian, > > On Fri, 19 Sep 2014 01:45:52 +0000, Yuantian Tang > <Yuantian.Tang@freescale.com> wrote: > > > > > > -----Original Message----- > > > From: Albert ARIBAUD [mailto:albert.u.boot at aribaud.net] > > > Sent: Thursday, September 18, 2014 7:25 PM > > > To: Tang Yuantian-B29983 > > > Cc: Wang Huan-B18965; Lu Jingchang-B35083; Jin Zhengxiong-R64188; > > > Kushwaha Prabhakar-B32579; u-boot at lists.denx.de > > > Subject: Re: [PATCH] arm: ls102xa: Fixed a register definition error > > > > > > Hi Tang, > > > > > > On Thu, 18 Sep 2014 17:12:06 +0800, Tang Yuantian > > > <Yuantian.Tang@freescale.com> wrote: > > > > > > > There are 8 SCFG_SPARECR registers in SCFG memory block, not just one. > > > > > > > > Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> > > > > --- > > > > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > > > b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > > > index 7995fe2..b5db720 100644 > > > > --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > > > +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > > > @@ -182,7 +182,7 @@ struct ccsr_scfg { > > > > u32 etsecmcr; > > > > u32 sdhciovserlcr; > > > > u32 resv14[61]; > > > > - u32 sparecr; > > > > + u32 sparecr[8]; > > > > }; > > > > > > > > /* Clocking */ > > > > > > Obviously the original code was not problematic as sparecr was not > > > used. Is your change dictated by a patch or series that you are > > > preparing and that will use sparecr? > > > > > Yes, they will be used by deep sleep patches I am preparing. > > Then please post them inside the deep sleep patch series. > > > Thanks, > > Yuantian > > > > > Amicalement, > > Amicalement, > -- > Albert. ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] arm: ls102xa: Fixed a register definition error 2014-09-18 11:24 ` Albert ARIBAUD 2014-09-19 1:45 ` Yuantian Tang @ 2014-09-19 5:02 ` Huan Wang 1 sibling, 0 replies; 6+ messages in thread From: Huan Wang @ 2014-09-19 5:02 UTC (permalink / raw) To: u-boot Verified on board ls1021qds. Regards, Alison. > -----Original Message----- > From: Albert ARIBAUD [mailto:albert.u.boot at aribaud.net] > Sent: Thursday, September 18, 2014 7:25 PM > To: Tang Yuantian-B29983 > Cc: Wang Huan-B18965; Lu Jingchang-B35083; Jin Zhengxiong-R64188; > Kushwaha Prabhakar-B32579; u-boot at lists.denx.de > Subject: Re: [PATCH] arm: ls102xa: Fixed a register definition error > > Hi Tang, > > On Thu, 18 Sep 2014 17:12:06 +0800, Tang Yuantian > <Yuantian.Tang@freescale.com> wrote: > > > There are 8 SCFG_SPARECR registers in SCFG memory block, not just one. > > > > Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> > > --- > > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > index 7995fe2..b5db720 100644 > > --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h > > @@ -182,7 +182,7 @@ struct ccsr_scfg { > > u32 etsecmcr; > > u32 sdhciovserlcr; > > u32 resv14[61]; > > - u32 sparecr; > > + u32 sparecr[8]; > > }; > > > > /* Clocking */ > > Obviously the original code was not problematic as sparecr was not used. > Is your change dictated by a patch or series that you are preparing and > that will use sparecr? > > Amicalement, > -- > Albert. ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2014-09-22 2:20 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-09-18 9:12 [U-Boot] [PATCH] arm: ls102xa: Fixed a register definition error Tang Yuantian 2014-09-18 11:24 ` Albert ARIBAUD 2014-09-19 1:45 ` Yuantian Tang 2014-09-19 15:59 ` Albert ARIBAUD 2014-09-22 2:20 ` Yuantian Tang 2014-09-19 5:02 ` Huan Wang
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