U-Boot Archive on lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH 1/1] configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS
@ 2025-04-03 14:28 Heinrich Schuchardt
  2025-04-08 11:38 ` Leo Liang
  0 siblings, 1 reply; 3+ messages in thread
From: Heinrich Schuchardt @ 2025-04-03 14:28 UTC (permalink / raw)
  To: Bin Meng; +Cc: Rick Chen, Leo, u-boot, Heinrich Schuchardt

The number of memory banks in QEMU is not bounded by 1.

In this example we have two banks:

    qemu-system-riscv64 \
    -machine virt \
    -nographic \
    -m 8192 \
    -smp 8,sockets=2,cores=4,threads=1 \
    -numa node,cpus=0-3,mem=4096 \
    -numa node,cpus=4-7,mem=4096 \
    -kernel u-boot

As we will see RISC-V NUMA systems using U-Boot
we should be able to emulate these.

Use the default value defined in /Kconfig as 4.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
---
 configs/qemu-riscv32_defconfig       | 1 -
 configs/qemu-riscv32_smode_defconfig | 1 -
 configs/qemu-riscv32_spl_defconfig   | 1 -
 configs/qemu-riscv64_defconfig       | 1 -
 configs/qemu-riscv64_smode_defconfig | 1 -
 configs/qemu-riscv64_spl_defconfig   | 1 -
 6 files changed, 6 deletions(-)

diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig
index 1cd80f5769e..e937f9439d7 100644
--- a/configs/qemu-riscv32_defconfig
+++ b/configs/qemu-riscv32_defconfig
@@ -1,6 +1,5 @@
 CONFIG_RISCV=y
 CONFIG_SYS_MALLOC_LEN=0x800000
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig
index 6f871c83644..a71b938acde 100644
--- a/configs/qemu-riscv32_smode_defconfig
+++ b/configs/qemu-riscv32_smode_defconfig
@@ -1,6 +1,5 @@
 CONFIG_RISCV=y
 CONFIG_SYS_MALLOC_LEN=0x800000
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig
index 9906f8b2dad..e014eda0777 100644
--- a/configs/qemu-riscv32_spl_defconfig
+++ b/configs/qemu-riscv32_spl_defconfig
@@ -1,6 +1,5 @@
 CONFIG_RISCV=y
 CONFIG_SYS_MALLOC_LEN=0x800000
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
index cdd511b0e72..e90ec0ac27e 100644
--- a/configs/qemu-riscv64_defconfig
+++ b/configs/qemu-riscv64_defconfig
@@ -1,6 +1,5 @@
 CONFIG_RISCV=y
 CONFIG_SYS_MALLOC_LEN=0x800000
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
index 2f62f17bc8c..24c92f6d5b4 100644
--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
@@ -1,6 +1,5 @@
 CONFIG_RISCV=y
 CONFIG_SYS_MALLOC_LEN=0x800000
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig
index 27e092bd208..bfb4613b68d 100644
--- a/configs/qemu-riscv64_spl_defconfig
+++ b/configs/qemu-riscv64_spl_defconfig
@@ -1,6 +1,5 @@
 CONFIG_RISCV=y
 CONFIG_SYS_MALLOC_LEN=0x800000
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
 CONFIG_ENV_SIZE=0x20000
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread
* [PATCH 1/1] configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS
@ 2025-04-03 14:46 Heinrich Schuchardt
  0 siblings, 0 replies; 3+ messages in thread
From: Heinrich Schuchardt @ 2025-04-03 14:46 UTC (permalink / raw)
  To: Tuomas Tynkkynen
  Cc: Tom Rini, Ilias Apalodimas, Raymond Mao, Simon Glass,
	Patrick Delaunay, u-boot, Heinrich Schuchardt

The number of memory banks in QEMU is not bounded by 1.

In this example we have two banks:

    qemu-system-aarch64 \
    -machine virt \
    -nographic \
    -cpu cortex-a72 \
    -m 8G \
    -smp 8,sockets=2,cores=4,threads=1 \
    -object memory-backend-ram,id=mem0,size=4G \
    -numa node,cpus=0-3,memdev=mem0 \
    -object memory-backend-ram,id=mem1,size=4G \
    -numa node,cpus=4-7,memdev=mem1 \
    -bios u-boot.bin

Use the default value defined in /Kconfig as 4.

Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
---
 configs/qemu_arm64_defconfig | 1 -
 configs/qemu_arm_defconfig   | 1 -
 2 files changed, 2 deletions(-)

diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
index 03028c76acc..6c9d2505a69 100644
--- a/configs/qemu_arm64_defconfig
+++ b/configs/qemu_arm64_defconfig
@@ -3,7 +3,6 @@ CONFIG_POSITION_INDEPENDENT=y
 CONFIG_ARCH_QEMU=y
 CONFIG_SYS_MALLOC_LEN=0x1000000
 CONFIG_BLOBLIST_SIZE_RELOC=0x2000
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
 CONFIG_ENV_SIZE=0x40000
 CONFIG_ENV_SECT_SIZE=0x40000
diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
index e09f54e0685..2d642f86ba6 100644
--- a/configs/qemu_arm_defconfig
+++ b/configs/qemu_arm_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARM_SMCCC=y
 CONFIG_ARCH_QEMU=y
 CONFIG_SYS_MALLOC_LEN=0x1000000
 CONFIG_BLOBLIST_SIZE_RELOC=0x2000
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
 CONFIG_ENV_SIZE=0x40000
 CONFIG_ENV_SECT_SIZE=0x40000
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2025-04-08 11:39 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-04-03 14:28 [PATCH 1/1] configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS Heinrich Schuchardt
2025-04-08 11:38 ` Leo Liang
  -- strict thread matches above, loose matches on Subject: below --
2025-04-03 14:46 Heinrich Schuchardt

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox