[PATCH 0/6] MPFS Icicle Kit Cleanup

[PATCH 0/6] MPFS Icicle Kit Cleanup

[Jamie Gibbons]

Hi all,

The following patch series completes a series of cleanups for Microchip's MPFS
Icicle Kit. This includes making use of the CONFIG_OF_BOARD_SETUP functionality
to move the ethernet mac address setting to the ft_board_setup() function which
allows replacing fdt set in boot scripts for Microchip's MPFS Icicle kit.

Additionally, the Icicle Kit board file is further cleaned up with the
addition of two new drivers - mailbox and system controller - to move all
functions which interact with the system controller and which can be reused in
other areas out of the board file.

Regards,
Jamie Gibbons

Jamie Gibbons (6):
  configs: microchip_mpfs_icicle: enable CONFIG_OF_BOARD_SETUP
  board: microchip: mpfs_icicle: make use of ft_board_setup()
  mailbox: add PolarFire SoC mailbox driver
  misc: add PolarFire SoC system controller
  board: microchip: mpfs_icicle: enable new driver configs
  board: microchip: mpfs_icicle: update to use system controller

 board/microchip/mpfs_icicle/Kconfig       |   4 +
 board/microchip/mpfs_icicle/mpfs_icicle.c | 121 +++++++--------
 configs/microchip_mpfs_icicle_defconfig   |   4 +
 drivers/mailbox/Kconfig                   |   7 +
 drivers/mailbox/Makefile                  |   1 +
 drivers/mailbox/mpfs-mbox.c               | 177 ++++++++++++++++++++++
 drivers/misc/Kconfig                      |   9 ++
 drivers/misc/Makefile                     |   1 +
 drivers/misc/mpfs_syscontroller.c         | 157 +++++++++++++++++++
 include/mpfs-mailbox.h                    |  67 ++++++++
 10 files changed, 484 insertions(+), 64 deletions(-)
 create mode 100644 drivers/mailbox/mpfs-mbox.c
 create mode 100644 drivers/misc/mpfs_syscontroller.c
 create mode 100644 include/mpfs-mailbox.h

-- 
2.43.0

[PATCH 1/6] configs: microchip_mpfs_icicle: enable CONFIG_OF_BOARD_SETUP

[Jamie Gibbons]

Enable CONFIG_OF_BOARD_SETUP and other dependencies to allow the use of
the ft_board_setup() function to replace fdt set in boot scripts for
Microchip's MPFS Icicle kit.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 configs/microchip_mpfs_icicle_defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
index 6937aa224a1..7aefcc5fa86 100644
--- a/configs/microchip_mpfs_icicle_defconfig
+++ b/configs/microchip_mpfs_icicle_defconfig
@@ -5,6 +5,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_DEFAULT_DEVICE_TREE="microchip/mpfs-icicle-kit"
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_SYS_LOAD_ADDR=0x80200000
 CONFIG_SYS_MEM_TOP_HIDE=0x400000
 # CONFIG_DEBUG_UART is not set
@@ -12,14 +13,17 @@ CONFIG_TARGET_MICROCHIP_ICICLE=y
 CONFIG_ARCH_RV64I=y
 CONFIG_RISCV_SMODE=y
 CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_DEFAULT_FDT_FILE="microchip/mpfs-icicle-kit.dtb"
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=282
+CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_SYS_PROMPT="RISC-V # "
 CONFIG_OF_UPSTREAM=y
+CONFIG_OVERWRITE_ETHADDR_ONCE=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_DM_MTD=y
-- 
2.43.0

Re: [PATCH 1/6] configs: microchip_mpfs_icicle: enable CONFIG_OF_BOARD_SETUP

[Leo Liang]

On Fri, Aug 01, 2025 at 01:36:21PM +0100, Jamie Gibbons wrote:
> Enable CONFIG_OF_BOARD_SETUP and other dependencies to allow the use of
> the ft_board_setup() function to replace fdt set in boot scripts for
> Microchip's MPFS Icicle kit.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
>  configs/microchip_mpfs_icicle_defconfig | 4 ++++
>  1 file changed, 4 insertions(+)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

[PATCH 2/6] board: microchip: mpfs_icicle: make use of ft_board_setup()

[Jamie Gibbons]

Move ethernet mac address setting to ft_board_setup() to remove the need
for fdt set in custom boot script.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 board/microchip/mpfs_icicle/mpfs_icicle.c | 51 ++++++++++++-----------
 1 file changed, 26 insertions(+), 25 deletions(-)

diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.c b/board/microchip/mpfs_icicle/mpfs_icicle.c
index ba622e38ee5..19acbbba42b 100644
--- a/board/microchip/mpfs_icicle/mpfs_icicle.c
+++ b/board/microchip/mpfs_icicle/mpfs_icicle.c
@@ -22,6 +22,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SERVICE_CR_REQ			0x1u
 #define SERVICE_SR_BUSY			0x2u
 
+static unsigned char mac_addr[6];
+
 static void read_device_serial_number(u8 *response, u8 response_size)
 {
 	u8 idx;
@@ -145,10 +147,7 @@ int board_late_init(void)
 {
 	u32 ret;
 	int node;
-	u8 idx;
-	u8 device_serial_number[16] = { 0 };
-	unsigned char mac_addr[6];
-	char icicle_mac_addr[20];
+	u8 device_serial_number[16] = {0};
 	void *blob = (void *)gd->fdt_blob;
 
 	read_device_serial_number(device_serial_number, 16);
@@ -170,19 +169,6 @@ int board_late_init(void)
 		}
 	}
 
-	icicle_mac_addr[0] = '[';
-
-	sprintf(&icicle_mac_addr[1], "%pM", mac_addr);
-
-	icicle_mac_addr[18] = ']';
-	icicle_mac_addr[19] = '\0';
-
-	for (idx = 0; idx < 20; idx++) {
-		if (icicle_mac_addr[idx] == ':')
-			icicle_mac_addr[idx] = ' ';
-	}
-	env_set("icicle_mac_addr0", icicle_mac_addr);
-
 	mac_addr[5] = device_serial_number[0] + 1;
 
 	node = fdt_path_offset(blob, "/soc/ethernet@20110000");
@@ -194,18 +180,33 @@ int board_late_init(void)
 		}
 	}
 
-	icicle_mac_addr[0] = '[';
+	return 0;
+}
 
-	sprintf(&icicle_mac_addr[1], "%pM", mac_addr);
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+	u32 ret;
+	int node;
+
+	node = fdt_path_offset(blob, "/soc/ethernet@20110000");
+	if (node >= 0) {
+		ret = fdt_setprop(blob, node, "local-mac-address", mac_addr, 6);
+		if (ret) {
+			printf("Error setting local-mac-address property for ethernet@20110000\n");
+			return -ENODEV;
+		}
+	}
 
-	icicle_mac_addr[18] = ']';
-	icicle_mac_addr[19] = '\0';
+	mac_addr[5] -= 1;
 
-	for (idx = 0; idx < 20; idx++) {
-		if (icicle_mac_addr[idx] == ':')
-			icicle_mac_addr[idx] = ' ';
+	node = fdt_path_offset(blob, "/soc/ethernet@20112000");
+	if (node >= 0) {
+		ret = fdt_setprop(blob, node, "local-mac-address", mac_addr, 6);
+		if (ret) {
+			printf("Error setting local-mac-address property for ethernet@20112000\n");
+			return -ENODEV;
+		}
 	}
-	env_set("icicle_mac_addr1", icicle_mac_addr);
 
 	return 0;
 }
-- 
2.43.0

Re: [PATCH 2/6] board: microchip: mpfs_icicle: make use of ft_board_setup()

[Leo Liang]

On Fri, Aug 01, 2025 at 01:36:22PM +0100, Jamie Gibbons wrote:
> Move ethernet mac address setting to ft_board_setup() to remove the need
> for fdt set in custom boot script.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
>  board/microchip/mpfs_icicle/mpfs_icicle.c | 51 ++++++++++++-----------
>  1 file changed, 26 insertions(+), 25 deletions(-)

Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>

[PATCH 3/6] mailbox: add PolarFire SoC mailbox driver

[Jamie Gibbons]

This driver adds support for the single mailbox channel of the MSS
system controller on the Microchip PolarFire SoC.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 drivers/mailbox/Kconfig     |   7 ++
 drivers/mailbox/Makefile    |   1 +
 drivers/mailbox/mpfs-mbox.c | 177 ++++++++++++++++++++++++++++++++++++
 include/mpfs-mailbox.h      |  67 ++++++++++++++
 4 files changed, 252 insertions(+)
 create mode 100644 drivers/mailbox/mpfs-mbox.c
 create mode 100644 include/mpfs-mailbox.h

diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index 4d9f004ebad..5a31ac707dc 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -28,6 +28,13 @@ config IMX_MU_MBOX
 	  Enable support for i.MX Messaging Unit for communication with other
 	  processors on the SoC using mailbox interface
 
+config MPFS_MBOX
+	bool "Enable MPFS system controler support"
+	depends on DM_MAILBOX && ARCH_RV64I
+	help
+	  Enable support for the mailboxes that provide a comminucation
+	  channel with the system controller integrated on PolarFire SoC.
+
 config SANDBOX_MBOX
 	bool "Enable the sandbox mailbox test driver"
 	depends on DM_MAILBOX && SANDBOX
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index e8c745f7d79..b54fbdfff15 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -6,6 +6,7 @@
 obj-$(CONFIG_$(PHASE_)DM_MAILBOX) += mailbox-uclass.o
 obj-$(CONFIG_APPLE_MBOX) += apple-mbox.o
 obj-$(CONFIG_IMX_MU_MBOX) += imx-mailbox.o
+obj-$(CONFIG_MPFS_MBOX) += mpfs-mbox.o
 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox.o
 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox-test.o
 obj-$(CONFIG_STM32_IPCC) += stm32-ipcc.o
diff --git a/drivers/mailbox/mpfs-mbox.c b/drivers/mailbox/mpfs-mbox.c
new file mode 100644
index 00000000000..55238847ecd
--- /dev/null
+++ b/drivers/mailbox/mpfs-mbox.c
@@ -0,0 +1,177 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Microchip's PolarFire SoC (MPFS) Mailbox Driver
+ *
+ * Copyright (C) 2024 Microchip Technology Inc. All rights reserved.
+ *
+ * Author: Jamie Gibbons <jamie.gibbons@microchip.com>
+ *
+ */
+
+#include <asm/io.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/device.h>
+#include <dm/device_compat.h>
+#include <dm/devres.h>
+#include <dm/ofnode.h>
+#include <linux/bitops.h>
+#include <linux/compat.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <log.h>
+#include <mailbox-uclass.h>
+#include <malloc.h>
+#include <mpfs-mailbox.h>
+
+#define SERVICES_CR_OFFSET 0x50u
+#define SERVICES_SR_OFFSET 0x54u
+
+#define SERVICE_CR_REQ_MASK 0x1u
+#define SERVICE_SR_BUSY_MASK 0x2u
+#define SERVICE_SR_STATUS_SHIFT 16
+#define SERVICE_CR_COMMAND_SHIFT 16
+#define MASK_8BIT 0xFF
+
+struct mpfs_mbox {
+	struct udevice *dev;
+	void __iomem *ctrl_base;
+	void __iomem *mbox_base;
+	struct mbox_chan *chan;
+};
+
+static bool mpfs_mbox_busy(struct mbox_chan *chan)
+{
+	struct mpfs_mbox *mbox = dev_get_priv(chan->dev);
+	uint16_t status;
+
+	status = readl(mbox->ctrl_base + SERVICES_SR_OFFSET);
+
+	return status & SERVICE_SR_BUSY_MASK;
+}
+
+static int mpfs_mbox_send(struct mbox_chan *chan, const void *data)
+{
+	struct mpfs_mbox *mbox = dev_get_priv(chan->dev);
+	struct mpfs_mss_msg *msg = (struct mpfs_mss_msg *)data;
+	u32 mailbox_val, cmd_shifted, value;
+	u8 *byte_buf;
+	u8 idx, byte_idx, byte_offset;
+
+	u32 *word_buf = (u32 *)msg->cmd_data;
+
+	if (mpfs_mbox_busy(chan))
+		return -EBUSY;
+
+	for (idx = 0; idx < (msg->cmd_data_size / BYTES_4); idx++)
+		writel(word_buf[idx], mbox->mbox_base + msg->mbox_offset + idx * BYTES_4);
+
+	if ((msg->cmd_data_size % BYTES_4) > 0) {
+		byte_offset = (msg->cmd_data_size / BYTES_4) * BYTES_4;
+		byte_buf = (u8 *)(msg->cmd_data + byte_offset);
+		mailbox_val = readl(mbox->mbox_base + msg->mbox_offset + idx * BYTES_4);
+
+		for (byte_idx = 0; byte_idx < (msg->cmd_data_size % BYTES_4); byte_idx++) {
+			mailbox_val &= ~(MASK_8BIT << (byte_idx * 0x8u));
+			mailbox_val |= (u32)byte_buf[byte_idx] << (byte_idx * 0x8u);
+		}
+		writel(mailbox_val, mbox->mbox_base + msg->mbox_offset + idx * BYTES_4);
+	}
+
+	cmd_shifted = msg->cmd_opcode << SERVICE_CR_COMMAND_SHIFT;
+	cmd_shifted |= SERVICE_CR_REQ_MASK;
+	writel(cmd_shifted, mbox->ctrl_base + SERVICES_CR_OFFSET);
+
+	do {
+		value = readl(mbox->ctrl_base + SERVICES_CR_OFFSET);
+	} while (SERVICE_CR_REQ_MASK == (value & SERVICE_CR_REQ_MASK));
+
+	do {
+		value = readl(mbox->ctrl_base + SERVICES_SR_OFFSET);
+	} while (SERVICE_SR_BUSY_MASK == (value & SERVICE_SR_BUSY_MASK));
+
+	msg->response->resp_status = (value >> SERVICE_SR_STATUS_SHIFT);
+	if (msg->response->resp_status)
+		return -EBADMSG;
+
+	return 0;
+}
+
+static int mpfs_mbox_recv(struct mbox_chan *chan, void *data)
+{
+	struct mpfs_mbox *mbox = dev_get_priv(chan->dev);
+	struct mpfs_mss_msg *msg = data;
+	struct mpfs_mss_response *response = msg->response;
+	u8 idx;
+
+	if (!response->resp_msg) {
+		dev_err(chan->dev, "failed to assign memory for response %d\n", -ENOMEM);
+		return -EINVAL;
+	}
+
+	if (mpfs_mbox_busy(chan)) {
+		dev_err(chan->dev, "mailbox is busy\n");
+		response->resp_status = 0xDEAD;
+		return -EINVAL;
+	}
+
+	for (idx = 0; idx < response->resp_size; idx++)
+		*((u8 *)(response->resp_msg) + idx) = readb(mbox->mbox_base + msg->resp_offset  + idx);
+
+	return 0;
+}
+
+static const struct mbox_ops mpfs_mbox_ops = {
+	.send = mpfs_mbox_send,
+	.recv = mpfs_mbox_recv,
+};
+
+static int mpfs_mbox_probe(struct udevice *dev)
+{
+	struct mpfs_mbox *mbox;
+	struct resource regs;
+	ofnode node;
+	int ret;
+
+	node = dev_ofnode(dev);
+
+	mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
+	if (!mbox)
+		return -ENOMEM;
+
+	ret = ofnode_read_resource(node, 0, &regs);
+	if (ret) {
+		dev_err(dev, "No reg property for controller base\n");
+		return ret;
+	};
+
+	mbox->ctrl_base = devm_ioremap(dev, regs.start, regs.start - regs.end);
+
+	ret = ofnode_read_resource(node, 2, &regs);
+	if (ret) {
+		dev_err(dev, "No reg property for mailbox base\n");
+		return ret;
+	};
+
+	mbox->mbox_base = devm_ioremap(dev, regs.start, regs.start - regs.end);
+
+	mbox->dev = dev;
+	dev_set_priv(dev, mbox);
+	mbox->chan->con_priv = mbox;
+
+	return 0;
+}
+
+static const struct udevice_id mpfs_mbox_ids[] = {
+	{.compatible = "microchip,mpfs-mailbox"},
+	{ }
+};
+
+U_BOOT_DRIVER(mpfs_mbox) = {
+	.name = "mpfs-mbox",
+	.id = UCLASS_MAILBOX,
+	.of_match = mpfs_mbox_ids,
+	.probe = mpfs_mbox_probe,
+	.priv_auto = sizeof(struct mpfs_mbox),
+	.ops = &mpfs_mbox_ops,
+};
diff --git a/include/mpfs-mailbox.h b/include/mpfs-mailbox.h
new file mode 100644
index 00000000000..fe83364ed4c
--- /dev/null
+++ b/include/mpfs-mailbox.h
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *
+ * Microchip PolarFire SoC (MPFS)
+ *
+ * Copyright (c) 2020 Microchip Corporation. All rights reserved.
+ *
+ *
+ */
+
+#ifndef _MPFS_MAILBOX_H__
+#define _MPFS_MAILBOX_H__
+
+#include <linux/types.h>
+
+#define BYTES_4 4
+
+struct udevice;
+
+/**
+ * struct mpfs_mss_msg - PolarFire SoC message structure
+ * @cmd_opcode:	Command opcode
+ * @cmd_data_size:	Size of the command data.
+ * @response:	Pointer to the response data.
+ * @cmd_data:	Pointer to the command data.
+ * @mbox_offset:	Mailbox offset
+ * @resp_offset:	Response offset
+ *
+ */
+struct mpfs_mss_msg
+{
+	u8 cmd_opcode;
+	u16 cmd_data_size;
+	struct mpfs_mss_response *response;
+	u8 *cmd_data;
+	u16 mbox_offset;
+	u16 resp_offset;
+};
+
+/**
+ * struct mpfs_mss_response - PolarFire SoC response structure
+ * @resp_status:	Reponse status
+ * @resp_msg:	Pointer to response message.
+ * @resp_size:	Size of the response message.
+ *
+ */
+struct mpfs_mss_response
+{
+	u32 resp_status;
+	u32 *resp_msg;
+	u16 resp_size;
+};
+
+struct mpfs_syscontroller_priv;
+
+struct mpfs_sys_serv {
+	struct udevice *dev;
+	struct mpfs_syscontroller_priv *sys_controller;
+	struct mpfs_mss_msg *msg;
+};
+
+int mpfs_syscontroller_run_service(struct mpfs_syscontroller_priv *sys_controller, struct mpfs_mss_msg *msg);
+int mpfs_syscontroller_read_sernum(struct mpfs_sys_serv *sys_serv_priv, u8 *device_serial_number);
+void mpfs_syscontroller_process_dtbo(struct mpfs_sys_serv *sys_serv_priv);
+struct mpfs_syscontroller_priv *mpfs_syscontroller_get(struct udevice *dev);
+
+#endif /* __MPFS_MAILBOX_H__ */
\ No newline at end of file
-- 
2.43.0

Re: [PATCH 3/6] mailbox: add PolarFire SoC mailbox driver

[Leo Liang]

On Fri, Aug 01, 2025 at 01:36:23PM +0100, Jamie Gibbons wrote:
> This driver adds support for the single mailbox channel of the MSS
> system controller on the Microchip PolarFire SoC.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
>  drivers/mailbox/Kconfig     |   7 ++
>  drivers/mailbox/Makefile    |   1 +
>  drivers/mailbox/mpfs-mbox.c | 177 ++++++++++++++++++++++++++++++++++++
>  include/mpfs-mailbox.h      |  67 ++++++++++++++
>  4 files changed, 252 insertions(+)
>  create mode 100644 drivers/mailbox/mpfs-mbox.c
>  create mode 100644 include/mpfs-mailbox.h

Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>

[PATCH 4/6] misc: add PolarFire SoC system controller

[Jamie Gibbons]

This driver provides an interface to access the functions of the system
controller on the Microchip PolarFire SoC.
This driver includes functions to use the system controller to read
the device serial number.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 drivers/misc/Kconfig              |   9 ++
 drivers/misc/Makefile             |   1 +
 drivers/misc/mpfs_syscontroller.c | 157 ++++++++++++++++++++++++++++++
 3 files changed, 167 insertions(+)
 create mode 100644 drivers/misc/mpfs_syscontroller.c

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 0f753b9dbb9..c1843b6e4f1 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -658,6 +658,15 @@ config MICROCHIP_FLEXCOM
 	  Only one function can be used at a time and is chosen at boot time
 	  according to the device tree.
 
+config MPFS_SYSCONTROLLER
+	bool "Enable Microchip PolarFire SoC (MPFS) System Services support"
+	depends on MISC
+	depends on MPFS_MBOX
+	help
+	  This driver adds support for the PolarFire SoC (MPFS) system controller.
+	  
+	  If unsure, say N.
+
 config K3_AVS0
 	depends on ARCH_K3 && SPL_DM_REGULATOR
 	bool "AVS class 0 support for K3 devices"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index f7422c8e95a..dc5eb3af19c 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -86,6 +86,7 @@ obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o
 obj-$(CONFIG_MICROCHIP_FLEXCOM) += microchip_flexcom.o
+obj-$(CONFIG_MPFS_SYSCONTROLLER) += mpfs_syscontroller.o
 obj-$(CONFIG_K3_AVS0) += k3_avs.o
 obj-$(CONFIG_ESM_K3) += k3_esm.o
 obj-$(CONFIG_K3_BIST) += k3_bist.o
diff --git a/drivers/misc/mpfs_syscontroller.c b/drivers/misc/mpfs_syscontroller.c
new file mode 100644
index 00000000000..160be09b3eb
--- /dev/null
+++ b/drivers/misc/mpfs_syscontroller.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Microchip's PolarFire SoC (MPFS) System Controller Driver
+ *
+ * Copyright (C) 2024 Microchip Technology Inc. All rights reserved.
+ *
+ * Author: Jamie Gibbons <jamie.gibbons@microchip.com>
+ *
+ */
+
+#include <asm/system.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <env.h>
+#include <errno.h>
+#include <linux/compat.h>
+#include <linux/completion.h>
+#include <linux/err.h>
+#include <linux/mtd/mtd.h>
+#include <log.h>
+#include <mailbox.h>
+#include <misc.h>
+#include <mpfs-mailbox.h>
+
+/* Descriptor table */
+#define CMD_OPCODE						0x0u
+#define CMD_DATA_SIZE					0U
+#define CMD_DATA						NULL
+#define MBOX_OFFSET						0x0
+#define RESP_OFFSET						0x0
+#define RESP_BYTES						16U
+
+/**
+ * struct mpfs_syscontroller_priv - Structure representing System Controller data.
+ * @chan:	Mailbox channel
+ * @c:	Completion signal
+ */
+struct mpfs_syscontroller_priv {
+	struct mbox_chan chan;
+	struct completion c;
+};
+
+/**
+ * mpfs_syscontroller_run_service() - Run the MPFS system service
+ * @sys_controller:	corresponding MPFS system service device
+ * @msg:	Message to send
+ *
+ * Return: 0 if all goes good, else appropriate error message.
+ */
+int mpfs_syscontroller_run_service(struct mpfs_syscontroller_priv *sys_controller, struct mpfs_mss_msg *msg)
+{
+	int ret;
+
+	reinit_completion(&sys_controller->c);
+
+	/* Run the System Service Request */
+	ret = mbox_send(&sys_controller->chan, msg);
+	if (ret < 0) {
+		dev_warn(sys_controller->chan.dev, "MPFS sys controller service timeout\n");
+	}
+
+	debug("%s: Service successful %s\n",
+		  __func__, sys_controller->chan.dev->name);
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(mpfs_syscontroller_run_service);
+
+/**
+ * mpfs_syscontroller_read_sernum() - Use system service to read the device serial number
+ * @sys_serv_priv:	system service private data
+ * @device_serial_number:	device serial number
+ *
+ * Return: 0 if all went ok, else return appropriate error
+ */
+int mpfs_syscontroller_read_sernum(struct mpfs_sys_serv *sys_serv_priv, u8 *device_serial_number)
+{
+	unsigned long timeoutsecs = 300;
+	int ret;
+
+	struct mpfs_mss_response response = {
+		.resp_status = 0U,
+		.resp_msg = (u32 *)device_serial_number,
+		.resp_size = RESP_BYTES};
+	struct mpfs_mss_msg msg = {
+		.cmd_opcode = CMD_OPCODE,
+		.cmd_data_size = CMD_DATA_SIZE,
+		.response = &response,
+		.cmd_data = CMD_DATA,
+		.mbox_offset = MBOX_OFFSET,
+		.resp_offset = RESP_OFFSET};
+
+	ret = mpfs_syscontroller_run_service(sys_serv_priv->sys_controller, &msg);
+	if (ret) {
+		dev_err(sys_serv_priv->sys_controller->chan.dev, "Service failed: %d, abort\n", ret);
+		return ret;
+	}
+
+	/* Receive the response */
+	ret = mbox_recv(&sys_serv_priv->sys_controller->chan, &msg, timeoutsecs);
+	if (ret) {
+		dev_err(sys_serv_priv->sys_controller->chan.dev, "Service failed: %d, abort. Failure: %u\n", ret, msg.response->resp_status);
+		return ret;
+	}
+
+	debug("%s: Read successful %s\n",
+		__func__, sys_serv_priv->sys_controller->chan.dev->name);
+
+	return 0;
+}
+EXPORT_SYMBOL(mpfs_syscontroller_read_sernum);
+
+static int mpfs_syscontroller_probe(struct udevice *dev)
+{
+	struct mpfs_syscontroller_priv *sys_controller = dev_get_priv(dev);
+	int ret;
+
+	ret = mbox_get_by_index(dev, 0, &sys_controller->chan);
+	if (ret) {
+		dev_err(dev, "%s: Acquiring mailbox channel failed. ret = %d\n",
+				__func__, ret);
+		return ret;
+	}
+
+	init_completion(&sys_controller->c);
+	dev_info(dev, "Registered MPFS system controller\n");
+
+	return 0;
+}
+
+static const struct udevice_id mpfs_syscontroller_ids[] = {
+	{ .compatible = "microchip,mpfs-sys-controller" },
+	{ }
+};
+
+struct mpfs_syscontroller_priv *mpfs_syscontroller_get(struct udevice *dev)
+{
+	struct mpfs_syscontroller_priv *sys_controller;
+
+	sys_controller = dev_get_priv(dev);
+	if (!sys_controller) {
+		debug("%s: MPFS system controller found but could not register as a sub device %p\n",
+			__func__, sys_controller);
+		return ERR_PTR(-EPROBE_DEFER);
+	}
+
+	return sys_controller;
+}
+EXPORT_SYMBOL(mpfs_syscontroller_get);
+
+U_BOOT_DRIVER(mpfs_syscontroller) = {
+	.name           = "mpfs_syscontroller",
+	.id             = UCLASS_MISC,
+	.of_match       = mpfs_syscontroller_ids,
+	.probe          = mpfs_syscontroller_probe,
+	.priv_auto	= sizeof(struct mpfs_syscontroller_priv),
+};
-- 
2.43.0

Re: [PATCH 4/6] misc: add PolarFire SoC system controller

[Leo Liang]

On Fri, Aug 01, 2025 at 01:36:24PM +0100, Jamie Gibbons wrote:
> This driver provides an interface to access the functions of the system
> controller on the Microchip PolarFire SoC.
> This driver includes functions to use the system controller to read
> the device serial number.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
>  drivers/misc/Kconfig              |   9 ++
>  drivers/misc/Makefile             |   1 +
>  drivers/misc/mpfs_syscontroller.c | 157 ++++++++++++++++++++++++++++++
>  3 files changed, 167 insertions(+)
>  create mode 100644 drivers/misc/mpfs_syscontroller.c

Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>

[PATCH 5/6] board: microchip: mpfs_icicle: enable new driver configs

[Jamie Gibbons]

Enable the MPFS mailbox and system controller drivers for use with the
Icicle kit. These functions are crucial for the board setup functions
that run in the Icicle board file - mpfs_icicle.c.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 board/microchip/mpfs_icicle/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/board/microchip/mpfs_icicle/Kconfig b/board/microchip/mpfs_icicle/Kconfig
index 6e8c479e955..760dffc488b 100644
--- a/board/microchip/mpfs_icicle/Kconfig
+++ b/board/microchip/mpfs_icicle/Kconfig
@@ -59,5 +59,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	imply MTD_SPI_NAND
 	imply CMD_MTD
 	imply CMD_MTDPARTS
+	imply DM_MAILBOX
+	imply MPFS_MBOX
+	imply MISC
+	imply MPFS_SYSCONTROLLER
 
 endif
-- 
2.43.0

Re: [PATCH 5/6] board: microchip: mpfs_icicle: enable new driver configs

[Leo Liang]

On Fri, Aug 01, 2025 at 01:36:25PM +0100, Jamie Gibbons wrote:
> Enable the MPFS mailbox and system controller drivers for use with the
> Icicle kit. These functions are crucial for the board setup functions
> that run in the Icicle board file - mpfs_icicle.c.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
>  board/microchip/mpfs_icicle/Kconfig | 4 ++++
>  1 file changed, 4 insertions(+)

Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>

[PATCH 6/6] board: microchip: mpfs_icicle: update to use system controller

[Jamie Gibbons]

A new system controller driver has been created to make code modular and
improve and clean code. Update and remove functions to account for these
additional drivers.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 board/microchip/mpfs_icicle/mpfs_icicle.c | 72 ++++++++++-------------
 1 file changed, 32 insertions(+), 40 deletions(-)

diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.c b/board/microchip/mpfs_icicle/mpfs_icicle.c
index 19acbbba42b..739a9b6cd76 100644
--- a/board/microchip/mpfs_icicle/mpfs_icicle.c
+++ b/board/microchip/mpfs_icicle/mpfs_icicle.c
@@ -4,55 +4,22 @@
  * Padmarao Begari <padmarao.begari@microchip.com>
  */
 
-#include <dm.h>
-#include <env.h>
-#include <init.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/sections.h>
+#include <dm.h>
+#include <dm/devres.h>
+#include <env.h>
+#include <linux/compat.h>
+#include <mpfs-mailbox.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define MPFS_SYSREG_SOFT_RESET		((unsigned int *)0x20002088)
-#define MPFS_SYS_SERVICE_CR		((unsigned int *)0x37020050)
-#define MPFS_SYS_SERVICE_SR		((unsigned int *)0x37020054)
-#define MPFS_SYS_SERVICE_MAILBOX	((unsigned char *)0x37020800)
-
+#define MPFS_SYSREG_SOFT_RESET	((unsigned int *)0x20002088)
 #define PERIPH_RESET_VALUE		0x1e8u
-#define SERVICE_CR_REQ			0x1u
-#define SERVICE_SR_BUSY			0x2u
 
 static unsigned char mac_addr[6];
 
-static void read_device_serial_number(u8 *response, u8 response_size)
-{
-	u8 idx;
-	u8 *response_buf;
-	unsigned int val;
-
-	response_buf = (u8 *)response;
-
-	writel(SERVICE_CR_REQ, MPFS_SYS_SERVICE_CR);
-	/*
-	 * REQ bit will remain set till the system controller starts
-	 * processing.
-	 */
-	do {
-		val = readl(MPFS_SYS_SERVICE_CR);
-	} while (SERVICE_CR_REQ == (val & SERVICE_CR_REQ));
-
-	/*
-	 * Once system controller starts processing the busy bit will
-	 * go high and service is completed when busy bit is gone low
-	 */
-	do {
-		val = readl(MPFS_SYS_SERVICE_SR);
-	} while (SERVICE_SR_BUSY == (val & SERVICE_SR_BUSY));
-
-	for (idx = 0; idx < response_size; idx++)
-		response_buf[idx] = readb(MPFS_SYS_SERVICE_MAILBOX + idx);
-}
-
 #if defined(CONFIG_MULTI_DTB_FIT)
 int board_fit_config_name_match(const char *name)
 {
@@ -149,8 +116,33 @@ int board_late_init(void)
 	int node;
 	u8 device_serial_number[16] = {0};
 	void *blob = (void *)gd->fdt_blob;
+	struct udevice *dev;
+	struct mpfs_sys_serv *sys_serv_priv;
+
+	ret = uclass_get_device_by_name(UCLASS_MISC, "syscontroller", &dev);
+	if (ret) {
+		debug("%s: system controller setup failed\n", __func__);
+		return ret;
+	}
 
-	read_device_serial_number(device_serial_number, 16);
+	sys_serv_priv = kzalloc(sizeof(*sys_serv_priv), GFP_KERNEL);
+	if (!sys_serv_priv)
+		return -ENOMEM;
+
+	sys_serv_priv->dev = dev;
+
+	sys_serv_priv->sys_controller = mpfs_syscontroller_get(dev);
+	ret = IS_ERR(sys_serv_priv->sys_controller);
+	if (ret) {
+		debug("%s:  Failed to register system controller sub device ret=%d\n", __func__, ret);
+		return -ENODEV;
+	}
+
+	ret = mpfs_syscontroller_read_sernum(sys_serv_priv, device_serial_number);
+	if (ret) {
+		printf("Cannot read device serial number\n");
+		return -EINVAL;
+	}
 
 	/* Update MAC address with device serial number */
 	mac_addr[0] = 0x00;
-- 
2.43.0

Re: [PATCH 6/6] board: microchip: mpfs_icicle: update to use system controller

[Leo Liang]

On Fri, Aug 01, 2025 at 01:36:26PM +0100, Jamie Gibbons wrote:
> A new system controller driver has been created to make code modular and
> improve and clean code. Update and remove functions to account for these
> additional drivers.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
>  board/microchip/mpfs_icicle/mpfs_icicle.c | 72 ++++++++++-------------
>  1 file changed, 32 insertions(+), 40 deletions(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>