From: Yao Zi <ziyao@disroot.org>
To: Uros Stajic <uros.stajic@htecgroup.com>,
"u-boot@lists.denx.de" <u-boot@lists.denx.de>
Cc: Djordje Todorovic <Djordje.Todorovic@htecgroup.com>,
Chao-ying Fu <cfu@mips.com>
Subject: Re: [PATCH v4 02/10] board: boston-riscv: Add initial support for P8700 Boston board
Date: Thu, 9 Oct 2025 10:46:35 +0000 [thread overview]
Message-ID: <aOeSiyNupfNaKqfH@pie> (raw)
In-Reply-To: <20250819103021.1518687-3-uros.stajic@htecgroup.com>
On Tue, Aug 19, 2025 at 10:32:00AM +0000, Uros Stajic wrote:
> From: Chao-ying Fu <cfu@mips.com>
>
> Implement initial board-level support for the P8700 Boston SoC.
>
> Signed-off-by: Chao-ying Fu <cfu@mips.com>
> Signed-off-by: Uros Stajic <uros.stajic@htecgroup.com>
> ---
> arch/riscv/Kconfig | 10 +
> arch/riscv/cpu/p8700/Kconfig | 2 +-
> arch/riscv/dts/Makefile | 1 +
> arch/riscv/dts/boston-p8700.dts | 263 ++++++++++++++++++++++++
> board/mips/boston-riscv/Kconfig | 43 ++++
> board/mips/boston-riscv/MAINTAINERS | 9 +
> board/mips/boston-riscv/Makefile | 8 +
> board/mips/boston-riscv/boston-lcd.h | 20 ++
> board/mips/boston-riscv/boston-regs.h | 38 ++++
> board/mips/boston-riscv/boston-riscv.c | 9 +
> board/mips/boston-riscv/checkboard.c | 43 ++++
> board/mips/boston-riscv/config.mk | 15 ++
> board/mips/boston-riscv/lowlevel_init.S | 18 ++
> board/mips/boston-riscv/reset.c | 15 ++
> configs/boston-p8700_defconfig | 94 +++++++++
> drivers/clk/Kconfig | 2 +-
> include/asm-generic/global_data.h | 5 +
> include/configs/boston-riscv.h | 11 +
> 18 files changed, 604 insertions(+), 2 deletions(-)
> create mode 100644 arch/riscv/dts/boston-p8700.dts
> create mode 100644 board/mips/boston-riscv/Kconfig
> create mode 100644 board/mips/boston-riscv/MAINTAINERS
> create mode 100644 board/mips/boston-riscv/Makefile
> create mode 100644 board/mips/boston-riscv/boston-lcd.h
> create mode 100644 board/mips/boston-riscv/boston-regs.h
> create mode 100644 board/mips/boston-riscv/boston-riscv.c
> create mode 100644 board/mips/boston-riscv/checkboard.c
> create mode 100644 board/mips/boston-riscv/config.mk
> create mode 100644 board/mips/boston-riscv/lowlevel_init.S
> create mode 100644 board/mips/boston-riscv/reset.c
> create mode 100644 configs/boston-p8700_defconfig
> create mode 100644 include/configs/boston-riscv.h
...
> diff --git a/arch/riscv/cpu/p8700/Kconfig b/arch/riscv/cpu/p8700/Kconfig
> index 7023575a6be..0913a6ce8f2 100644
> --- a/arch/riscv/cpu/p8700/Kconfig
> +++ b/arch/riscv/cpu/p8700/Kconfig
> @@ -7,7 +7,7 @@ config P8700_RISCV
> select ARCH_EARLY_INIT_R
> imply CPU
> imply CPU_RISCV
> - imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE)
> + imply RISCV_ACLINT if (RISCV_MMODE || SPL_RISCV_MMODE)
> imply CMD_CPU
> imply SPL_CPU_SUPPORT
> imply SPL_OPENSBI
As mentioned before, this should probably be squashed into PATCH 1.
...
> diff --git a/arch/riscv/dts/boston-p8700.dts b/arch/riscv/dts/boston-p8700.dts
> new file mode 100644
> index 00000000000..5a5c8826318
> --- /dev/null
> +++ b/arch/riscv/dts/boston-p8700.dts
> @@ -0,0 +1,263 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2021, Chao-ying Fu <cfu@mips.com>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/clock/boston-clock.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/mips-gic.h>
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + model = "p8700";
> + compatible = "img,boston";
> +
> + chosen {
> + stdout-path = &uart0;
Per device-tree specification, stdout-path should be a string instead of
a phandle.
A string that specifies the full path to the node representing
the device to be used for boot console output. If the character
“:” is present in the value it terminates the path. The value
may be an alias. If the stdin-path property is not spec-ified,
stdout-path should be assumed to define the input device
> + bootargs = "root=/dev/sda rw earlycon console=ttyS0,115200n8r";
And I don't think it's the appropriate way to pass cmdline arguments.
...
> diff --git a/board/mips/boston-riscv/boston-riscv.c b/board/mips/boston-riscv/boston-riscv.c
> new file mode 100644
> index 00000000000..e5cd6c42cf7
> --- /dev/null
> +++ b/board/mips/boston-riscv/boston-riscv.c
> @@ -0,0 +1,9 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2016 Imagination Technologies
> + */
> +
> +int board_init(void)
> +{
> + return 0;
> +}
You could omit the empty board_init() by set CONFIG_BOARD_INIT to n.
...
> diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
> index 506ee51cdb0..7b25de7bb68 100644
> --- a/include/asm-generic/global_data.h
> +++ b/include/asm-generic/global_data.h
> @@ -702,6 +702,11 @@ enum gd_flags {
> * drivers shall not be called.
> */
> GD_FLG_HAVE_CONSOLE = 0x8000000,
> + /**
> + * @GD_FLG_COHERENT_DMA: DMA is cache-coherent.
> + *
> + */
> + GD_FLG_COHERENT_DMA = 0x10000000,
> };
I don't think it's a flag generic enough to be put in the
platform-independent header. It may sound even more appropriate to add a
private API to indicate whether IO DMA is configured as coherent.
> #endif /* __ASSEMBLY__ */
> diff --git a/include/configs/boston-riscv.h b/include/configs/boston-riscv.h
> new file mode 100644
> index 00000000000..3b3e2567214
> --- /dev/null
> +++ b/include/configs/boston-riscv.h
> @@ -0,0 +1,11 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2021, Chao-ying Fu <cfu@mips.com>
> + */
> +
> +#ifndef __CONFIG_BOSTON_RISCV_H
> +#define __CONFIG_BOSTON_RISCV_H
> +
> +#include <linux/sizes.h>
The header defines nothing for now, so I think the include is
unnecessary, at least in this patch.
> +#endif /* __CONFIG_BOSTON_RISCV_H */
> --
> 2.34.1
Best regards,
Yao Zi
next prev parent reply other threads:[~2025-10-09 10:46 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-19 10:31 [PATCH v4 00/10] riscv: Add support for P8700 platform on Boston board Uros Stajic
2025-08-19 10:31 ` [PATCH v4 01/10] riscv: Add initial support for P8700 SoC Uros Stajic
2025-10-09 10:23 ` Yao Zi
2026-01-13 7:12 ` Uros Stajic
2025-08-19 10:32 ` [PATCH v4 02/10] board: boston-riscv: Add initial support for P8700 Boston board Uros Stajic
2025-10-09 10:46 ` Yao Zi [this message]
2025-08-19 10:32 ` [PATCH v4 03/10] gpio: Add GPIO driver for Intel EG20T Uros Stajic
2025-08-19 10:32 ` [PATCH v4 04/10] pci: xilinx: Avoid writing memory base/limit for root bridge Uros Stajic
2025-08-19 10:32 ` [PATCH v4 05/10] riscv: Add support for MIPS GIC syscon on RISC-V SoCs Uros Stajic
2025-10-09 10:53 ` Yao Zi
2025-08-19 10:33 ` [PATCH v4 06/10] net: pch_gbe: Add PHY reset and MAC address fallback for RISC-V Uros Stajic
2025-08-19 10:33 ` [PATCH v4 07/10] libfdt: Allow non-64b aligned memreserve entries Uros Stajic
2025-08-19 10:33 ` [PATCH v4 08/10] riscv: p8700: Add Coherence Manager (CM) and IOCU support Uros Stajic
2025-08-19 10:34 ` [PATCH v4 09/10] riscv: boston: Add support for LED character display command Uros Stajic
2025-10-09 11:15 ` Yao Zi
2026-01-13 8:19 ` Uros Stajic
2025-08-19 10:34 ` [PATCH v4 10/10] cmd: riscv: Add 'startharts' command to start multiple harts Uros Stajic
2025-10-09 11:43 ` Yao Zi
2026-01-13 8:20 ` Uros Stajic
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