[PATCH] serial: ns16550: make probe clock enabling optional

[PATCH] serial: ns16550: make probe clock enabling optional

[khaliforce]

From: Samuel Holland <samuel@sholland.org>

Some platforms need the UART clock gates enabled before NS16550
register access. This is required by the downstream Allwinner D1
port used on the MangoPi MQ Pro.

Add CONFIG_NS16550_CLK_ENABLE to enable the UART clocks during
probe when explicitly selected by a platform. The option defaults
to disabled, preserving the existing behavior on other platforms.

The clock-enabling code originates from Samuel Holland's D1 work.
This patch makes that behavior optional through Kconfig.

Link: https://github.com/smaeul/u-boot/commit/0617377a2555031f02a459b3451fa33ce53e9b74
Signed-off-by: Samuel Holland <samuel@sholland.org>
Co-developed-by: khaliforce <kforce@gmail.com>
Signed-off-by: khaliforce <kforce@gmail.com>
---
Tested on a MangoPi MQ Pro with the downstream D1 port based on
U-Boot v2026.10:

- With the option enabled, cold boot and warm reboot succeeded
  through SPL, OpenSBI, U-Boot, GRUB and Linux.
- Removing only this patch, without adding diagnostic code,
  resulted in no UART output at all, not even a single character,
  and the board did not become reachable over SSH.

The standalone patch also builds on current upstream main for
RISC-V64, ARM64 and ARM32. An additional RISC-V64 build with CLK and
NS16550_CLK_ENABLE enabled passed.

With the option disabled, the tested ARM64 and ARM32 NS16550
.text sections were unchanged. Checkpatch reports no errors or
warnings.

 drivers/serial/Kconfig   | 7 +++++++
 drivers/serial/ns16550.c | 9 +++++++++
 2 files changed, 16 insertions(+)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ffc58d663ff..4c5400a3816 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -821,6 +821,13 @@ config SYS_NS16550
 	  be used. It can be a constant or a function to get clock, eg,
 	  get_serial_clock().
 
+config NS16550_CLK_ENABLE
+	bool "Enable NS16550 clocks during probe"
+	depends on SYS_NS16550 && DM_SERIAL && CLK
+	help
+	  Enable all UART clocks before register access.
+	  Select this when firmware does not enable the UART clock gates.
+
 config NS16550_DYNAMIC
 	bool "Allow NS16550 to be configured at runtime"
 	depends on SYS_NS16550
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 10271f46aa6..217a7cf7238 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -516,6 +516,15 @@ int ns16550_serial_probe(struct udevice *dev)
 	if (!ret)
 		reset_deassert_bulk(&reset_bulk);
 
+	if (IS_ENABLED(CONFIG_NS16550_CLK_ENABLE) &&
+	    CONFIG_IS_ENABLED(CLK)) {
+		struct clk_bulk clk_bulk;
+
+		ret = clk_get_bulk(dev, &clk_bulk);
+		if (!ret)
+			clk_enable_bulk(&clk_bulk);
+	}
+
 	com_port->plat = dev_get_plat(dev);
 	ns16550_init(com_port, -1);
 

Re: [PATCH] serial: ns16550: make probe clock enabling optional

[Yao Zi]

On Tue, Oct 06, 2026 at 08:14:01PM +0900, khaliforce wrote:
> From: Samuel Holland <samuel@sholland.org>
> 
> Some platforms need the UART clock gates enabled before NS16550
> register access. This is required by the downstream Allwinner D1
> port used on the MangoPi MQ Pro.
> 
> Add CONFIG_NS16550_CLK_ENABLE to enable the UART clocks during
> probe when explicitly selected by a platform. The option defaults
> to disabled, preserving the existing behavior on other platforms.
> 
> The clock-enabling code originates from Samuel Holland's D1 work.
> This patch makes that behavior optional through Kconfig.

I think the appropriate way to model this is introducing
devicetree-compatible-specific behaviors.

> Link: https://github.com/smaeul/u-boot/commit/0617377a2555031f02a459b3451fa33ce53e9b74
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> Co-developed-by: khaliforce <kforce@gmail.com>
> Signed-off-by: khaliforce <kforce@gmail.com>
> ---

Best regards,
Yao Zi

[PATCH v2] serial: ns16550: enable clocks for DesignWare UARTs

[khaliforce]

From: Samuel Holland <samuel@sholland.org>

D1 needs its DesignWare UART clocks enabled before register access.
Select this behavior through the existing snps,dw-apb-uart compatible.
Keep other UART variants unchanged.
Allow fixed-clock devices without a clocks property.
Propagate clock provider and enable errors.

Tested on MangoPi MQ Pro.

Link: https://github.com/smaeul/u-boot/commit/0617377a2555031f02a459b3451fa33ce53e9b74
Suggested-by: Yao Zi <me@ziyao.cc>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Co-developed-by: khaliforce <kforce@gmail.com>
Signed-off-by: khaliforce <kforce@gmail.com>
---
Changes in v2:
- Select clock enabling through snps,dw-apb-uart match data.
- Remove the proposed NS16550_CLK_ENABLE Kconfig option.
- Preserve fixed-clock UARTs without a clocks property.
- Propagate clock provider and enable errors.

Validation:
- U-Boot CI Docker builds pass:
  MQ Pro, RISC-V QEMU, x96q, MQ R, and AM335x EVM.
- QEMU console tests pass:
  ns16550a and snps,dw-apb-uart without clocks.
- MQ Pro UART input/output, clock gate, SD, GRUB, Linux,
  SSH, and repeated boots pass.
- Other physical boards are not tested.

 drivers/serial/ns16550.c | 33 +++++++++++++++++++++++++--------
 1 file changed, 25 insertions(+), 8 deletions(-)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 10271f46aa6..c631d9628ea 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -492,6 +492,14 @@ static int ns16550_serial_assign_base(struct ns16550_plat *plat,
 	return 0;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+enum {
+	PORT_NS16550 = 0,
+	PORT_JZ4780,
+	PORT_DW_APB,
+};
+#endif
+
 int ns16550_serial_probe(struct udevice *dev)
 {
 	struct ns16550_plat *plat = dev_get_plat(dev);
@@ -516,19 +524,28 @@ int ns16550_serial_probe(struct udevice *dev)
 	if (!ret)
 		reset_deassert_bulk(&reset_bulk);
 
+#if CONFIG_IS_ENABLED(OF_REAL)
+	if (CONFIG_IS_ENABLED(CLK) &&
+	    dev_get_driver_data(dev) == PORT_DW_APB) {
+		struct clk_bulk clk_bulk;
+
+		ret = clk_get_bulk(dev, &clk_bulk);
+		if (!ret) {
+			ret = clk_enable_bulk(&clk_bulk);
+			if (ret)
+				return ret;
+		} else if (ret != -ENOENT && ret != -ENOSYS) {
+			return ret;
+		}
+	}
+#endif
+
 	com_port->plat = dev_get_plat(dev);
 	ns16550_init(com_port, -1);
 
 	return 0;
 }
 
-#if CONFIG_IS_ENABLED(OF_CONTROL)
-enum {
-	PORT_NS16550 = 0,
-	PORT_JZ4780,
-};
-#endif
-
 #if CONFIG_IS_ENABLED(OF_REAL)
 int ns16550_serial_of_to_plat(struct udevice *dev)
 {
@@ -598,7 +615,7 @@ static const struct udevice_id ns16550_serial_ids[] = {
 	{ .compatible = "ns16550a",		.data = PORT_NS16550 },
 	{ .compatible = "ingenic,jz4780-uart",	.data = PORT_JZ4780  },
 	{ .compatible = "nvidia,tegra20-uart",	.data = PORT_NS16550 },
-	{ .compatible = "snps,dw-apb-uart",	.data = PORT_NS16550 },
+	{ .compatible = "snps,dw-apb-uart",	.data = PORT_DW_APB },
 	{ .compatible = "intel,xscale-uart",	.data = PORT_NS16550 },
 	{}
 };
-- 
2.53.0