[PATCH] mmc: dwmmc: only clear handled interrupts

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* [PATCH] mmc: dwmmc: only clear handled interrupts
@ 2022-09-15 17:56 ` John Keeping
  2022-09-16  8:20   ` Jerome Forissier
                     ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: John Keeping @ 2022-09-15 17:56 UTC (permalink / raw)
  To: Jaehoon Chung; +Cc: John Keeping, Peng Fan, u-boot

Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:

	mask = dwmci_readl(host, DWMCI_RINTSTS);

	// Hardware asserts DWMCI_INTMSK_DTO here

	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);

	if (mask & DWMCI_INTMSK_DTO) {
		// Unreachable as DTO is cleared without being handled!
		return 0;
	}

Only clear interrupts that we have seen and are handling so that DTO is
not missed.

Signed-off-by: John Keeping <john@metanate.com>
---
 drivers/mmc/dw_mmc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4232c5eb8c..5085a3b491 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -168,7 +168,8 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 			if (data->flags == MMC_DATA_READ &&
 			    (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) {
 				dwmci_writel(host, DWMCI_RINTSTS,
-					     DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO);
+					     mask & (DWMCI_INTMSK_RXDR |
+						     DWMCI_INTMSK_DTO));
 				while (size) {
 					ret = dwmci_fifo_ready(host,
 							DWMCI_FIFO_EMPTY,
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH] mmc: dwmmc: only clear handled interrupts
  2022-09-15 17:56 ` [PATCH] mmc: dwmmc: only clear handled interrupts John Keeping
@ 2022-09-16  8:20   ` Jerome Forissier
  2022-09-16  8:56   ` Quentin Schulz
                     ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Jerome Forissier @ 2022-09-16  8:20 UTC (permalink / raw)
  To: John Keeping, Jaehoon Chung; +Cc: Peng Fan, u-boot



On 9/15/22 19:56, John Keeping wrote:
> Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
> in FIFO mode transfers if events occur in the following order:
> 
> 	mask = dwmci_readl(host, DWMCI_RINTSTS);
> 
> 	// Hardware asserts DWMCI_INTMSK_DTO here
> 
> 	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
> 
> 	if (mask & DWMCI_INTMSK_DTO) {
> 		// Unreachable as DTO is cleared without being handled!
> 		return 0;
> 	}
> 
> Only clear interrupts that we have seen and are handling so that DTO is
> not missed.
> 
> Signed-off-by: John Keeping <john@metanate.com>
> ---
>  drivers/mmc/dw_mmc.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
> index 4232c5eb8c..5085a3b491 100644
> --- a/drivers/mmc/dw_mmc.c
> +++ b/drivers/mmc/dw_mmc.c
> @@ -168,7 +168,8 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
>  			if (data->flags == MMC_DATA_READ &&
>  			    (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) {
>  				dwmci_writel(host, DWMCI_RINTSTS,
> -					     DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO);
> +					     mask & (DWMCI_INTMSK_RXDR |
> +						     DWMCI_INTMSK_DTO));
>  				while (size) {
>  					ret = dwmci_fifo_ready(host,
>  							DWMCI_FIFO_EMPTY,

Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (Rock PI 4B)

Boot logs:

- 2022.04 without this patch:

[...]
U-Boot SPL 2022.04 (Apr 04 2022 - 14:31:32 +0000)

Trying to boot from MMC1

## Checking hash(es) for config config_1 ... sha1,rsa2048:dev+ OK

## Checking hash(es) for Image atf_1 ... sha1+ sha1,rsa2048:dev+ OK

## Checking hash(es) for Image uboot ... sha1+ sha1,rsa2048:dev+ OK

## Checking hash(es) for Image fdt_1 ... sha1+ sha1,rsa2048:dev+ OK

spl_load_simple_fit: can't load image loadables index 1 (ret = -5)

mmc_load_image_raw_sector: mmc block read error


[...]

- 2022.04 with this patch:

[...]
U-Boot SPL 2022.04 (Apr 04 2022 - 14:31:32 +0000)

Trying to boot from MMC1

## Checking hash(es) for config config_1 ... sha1,rsa2048:dev+ OK

## Checking hash(es) for Image atf_1 ... sha1+ sha1,rsa2048:dev+ OK

## Checking hash(es) for Image uboot ... sha1+ sha1,rsa2048:dev+ OK

## Checking hash(es) for Image fdt_1 ... sha1+ sha1,rsa2048:dev+ OK

## Checking hash(es) for Image atf_2 ... sha1+ sha1,rsa2048:dev+ OK

## Checking hash(es) for Image atf_3 ... sha1+ sha1,rsa2048:dev+ OK

## Checking hash(es) for Image atf_4 ... sha1+ sha1,rsa2048:dev+ OK

NOTICE:  BL31: v2.6(debug):v2.6-879-gc3bdd3d3cf-dirty

[...]

Thanks,
-- 
Jerome

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] mmc: dwmmc: only clear handled interrupts
  2022-09-15 17:56 ` [PATCH] mmc: dwmmc: only clear handled interrupts John Keeping
  2022-09-16  8:20   ` Jerome Forissier
@ 2022-09-16  8:56   ` Quentin Schulz
  2022-10-07 12:34   ` Jaehoon Chung
  2022-10-25  0:02   ` Jaehoon Chung
  3 siblings, 0 replies; 5+ messages in thread
From: Quentin Schulz @ 2022-09-16  8:56 UTC (permalink / raw)
  To: John Keeping, Jaehoon Chung; +Cc: Peng Fan, u-boot

Hi John,

On 9/15/22 19:56, John Keeping wrote:
> Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
> in FIFO mode transfers if events occur in the following order:
> 
> 	mask = dwmci_readl(host, DWMCI_RINTSTS);
> 
> 	// Hardware asserts DWMCI_INTMSK_DTO here
> 
> 	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
> 
> 	if (mask & DWMCI_INTMSK_DTO) {
> 		// Unreachable as DTO is cleared without being handled!
> 		return 0;
> 	}
> 
> Only clear interrupts that we have seen and are handling so that DTO is
> not missed.
> 
> Signed-off-by: John Keeping <john@metanate.com>

Awesome! I was having what I thought were stability issues on a board 
I'm bringing up and this fixes the issue. Thanks!

Tested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> 
(PX30-based eMMC+SD, Puma RK3399 eMMC)

Cheers,
Quentin

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] mmc: dwmmc: only clear handled interrupts
  2022-09-15 17:56 ` [PATCH] mmc: dwmmc: only clear handled interrupts John Keeping
  2022-09-16  8:20   ` Jerome Forissier
  2022-09-16  8:56   ` Quentin Schulz
@ 2022-10-07 12:34   ` Jaehoon Chung
  2022-10-25  0:02   ` Jaehoon Chung
  3 siblings, 0 replies; 5+ messages in thread
From: Jaehoon Chung @ 2022-10-07 12:34 UTC (permalink / raw)
  To: John Keeping, Jaehoon Chung; +Cc: Peng Fan, u-boot



On 9/16/22 02:56, John Keeping wrote:
> Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
> in FIFO mode transfers if events occur in the following order:
> 
> 	mask = dwmci_readl(host, DWMCI_RINTSTS);
> 
> 	// Hardware asserts DWMCI_INTMSK_DTO here
> 
> 	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
> 
> 	if (mask & DWMCI_INTMSK_DTO) {
> 		// Unreachable as DTO is cleared without being handled!
> 		return 0;
> 	}
> 
> Only clear interrupts that we have seen and are handling so that DTO is
> not missed.
> 
> Signed-off-by: John Keeping <john@metanate.com>

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Best Regards,
Jaehoon Chung
> ---
>  drivers/mmc/dw_mmc.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
> index 4232c5eb8c..5085a3b491 100644
> --- a/drivers/mmc/dw_mmc.c
> +++ b/drivers/mmc/dw_mmc.c
> @@ -168,7 +168,8 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
>  			if (data->flags == MMC_DATA_READ &&
>  			    (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) {
>  				dwmci_writel(host, DWMCI_RINTSTS,
> -					     DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO);
> +					     mask & (DWMCI_INTMSK_RXDR |
> +						     DWMCI_INTMSK_DTO));
>  				while (size) {
>  					ret = dwmci_fifo_ready(host,
>  							DWMCI_FIFO_EMPTY,

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] mmc: dwmmc: only clear handled interrupts
  2022-09-15 17:56 ` [PATCH] mmc: dwmmc: only clear handled interrupts John Keeping
                     ` (2 preceding siblings ...)
  2022-10-07 12:34   ` Jaehoon Chung
@ 2022-10-25  0:02   ` Jaehoon Chung
  3 siblings, 0 replies; 5+ messages in thread
From: Jaehoon Chung @ 2022-10-25  0:02 UTC (permalink / raw)
  To: John Keeping; +Cc: Peng Fan, u-boot

On 9/16/22 02:56, John Keeping wrote:
> Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
> in FIFO mode transfers if events occur in the following order:
> 
> 	mask = dwmci_readl(host, DWMCI_RINTSTS);
> 
> 	// Hardware asserts DWMCI_INTMSK_DTO here
> 
> 	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
> 
> 	if (mask & DWMCI_INTMSK_DTO) {
> 		// Unreachable as DTO is cleared without being handled!
> 		return 0;
> 	}
> 
> Only clear interrupts that we have seen and are handling so that DTO is
> not missed.
> 
> Signed-off-by: John Keeping <john@metanate.com>
> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (Rock PI 4B)
> Tested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> 
> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Applied to u-boot-mmc. Thanks!

Best Regards,
Jaehoon Chung


> ---
>  drivers/mmc/dw_mmc.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
> index 4232c5eb8c..5085a3b491 100644
> --- a/drivers/mmc/dw_mmc.c
> +++ b/drivers/mmc/dw_mmc.c
> @@ -168,7 +168,8 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
>  			if (data->flags == MMC_DATA_READ &&
>  			    (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) {
>  				dwmci_writel(host, DWMCI_RINTSTS,
> -					     DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO);
> +					     mask & (DWMCI_INTMSK_RXDR |
> +						     DWMCI_INTMSK_DTO));
>  				while (size) {
>  					ret = dwmci_fifo_ready(host,
>  							DWMCI_FIFO_EMPTY,


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2022-10-25  0:02 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2022-09-15 17:56 ` [PATCH] mmc: dwmmc: only clear handled interrupts John Keeping
2022-09-16  8:20   ` Jerome Forissier
2022-09-16  8:56   ` Quentin Schulz
2022-10-07 12:34   ` Jaehoon Chung
2022-10-25  0:02   ` Jaehoon Chung

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