* [PATCH 1/4] ARM: zynq: Add DTSes for mini qspi configurations
2023-10-26 14:04 [PATCH 0/4] xilinx: Add DTSes for mini qspi/ospi configuration Michal Simek
@ 2023-10-26 14:04 ` Michal Simek
2023-10-26 14:04 ` [PATCH 2/4] " Michal Simek
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Michal Simek @ 2023-10-26 14:04 UTC (permalink / raw)
To: u-boot, git
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
Core support for dual-stacked/parallel configuration is here:
https://lore.kernel.org/r/20231020031817.267959-1-venkatesh.abbarapu@amd.com/
---
arch/arm/dts/Makefile | 6 ++++++
arch/arm/dts/zynq-cse-qspi-parallel.dts | 22 ++++++++++++++++++++++
arch/arm/dts/zynq-cse-qspi-stacked.dts | 22 ++++++++++++++++++++++
arch/arm/dts/zynq-cse-qspi-x1-single.dts | 16 ++++++++++++++++
arch/arm/dts/zynq-cse-qspi-x1-stacked.dts | 22 ++++++++++++++++++++++
arch/arm/dts/zynq-cse-qspi-x2-single.dts | 16 ++++++++++++++++
arch/arm/dts/zynq-cse-qspi-x2-stacked.dts | 22 ++++++++++++++++++++++
7 files changed, 126 insertions(+)
create mode 100644 arch/arm/dts/zynq-cse-qspi-parallel.dts
create mode 100644 arch/arm/dts/zynq-cse-qspi-stacked.dts
create mode 100644 arch/arm/dts/zynq-cse-qspi-x1-single.dts
create mode 100644 arch/arm/dts/zynq-cse-qspi-x1-stacked.dts
create mode 100644 arch/arm/dts/zynq-cse-qspi-x2-single.dts
create mode 100644 arch/arm/dts/zynq-cse-qspi-x2-stacked.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 96066a2b6b87..faea47e81bdd 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -372,6 +372,12 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-cse-nand.dtb \
zynq-cse-nor.dtb \
zynq-cse-qspi-single.dtb \
+ zynq-cse-qspi-parallel.dtb \
+ zynq-cse-qspi-stacked.dtb \
+ zynq-cse-qspi-x1-single.dtb \
+ zynq-cse-qspi-x1-stacked.dtb \
+ zynq-cse-qspi-x2-single.dtb \
+ zynq-cse-qspi-x2-stacked.dtb \
zynq-dlc20-rev1.0.dtb \
zynq-microzed.dtb \
zynq-minized.dtb \
diff --git a/arch/arm/dts/zynq-cse-qspi-parallel.dts b/arch/arm/dts/zynq-cse-qspi-parallel.dts
new file mode 100644
index 000000000000..afa6348cf595
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-qspi-parallel.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE QSPI Quad Parallel DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynq-cse-qspi.dtsi"
+
+/ {
+ model = "Zynq CSE QSPI PARALLEL Board";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */
+ spi-rx-bus-width = <4>;
+};
diff --git a/arch/arm/dts/zynq-cse-qspi-stacked.dts b/arch/arm/dts/zynq-cse-qspi-stacked.dts
new file mode 100644
index 000000000000..47859f7ea84c
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-qspi-stacked.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE QSPI Quad Stacked DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynq-cse-qspi.dtsi"
+
+/ {
+ model = "Zynq CSE QSPI STACKED Board";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */
+ spi-rx-bus-width = <4>;
+};
diff --git a/arch/arm/dts/zynq-cse-qspi-x1-single.dts b/arch/arm/dts/zynq-cse-qspi-x1-single.dts
new file mode 100644
index 000000000000..c14fb422b7fd
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-qspi-x1-single.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE QSPI x1 Single DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynq-cse-qspi.dtsi"
+
+/ {
+ model = "Zynq CSE QSPI X1 SINGLE Board";
+};
+
+&flash0 {
+ spi-rx-bus-width = <1>;
+};
diff --git a/arch/arm/dts/zynq-cse-qspi-x1-stacked.dts b/arch/arm/dts/zynq-cse-qspi-x1-stacked.dts
new file mode 100644
index 000000000000..0f4d414a2534
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-qspi-x1-stacked.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE QSPI x1 Stacked DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynq-cse-qspi.dtsi"
+
+/ {
+ model = "Zynq CSE QSPI X1 STACKED Board";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */
+ spi-rx-bus-width = <1>;
+};
diff --git a/arch/arm/dts/zynq-cse-qspi-x2-single.dts b/arch/arm/dts/zynq-cse-qspi-x2-single.dts
new file mode 100644
index 000000000000..11be06385da2
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-qspi-x2-single.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE QSPI x2 Single DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynq-cse-qspi.dtsi"
+
+/ {
+ model = "Zynq CSE QSPI X2 SINGLE Board";
+};
+
+&flash0 {
+ spi-rx-bus-width = <2>;
+};
diff --git a/arch/arm/dts/zynq-cse-qspi-x2-stacked.dts b/arch/arm/dts/zynq-cse-qspi-x2-stacked.dts
new file mode 100644
index 000000000000..d1b42e9269bc
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-qspi-x2-stacked.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE QSPI x2 Stacked DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynq-cse-qspi.dtsi"
+
+/ {
+ model = "Zynq CSE QSPI X2 STACKED Board";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */
+ spi-rx-bus-width = <2>;
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/4] ARM: zynq: Add DTSes for mini qspi configurations
2023-10-26 14:04 [PATCH 0/4] xilinx: Add DTSes for mini qspi/ospi configuration Michal Simek
2023-10-26 14:04 ` [PATCH 1/4] ARM: zynq: Add DTSes for mini qspi configurations Michal Simek
@ 2023-10-26 14:04 ` Michal Simek
2023-10-26 14:04 ` [PATCH 3/4] arm64: versal: Add DTSes for mini qspi/ospi configuration Michal Simek
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Michal Simek @ 2023-10-26 14:04 UTC (permalink / raw)
To: u-boot, git
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
Core support for dual-stacked/parallel configuration is here:
https://lore.kernel.org/r/20231020031817.267959-1-venkatesh.abbarapu@amd.com/
---
arch/arm/dts/Makefile | 7 ++++++
arch/arm/dts/zynqmp-mini-qspi-parallel.dts | 21 ++++++++++++++++++
arch/arm/dts/zynqmp-mini-qspi-single.dts | 12 ++++++++++
arch/arm/dts/zynqmp-mini-qspi-stacked.dts | 21 ++++++++++++++++++
arch/arm/dts/zynqmp-mini-qspi-x1-single.dts | 17 +++++++++++++++
arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts | 23 ++++++++++++++++++++
arch/arm/dts/zynqmp-mini-qspi-x2-single.dts | 17 +++++++++++++++
arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts | 23 ++++++++++++++++++++
8 files changed, 141 insertions(+)
create mode 100644 arch/arm/dts/zynqmp-mini-qspi-parallel.dts
create mode 100644 arch/arm/dts/zynqmp-mini-qspi-single.dts
create mode 100644 arch/arm/dts/zynqmp-mini-qspi-stacked.dts
create mode 100644 arch/arm/dts/zynqmp-mini-qspi-x1-single.dts
create mode 100644 arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts
create mode 100644 arch/arm/dts/zynqmp-mini-qspi-x2-single.dts
create mode 100644 arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index faea47e81bdd..6a2f9cb20645 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -419,6 +419,13 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-emmc1.dtb \
zynqmp-mini-nand.dtb \
zynqmp-mini-qspi.dtb \
+ zynqmp-mini-qspi-parallel.dtb \
+ zynqmp-mini-qspi-single.dtb \
+ zynqmp-mini-qspi-stacked.dtb \
+ zynqmp-mini-qspi-x1-single.dtb \
+ zynqmp-mini-qspi-x1-stacked.dtb \
+ zynqmp-mini-qspi-x2-single.dtb \
+ zynqmp-mini-qspi-x2-stacked.dtb \
zynqmp-sc-revB.dtb \
zynqmp-sc-revC.dtb \
zynqmp-sc-vek280-revA.dtbo \
diff --git a/arch/arm/dts/zynqmp-mini-qspi-parallel.dts b/arch/arm/dts/zynqmp-mini-qspi-parallel.dts
new file mode 100644
index 000000000000..728e8223de4d
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-qspi-parallel.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx ZynqMP QSPI Quad Parallel DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynqmp-mini-qspi.dts"
+
+/ {
+ model = "ZynqMP MINI QSPI PARALLEL";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ parallel-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */
+};
diff --git a/arch/arm/dts/zynqmp-mini-qspi-single.dts b/arch/arm/dts/zynqmp-mini-qspi-single.dts
new file mode 100644
index 000000000000..0f9306e988c1
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-qspi-single.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx ZynqMP QSPI single DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynqmp-mini-qspi.dts"
+
+/ {
+ model = "ZynqMP MINI QSPI SINGLE";
+};
diff --git a/arch/arm/dts/zynqmp-mini-qspi-stacked.dts b/arch/arm/dts/zynqmp-mini-qspi-stacked.dts
new file mode 100644
index 000000000000..9a9541b0b619
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-qspi-stacked.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx ZynqMP QSPI Quad Stacked DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynqmp-mini-qspi.dts"
+
+/ {
+ model = "ZynqMP MINI QSPI STACKED";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */
+};
diff --git a/arch/arm/dts/zynqmp-mini-qspi-x1-single.dts b/arch/arm/dts/zynqmp-mini-qspi-x1-single.dts
new file mode 100644
index 000000000000..5af875cc7198
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-qspi-x1-single.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx ZynqMP QSPI x1 Single DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynqmp-mini-qspi.dts"
+
+/ {
+ model = "ZynqMP MINI QSPI X1 SINGLE";
+};
+
+&flash0 {
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+};
diff --git a/arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts b/arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts
new file mode 100644
index 000000000000..ebf890e0ae90
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx ZynqMP QSPI x1 Stacked DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynqmp-mini-qspi.dts"
+
+/ {
+ model = "ZynqMP MINI QSPI X1 STACKED";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+};
diff --git a/arch/arm/dts/zynqmp-mini-qspi-x2-single.dts b/arch/arm/dts/zynqmp-mini-qspi-x2-single.dts
new file mode 100644
index 000000000000..a5ab31583ecb
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-qspi-x2-single.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE QSPI x2 Single DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynqmp-mini-qspi.dts"
+
+/ {
+ model = "ZynqMP MINI QSPI X2 SINGLE";
+};
+
+&flash0 {
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+};
diff --git a/arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts b/arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts
new file mode 100644
index 000000000000..e234b76f2529
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx ZynqMP QSPI x2 Stacked DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynqmp-mini-qspi.dts"
+
+/ {
+ model = "ZynqMP MINI QSPI X2 STACKED";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 3/4] arm64: versal: Add DTSes for mini qspi/ospi configuration
2023-10-26 14:04 [PATCH 0/4] xilinx: Add DTSes for mini qspi/ospi configuration Michal Simek
2023-10-26 14:04 ` [PATCH 1/4] ARM: zynq: Add DTSes for mini qspi configurations Michal Simek
2023-10-26 14:04 ` [PATCH 2/4] " Michal Simek
@ 2023-10-26 14:04 ` Michal Simek
2023-10-26 14:04 ` [PATCH 4/4] arm64: versal-net: " Michal Simek
2023-11-06 12:43 ` [PATCH 0/4] xilinx: " Michal Simek
4 siblings, 0 replies; 6+ messages in thread
From: Michal Simek @ 2023-10-26 14:04 UTC (permalink / raw)
To: u-boot, git
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
Support for dual-stacked/parallel configuration is here:
https://lore.kernel.org/r/20231020031817.267959-1-venkatesh.abbarapu@amd.com/
---
arch/arm/dts/Makefile | 7 ++++++
arch/arm/dts/versal-mini-ospi-stacked.dts | 22 +++++++++++++++++++
arch/arm/dts/versal-mini-qspi-parallel.dts | 22 +++++++++++++++++++
arch/arm/dts/versal-mini-qspi-stacked.dts | 22 +++++++++++++++++++
arch/arm/dts/versal-mini-qspi-x1-single.dts | 17 +++++++++++++++
arch/arm/dts/versal-mini-qspi-x1-stacked.dts | 23 ++++++++++++++++++++
arch/arm/dts/versal-mini-qspi-x2-single.dts | 17 +++++++++++++++
arch/arm/dts/versal-mini-qspi-x2-stacked.dts | 23 ++++++++++++++++++++
8 files changed, 153 insertions(+)
create mode 100644 arch/arm/dts/versal-mini-ospi-stacked.dts
create mode 100644 arch/arm/dts/versal-mini-qspi-parallel.dts
create mode 100644 arch/arm/dts/versal-mini-qspi-stacked.dts
create mode 100644 arch/arm/dts/versal-mini-qspi-x1-single.dts
create mode 100644 arch/arm/dts/versal-mini-qspi-x1-stacked.dts
create mode 100644 arch/arm/dts/versal-mini-qspi-x2-single.dts
create mode 100644 arch/arm/dts/versal-mini-qspi-x2-stacked.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6a2f9cb20645..16161ed78d0c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -476,7 +476,14 @@ dtb-$(CONFIG_ARCH_VERSAL) += \
versal-mini-emmc0.dtb \
versal-mini-emmc1.dtb \
versal-mini-ospi-single.dtb \
+ versal-mini-ospi-stacked.dtb \
+ versal-mini-qspi-parallel.dtb \
versal-mini-qspi-single.dtb \
+ versal-mini-qspi-stacked.dtb \
+ versal-mini-qspi-x1-single.dtb \
+ versal-mini-qspi-x1-stacked.dtb \
+ versal-mini-qspi-x2-single.dtb \
+ versal-mini-qspi-x2-stacked.dtb \
xilinx-versal-virt.dtb
dtb-$(CONFIG_ARCH_VERSAL_NET) += \
versal-net-mini.dtb \
diff --git a/arch/arm/dts/versal-mini-ospi-stacked.dts b/arch/arm/dts/versal-mini-ospi-stacked.dts
new file mode 100644
index 000000000000..f46125da7165
--- /dev/null
+++ b/arch/arm/dts/versal-mini-ospi-stacked.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal QSPI Quad Stacked DTS
+ *
+ * Copyright (C) 2018-2020 Xilinx, Inc.
+ */
+
+#include "versal-mini-ospi.dtsi"
+
+/ {
+ model = "Xilinx Versal MINI OSPI STACKED";
+};
+
+&ospi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-rx-bus-width = <8>;
+};
diff --git a/arch/arm/dts/versal-mini-qspi-parallel.dts b/arch/arm/dts/versal-mini-qspi-parallel.dts
new file mode 100644
index 000000000000..8485cda35298
--- /dev/null
+++ b/arch/arm/dts/versal-mini-qspi-parallel.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal QSPI Quad Parallel DTS
+ *
+ * Copyright (C) 2018-2019 Xilinx, Inc.
+ */
+
+#include "versal-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal MINI QSPI PARALLEL";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-rx-bus-width = <4>;
+};
diff --git a/arch/arm/dts/versal-mini-qspi-stacked.dts b/arch/arm/dts/versal-mini-qspi-stacked.dts
new file mode 100644
index 000000000000..54d42775e089
--- /dev/null
+++ b/arch/arm/dts/versal-mini-qspi-stacked.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal QSPI Quad Stacked DTS
+ *
+ * Copyright (C) 2018-2019 Xilinx, Inc.
+ */
+
+#include "versal-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal MINI QSPI STACKED";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-rx-bus-width = <4>;
+};
diff --git a/arch/arm/dts/versal-mini-qspi-x1-single.dts b/arch/arm/dts/versal-mini-qspi-x1-single.dts
new file mode 100644
index 000000000000..4d459a197892
--- /dev/null
+++ b/arch/arm/dts/versal-mini-qspi-x1-single.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal QSPI x1 Single DTS
+ *
+ * Copyright (C) 2018-2019 Xilinx, Inc.
+ */
+
+#include "versal-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal MINI QSPI X1 SINGLE";
+};
+
+&flash0 {
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+};
diff --git a/arch/arm/dts/versal-mini-qspi-x1-stacked.dts b/arch/arm/dts/versal-mini-qspi-x1-stacked.dts
new file mode 100644
index 000000000000..905dc773405d
--- /dev/null
+++ b/arch/arm/dts/versal-mini-qspi-x1-stacked.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal QSPI x1 Stacked DTS
+ *
+ * Copyright (C) 2018-2019 Xilinx, Inc.
+ */
+
+#include "versal-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal MINI QSPI X1 STACKED";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+};
diff --git a/arch/arm/dts/versal-mini-qspi-x2-single.dts b/arch/arm/dts/versal-mini-qspi-x2-single.dts
new file mode 100644
index 000000000000..d25ad7c77807
--- /dev/null
+++ b/arch/arm/dts/versal-mini-qspi-x2-single.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal QSPI x2 Single DTS
+ *
+ * Copyright (C) 2018-2019 Xilinx, Inc.
+ */
+
+#include "versal-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal MINI QSPI X2 SINGLE";
+};
+
+&flash0 {
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+};
diff --git a/arch/arm/dts/versal-mini-qspi-x2-stacked.dts b/arch/arm/dts/versal-mini-qspi-x2-stacked.dts
new file mode 100644
index 000000000000..0c9e740c7284
--- /dev/null
+++ b/arch/arm/dts/versal-mini-qspi-x2-stacked.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal QSPI x2 Stacked DTS
+ *
+ * Copyright (C) 2018-2019 Xilinx, Inc.
+ */
+
+#include "versal-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal MINI QSPI X2 STACKED";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 4/4] arm64: versal-net: Add DTSes for mini qspi/ospi configuration
2023-10-26 14:04 [PATCH 0/4] xilinx: Add DTSes for mini qspi/ospi configuration Michal Simek
` (2 preceding siblings ...)
2023-10-26 14:04 ` [PATCH 3/4] arm64: versal: Add DTSes for mini qspi/ospi configuration Michal Simek
@ 2023-10-26 14:04 ` Michal Simek
2023-11-06 12:43 ` [PATCH 0/4] xilinx: " Michal Simek
4 siblings, 0 replies; 6+ messages in thread
From: Michal Simek @ 2023-10-26 14:04 UTC (permalink / raw)
To: u-boot, git
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
Support for dual-stacked/parallel configuration is here:
https://lore.kernel.org/r/20231020031817.267959-1-venkatesh.abbarapu@amd.com/
---
arch/arm/dts/Makefile | 7 ++++++
arch/arm/dts/versal-net-mini-ospi-stacked.dts | 22 ++++++++++++++++++
.../arm/dts/versal-net-mini-qspi-parallel.dts | 22 ++++++++++++++++++
arch/arm/dts/versal-net-mini-qspi-stacked.dts | 22 ++++++++++++++++++
.../dts/versal-net-mini-qspi-x1-single.dts | 17 ++++++++++++++
.../dts/versal-net-mini-qspi-x1-stacked.dts | 23 +++++++++++++++++++
.../dts/versal-net-mini-qspi-x2-single.dts | 17 ++++++++++++++
.../dts/versal-net-mini-qspi-x2-stacked.dts | 23 +++++++++++++++++++
8 files changed, 153 insertions(+)
create mode 100644 arch/arm/dts/versal-net-mini-ospi-stacked.dts
create mode 100644 arch/arm/dts/versal-net-mini-qspi-parallel.dts
create mode 100644 arch/arm/dts/versal-net-mini-qspi-stacked.dts
create mode 100644 arch/arm/dts/versal-net-mini-qspi-x1-single.dts
create mode 100644 arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts
create mode 100644 arch/arm/dts/versal-net-mini-qspi-x2-single.dts
create mode 100644 arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 16161ed78d0c..ef6baf4907e9 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -489,7 +489,14 @@ dtb-$(CONFIG_ARCH_VERSAL_NET) += \
versal-net-mini.dtb \
versal-net-mini-emmc.dtb \
versal-net-mini-ospi-single.dtb \
+ versal-net-mini-ospi-stacked.dtb \
versal-net-mini-qspi-single.dtb \
+ versal-net-mini-qspi-parallel.dtb \
+ versal-net-mini-qspi-stacked.dtb \
+ versal-net-mini-qspi-x1-single.dtb \
+ versal-net-mini-qspi-x1-stacked.dtb \
+ versal-net-mini-qspi-x2-single.dtb \
+ versal-net-mini-qspi-x2-stacked.dtb \
xilinx-versal-net-virt.dtb
dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
zynqmp-r5.dtb
diff --git a/arch/arm/dts/versal-net-mini-ospi-stacked.dts b/arch/arm/dts/versal-net-mini-ospi-stacked.dts
new file mode 100644
index 000000000000..4bc954a18334
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-ospi-stacked.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET OSPI Quad Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-ospi.dtsi"
+
+/ {
+ model = "Xilinx Versal NET MINI OSPI STACKED";
+};
+
+&ospi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-rx-bus-width = <8>;
+};
diff --git a/arch/arm/dts/versal-net-mini-qspi-parallel.dts b/arch/arm/dts/versal-net-mini-qspi-parallel.dts
new file mode 100644
index 000000000000..edc231160946
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-parallel.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI Quad Parallel DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal NET MINI QSPI PARALLEL";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-rx-bus-width = <4>;
+};
diff --git a/arch/arm/dts/versal-net-mini-qspi-stacked.dts b/arch/arm/dts/versal-net-mini-qspi-stacked.dts
new file mode 100644
index 000000000000..920eed2f8c5d
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-stacked.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI Quad Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal NET MINI QSPI STACKED";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-rx-bus-width = <4>;
+};
diff --git a/arch/arm/dts/versal-net-mini-qspi-x1-single.dts b/arch/arm/dts/versal-net-mini-qspi-x1-single.dts
new file mode 100644
index 000000000000..856c79c3c002
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-x1-single.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x1 Single DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal NET MINI QSPI X1 SINGLE";
+};
+
+&flash0 {
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+};
diff --git a/arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts b/arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts
new file mode 100644
index 000000000000..5f74d98ad618
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x1 Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal NET MINI QSPI X1 STACKED";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+};
diff --git a/arch/arm/dts/versal-net-mini-qspi-x2-single.dts b/arch/arm/dts/versal-net-mini-qspi-x2-single.dts
new file mode 100644
index 000000000000..6ceaa244e68a
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-x2-single.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x2 Single DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal NET MINI QSPI X2 SINGLE";
+};
+
+&flash0 {
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+};
diff --git a/arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts b/arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts
new file mode 100644
index 000000000000..5f4d0b550590
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x2 Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal NET MINI QSPI X2 STACKED";
+};
+
+&qspi {
+ num-cs = <2>;
+};
+
+&flash0 {
+ reg = <0>, <1>;
+ stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 0/4] xilinx: Add DTSes for mini qspi/ospi configuration
2023-10-26 14:04 [PATCH 0/4] xilinx: Add DTSes for mini qspi/ospi configuration Michal Simek
` (3 preceding siblings ...)
2023-10-26 14:04 ` [PATCH 4/4] arm64: versal-net: " Michal Simek
@ 2023-11-06 12:43 ` Michal Simek
4 siblings, 0 replies; 6+ messages in thread
From: Michal Simek @ 2023-11-06 12:43 UTC (permalink / raw)
To: u-boot, git
On 10/26/23 16:04, Michal Simek wrote:
> Hi,
>
> we are using U-Boot mini configurations for years. We already upstream
> configurations for mtest, single qspi/ospi or emmcs for all Xilinx SOCs.
> But we didn't push configuration for different qspi/ospi configurations
> which were missing upstream dt description. This has changed some time ago
> by:
> https://lore.kernel.org/all/20220126112608.955728-3-miquel.raynal@bootlin.com/
>
> and we are also pushing support for it in core here:
> https://lore.kernel.org/all/20231020031817.267959-1-venkatesh.abbarapu@amd.com/
>
> that's why it is good time to also upstream description for these
> configurations. Functionality depends on core changes but description
> itself is independent of it.
>
> Thanks,
> Michal
>
>
> Michal Simek (4):
> ARM: zynq: Add DTSes for mini qspi configurations
> ARM: zynq: Add DTSes for mini qspi configurations
> arm64: versal: Add DTSes for mini qspi/ospi configuration
> arm64: versal-net: Add DTSes for mini qspi/ospi configuration
>
> arch/arm/dts/Makefile | 27 +++++++++++++++++++
> arch/arm/dts/versal-mini-ospi-stacked.dts | 22 +++++++++++++++
> arch/arm/dts/versal-mini-qspi-parallel.dts | 22 +++++++++++++++
> arch/arm/dts/versal-mini-qspi-stacked.dts | 22 +++++++++++++++
> arch/arm/dts/versal-mini-qspi-x1-single.dts | 17 ++++++++++++
> arch/arm/dts/versal-mini-qspi-x1-stacked.dts | 23 ++++++++++++++++
> arch/arm/dts/versal-mini-qspi-x2-single.dts | 17 ++++++++++++
> arch/arm/dts/versal-mini-qspi-x2-stacked.dts | 23 ++++++++++++++++
> arch/arm/dts/versal-net-mini-ospi-stacked.dts | 22 +++++++++++++++
> .../arm/dts/versal-net-mini-qspi-parallel.dts | 22 +++++++++++++++
> arch/arm/dts/versal-net-mini-qspi-stacked.dts | 22 +++++++++++++++
> .../dts/versal-net-mini-qspi-x1-single.dts | 17 ++++++++++++
> .../dts/versal-net-mini-qspi-x1-stacked.dts | 23 ++++++++++++++++
> .../dts/versal-net-mini-qspi-x2-single.dts | 17 ++++++++++++
> .../dts/versal-net-mini-qspi-x2-stacked.dts | 23 ++++++++++++++++
> arch/arm/dts/zynq-cse-qspi-parallel.dts | 22 +++++++++++++++
> arch/arm/dts/zynq-cse-qspi-stacked.dts | 22 +++++++++++++++
> arch/arm/dts/zynq-cse-qspi-x1-single.dts | 16 +++++++++++
> arch/arm/dts/zynq-cse-qspi-x1-stacked.dts | 22 +++++++++++++++
> arch/arm/dts/zynq-cse-qspi-x2-single.dts | 16 +++++++++++
> arch/arm/dts/zynq-cse-qspi-x2-stacked.dts | 22 +++++++++++++++
> arch/arm/dts/zynqmp-mini-qspi-parallel.dts | 21 +++++++++++++++
> arch/arm/dts/zynqmp-mini-qspi-single.dts | 12 +++++++++
> arch/arm/dts/zynqmp-mini-qspi-stacked.dts | 21 +++++++++++++++
> arch/arm/dts/zynqmp-mini-qspi-x1-single.dts | 17 ++++++++++++
> arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts | 23 ++++++++++++++++
> arch/arm/dts/zynqmp-mini-qspi-x2-single.dts | 17 ++++++++++++
> arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts | 23 ++++++++++++++++
> 28 files changed, 573 insertions(+)
> create mode 100644 arch/arm/dts/versal-mini-ospi-stacked.dts
> create mode 100644 arch/arm/dts/versal-mini-qspi-parallel.dts
> create mode 100644 arch/arm/dts/versal-mini-qspi-stacked.dts
> create mode 100644 arch/arm/dts/versal-mini-qspi-x1-single.dts
> create mode 100644 arch/arm/dts/versal-mini-qspi-x1-stacked.dts
> create mode 100644 arch/arm/dts/versal-mini-qspi-x2-single.dts
> create mode 100644 arch/arm/dts/versal-mini-qspi-x2-stacked.dts
> create mode 100644 arch/arm/dts/versal-net-mini-ospi-stacked.dts
> create mode 100644 arch/arm/dts/versal-net-mini-qspi-parallel.dts
> create mode 100644 arch/arm/dts/versal-net-mini-qspi-stacked.dts
> create mode 100644 arch/arm/dts/versal-net-mini-qspi-x1-single.dts
> create mode 100644 arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts
> create mode 100644 arch/arm/dts/versal-net-mini-qspi-x2-single.dts
> create mode 100644 arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts
> create mode 100644 arch/arm/dts/zynq-cse-qspi-parallel.dts
> create mode 100644 arch/arm/dts/zynq-cse-qspi-stacked.dts
> create mode 100644 arch/arm/dts/zynq-cse-qspi-x1-single.dts
> create mode 100644 arch/arm/dts/zynq-cse-qspi-x1-stacked.dts
> create mode 100644 arch/arm/dts/zynq-cse-qspi-x2-single.dts
> create mode 100644 arch/arm/dts/zynq-cse-qspi-x2-stacked.dts
> create mode 100644 arch/arm/dts/zynqmp-mini-qspi-parallel.dts
> create mode 100644 arch/arm/dts/zynqmp-mini-qspi-single.dts
> create mode 100644 arch/arm/dts/zynqmp-mini-qspi-stacked.dts
> create mode 100644 arch/arm/dts/zynqmp-mini-qspi-x1-single.dts
> create mode 100644 arch/arm/dts/zynqmp-mini-qspi-x1-stacked.dts
> create mode 100644 arch/arm/dts/zynqmp-mini-qspi-x2-single.dts
> create mode 100644 arch/arm/dts/zynqmp-mini-qspi-x2-stacked.dts
>
Applied.
M
^ permalink raw reply [flat|nested] 6+ messages in thread