[PATCH v2 0/3] Fixes for parent rate lookup of mediatek clk driver

[PATCH v2 0/3] Fixes for parent rate lookup of mediatek clk driver

[Weijie Gao]

This patch series aims to fix a clk issue that breaks all MediaTek Filogic
platforms where flash device can't be initialized correctly.

Sam Shih (3):
  clk: mediatek: remove redundant forward declarations
  clk: mediatek: add grandparent variable in mtk_find_parent_rate()
  clk: mediatek: fix parent rate lookup for fixed PLL clocks

 drivers/clk/mediatek/clk-mtk.c | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

-- 
2.45.2

[PATCH v2 1/3] clk: mediatek: remove redundant forward declarations

[Weijie Gao]

From: Sam Shih <sam.shih@mediatek.com>

The clk_ops structures (mtk_clk_apmixedsys_ops, mtk_clk_topckgen_ops,
mtk_clk_infrasys_ops) are already declared with extern in clk-mtk.h,
which is included by this file. The forward declarations in clk-mtk.c
are therefore redundant and can be removed.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
 drivers/clk/mediatek/clk-mtk.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 3557aeac3d5..4adec4457b4 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -204,10 +204,6 @@ static ulong mtk_clk_find_parent_rate(struct clk *clk, int id,
 	return clk_get_rate(&parent);
 }
 
-const struct clk_ops mtk_clk_apmixedsys_ops;
-const struct clk_ops mtk_clk_topckgen_ops;
-const struct clk_ops mtk_clk_infrasys_ops;
-
 static ulong mtk_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk,
 				  const int parent, u16 flags)
 {
-- 
2.45.2

[PATCH v2 2/3] clk: mediatek: add grandparent variable in mtk_find_parent_rate()

[Weijie Gao]

From: Sam Shih <sam.shih@mediatek.com>

Add grandparent device variable in mtk_find_parent_rate() to allow
the grandparent device being reused instead of calling
dev_get_parent(priv->parent) multiple times.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
 drivers/clk/mediatek/clk-mtk.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 4adec4457b4..f974f0f2432 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -216,11 +216,14 @@ static ulong mtk_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk,
 			parent_dev = clk->dev;
 		else if (dev_get_driver_ops(priv->parent) == &mtk_clk_apmixedsys_ops)
 			parent_dev = priv->parent;
-		else if (dev_get_driver_ops(dev_get_parent(priv->parent)) == &mtk_clk_apmixedsys_ops)
-			parent_dev = dev_get_parent(priv->parent);
-		else
-			return -EINVAL;
+		else {
+			struct udevice *grandparent_dev = dev_get_parent(priv->parent);
 
+			if (dev_get_driver_ops(grandparent_dev) == &mtk_clk_apmixedsys_ops)
+				parent_dev = grandparent_dev;
+			else
+				return -EINVAL;
+		}
 		break;
 	case CLK_PARENT_TOPCKGEN:
 		if (dev_get_driver_ops(clk->dev) == &mtk_clk_topckgen_ops)
-- 
2.45.2

[PATCH v2 3/3] clk: mediatek: fix parent rate lookup for fixed PLL clocks

[Weijie Gao]

From: Sam Shih <sam.shih@mediatek.com>

The refactoring in commit 00d0ff7f81bf ("clk: mediatek: refactor parent
rate lookup functions") introduced a regression where fixed PLL clocks
using mtk_clk_fixed_pll_ops are not properly recognized as valid parents
in the CLK_PARENT_APMIXED case.

Fixed PLL clocks are implemented using mtk_clk_fixed_pll_ops instead of
mtk_clk_apmixedsys_ops, but they can also serve as parent clocks in the
APMIXED domain. The parent lookup function needs to check for both
driver ops to properly resolve the parent clock device.

Add mtk_clk_fixed_pll_ops checks alongside mtk_clk_apmixedsys_ops checks
in mtk_find_parent_rate() to restore support for fixed PLL parent clocks.

Also refactor the grandparent lookup code to extract the repeated
dev_get_parent(priv->parent) call into a local variable to keep lines
under 100 characters and pass checkpatch validation.

Fixes: 00d0ff7f81bf ("clk: mediatek: refactor parent rate lookup functions")
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
 drivers/clk/mediatek/clk-mtk.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index f974f0f2432..d209bc5eb47 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -212,14 +212,17 @@ static ulong mtk_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk,
 	switch (flags & CLK_PARENT_MASK) {
 	case CLK_PARENT_APMIXED:
 		/* APMIXEDSYS can be parent or grandparent. */
-		if (dev_get_driver_ops(clk->dev) == &mtk_clk_apmixedsys_ops)
+		if (dev_get_driver_ops(clk->dev) == &mtk_clk_apmixedsys_ops ||
+		    dev_get_driver_ops(clk->dev) == &mtk_clk_fixed_pll_ops) {
 			parent_dev = clk->dev;
-		else if (dev_get_driver_ops(priv->parent) == &mtk_clk_apmixedsys_ops)
+		} else if (dev_get_driver_ops(priv->parent) == &mtk_clk_apmixedsys_ops ||
+			dev_get_driver_ops(priv->parent) == &mtk_clk_fixed_pll_ops) {
 			parent_dev = priv->parent;
-		else {
+		} else {
 			struct udevice *grandparent_dev = dev_get_parent(priv->parent);
 
-			if (dev_get_driver_ops(grandparent_dev) == &mtk_clk_apmixedsys_ops)
+			if (dev_get_driver_ops(grandparent_dev) == &mtk_clk_apmixedsys_ops ||
+			    dev_get_driver_ops(grandparent_dev) == &mtk_clk_fixed_pll_ops)
 				parent_dev = grandparent_dev;
 			else
 				return -EINVAL;
-- 
2.45.2

Re: [PATCH v2 0/3] Fixes for parent rate lookup of mediatek clk driver

[David Lechner]

On Thu, 16 Apr 2026 16:22:51 +0800, Weijie Gao wrote:
> Fixes for parent rate lookup of mediatek clk driver
> 
> This patch series aims to fix a clk issue that breaks all MediaTek Filogic
> platforms where flash device can't be initialized correctly.
> 
> Sam Shih (3):
>   clk: mediatek: remove redundant forward declarations
>   clk: mediatek: add grandparent variable in mtk_find_parent_rate()
>   clk: mediatek: fix parent rate lookup for fixed PLL clocks
> 
> [...]

Applied to mediatek-for-master, thanks!

Note that, in general, fixes should be applied before other changes. Please keep
that in mind for future submissions. I reversed the order of the commits when
applying them, so no need to rebase and resend this time.

[3/3] clk: mediatek: fix parent rate lookup for fixed PLL clocks
      commit: 1b7e79b6a62a5529b77fee886b2f9fbe702c6a44
[2/3] clk: mediatek: add grandparent variable in mtk_find_parent_rate()
      commit: ff981dbb0b5210792ec8db00c5ace5616e20e11a
[1/3] clk: mediatek: remove redundant forward declarations
      commit: adf707f65b02c742761120a7203512486d8ed1d8

Best regards,
-- 
David Lechner <dlechner@baylibre.com>