From: Eugen Hristev <eugen.hristev@linaro.org>
To: Manikandan Muralidharan <manikandan.m@microchip.com>,
Lukasz Majewski <lukma@denx.de>,
seanga2@gmail.com, varshini.rajendran@microchip.com,
Ryan.Wanner@microchip.com,
balamanikandan.gunasundar@microchip.com,
romain.sioen@microchip.com, u-boot@lists.denx.de
Subject: Re: [PATCH 1/2] clk: at91: Add ACR in all PLL setting.
Date: Tue, 21 Oct 2025 18:18:49 +0300 [thread overview]
Message-ID: <e7c19dda-8530-44db-9dbb-8119eeca2e93@linaro.org> (raw)
In-Reply-To: <20250923095818.441917-1-manikandan.m@microchip.com>
On 9/23/25 12:58, Manikandan Muralidharan wrote:
> Add ACR in all PLL setting. Add correct ACR value for each PLL used in
> different SoCs.
>
> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
Applied both to u-boot-at91/master , thanks !
prev parent reply other threads:[~2025-10-21 15:18 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-23 9:58 [PATCH 1/2] clk: at91: Add ACR in all PLL setting Manikandan Muralidharan
2025-09-23 9:58 ` [PATCH 2/2] ARM: at91: remove default values for PMC_PLL_ACR Manikandan Muralidharan
2025-10-21 15:18 ` Eugen Hristev [this message]
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