* [PATCH v7 1/6] rockchip: scripts: remove rkmux.py
2026-08-15 13:05 [PATCH v7 0/6] doc: clean up README.rockchip Johan Jonker
@ 2026-08-15 13:07 ` Johan Jonker
2026-08-15 13:07 ` [PATCH v7 2/6] rockchip: doc: add mask ROM mode text Johan Jonker
` (4 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Johan Jonker @ 2026-08-15 13:07 UTC (permalink / raw)
To: u-boot; +Cc: kever.yang, sjg, trini, u-boot, eddie.cai.linux
It's not U-Boot's core business to host a script
to create enums from datasheets where it's unknown
that it has ever been used for any Rockchip SoCs sold
after rk3288. We don't need it to compile, so remove this
relict from the past.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
---
MAINTAINERS | 1 -
doc/README.rockchip | 7 --
scripts/pylint.base | 1 -
tools/rkmux.py | 218 --------------------------------------------
4 files changed, 227 deletions(-)
delete mode 100755 tools/rkmux.py
diff --git a/MAINTAINERS b/MAINTAINERS
index 86ab813aee4b..6dad4875a495 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -538,7 +538,6 @@ F: drivers/spi/rk_spi.[ch]
F: tools/rkcommon.c
F: tools/rkcommon.h
F: tools/rkimage.c
-F: tools/rkmux.py
F: tools/rksd.c
F: tools/rkspi.c
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 96fa49d697bc..5a608ed0bce3 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -651,13 +651,6 @@ SPI flash.
See above for instructions on how to write a SPI image.
-rkmux.py
---------
-
-You can use this script to create #defines for SoC register access. See the
-script for usage.
-
-
Device tree and driver model
----------------------------
diff --git a/scripts/pylint.base b/scripts/pylint.base
index bc39e2385a31..a0a473b6d998 100644
--- a/scripts/pylint.base
+++ b/scripts/pylint.base
@@ -298,7 +298,6 @@ tools_patman_status 8.52
tools_patman_test_checkpatch 8.51
tools_patman_test_settings 8.78
tools_qconfig 9.79
-tools_rkmux 7.10
tools_rmboard 8.06
tools_u_bootlib___init__.py 0.00
tools_u_bootlib___main__.py 7.78
diff --git a/tools/rkmux.py b/tools/rkmux.py
deleted file mode 100755
index 1226ee201c3b..000000000000
--- a/tools/rkmux.py
+++ /dev/null
@@ -1,218 +0,0 @@
-#!/usr/bin/env python3
-
-# Script to create enums from datasheet register tables
-#
-# Usage:
-#
-# First, create a text file from the datasheet:
-# pdftotext -layout /path/to/rockchip-3288-trm.pdf /tmp/asc
-#
-# Then use this script to output the #defines for a particular register:
-# ./tools/rkmux.py GRF_GPIO4C_IOMUX
-#
-# It will create output suitable for putting in a header file, with SHIFT and
-# MASK values for each bitfield in the register.
-#
-# Note: this tool is not perfect and you may need to edit the resulting code.
-# But it should speed up the process.
-
-import csv
-import re
-import sys
-
-tab_to_col = 3
-
-class RegField:
- def __init__(self, cols=None):
- if cols:
- self.bits, self.attr, self.reset_val, self.desc = (
- [x.strip() for x in cols])
- self.desc = [self.desc]
- else:
- self.bits = ''
- self.attr = ''
- self.reset_val = ''
- self.desc = []
-
- def Setup(self, cols):
- self.bits, self.attr, self.reset_val = cols[0:3]
- if len(cols) > 3:
- self.desc.append(cols[3])
-
- def AddDesc(self, desc):
- self.desc.append(desc)
-
- def Show(self):
- print(self)
- print()
- self.__init__()
-
- def __str__(self):
- return '%s,%s,%s,%s' % (self.bits, self.attr, self.reset_val,
- '\n'.join(self.desc))
-
-class Printer:
- def __init__(self, name):
- self.first = True
- self.name = name
- self.re_sel = re.compile("[1-9]'b([01]+): (.*)")
-
- def __enter__(self):
- return self
-
- def __exit__(self, type, value, traceback):
- if not self.first:
- self.output_footer()
-
- def output_header(self):
- print('/* %s */' % self.name)
- print('enum {')
-
- def output_footer(self):
- print('};');
-
- def output_regfield(self, regfield):
- lines = regfield.desc
- field = lines[0]
- #print 'field:', field
- if field in ['reserved', 'reserve', 'write_enable', 'write_mask']:
- return
- if field.endswith('_sel') or field.endswith('_con'):
- field = field[:-4]
- elif field.endswith(' iomux'):
- field = field[:-6]
- elif field.endswith('_mode') or field.endswith('_mask'):
- field = field[:-5]
- #else:
- #print 'bad field %s' % field
- #return
- field = field.upper()
- if ':' in regfield.bits:
- bit_high, bit_low = [int(x) for x in regfield.bits.split(':')]
- else:
- bit_high = bit_low = int(regfield.bits)
- bit_width = bit_high - bit_low + 1
- mask = (1 << bit_width) - 1
- if self.first:
- self.first = False
- self.output_header()
- else:
- print()
- out_enum(field, 'shift', bit_low)
- out_enum(field, 'mask', mask)
- next_val = -1
- #print 'lines: %s', lines
- for line in lines:
- m = self.re_sel.match(line)
- if m:
- val, enum = int(m.group(1), 2), m.group(2)
- if enum not in ['reserved', 'reserve']:
- out_enum(field, enum, val, val == next_val)
- next_val = val + 1
-
-
-def process_file(name, fd):
- field = RegField()
- reg = ''
-
- fields = []
-
- def add_it(field):
- if field.bits:
- if reg == name:
- fields.append(field)
- field = RegField()
- return field
-
- def is_field_start(line):
- if '=' in line or '+' in line:
- return False
- if (line.startswith('gpio') or line.startswith('peri_') or
- line.endswith('_sel') or line.endswith('_con')):
- return True
- if not ' ' in line: # and '_' in line:
- return True
- return False
-
- for line in fd:
- line = line.rstrip()
- if line[:4] in ['GRF_', 'PMU_', 'CRU_']:
- field = add_it(field)
- reg = line
- do_this = name == reg
- elif not line or not line.startswith(' '):
- continue
- line = line.replace('\xe2\x80\x99', "'")
- leading = len(line) - len(line.lstrip())
- line = line.lstrip()
- cols = re.split(' *', line, 3)
- if leading > 15 or (len(cols) > 3 and is_field_start(cols[3])):
- if is_field_start(line):
- field = add_it(field)
- field.AddDesc(line)
- else:
- if cols[0] == 'Bit' or len(cols) < 3:
- continue
- #print
- #print field
- field = add_it(field)
- field.Setup(cols)
- field = add_it(field)
-
- with Printer(name) as printer:
- for field in fields:
- #print field
- printer.output_regfield(field)
- #print
-
-def out_enum(field, suffix, value, skip_val=False):
- str = '%s_%s' % (field.upper(), suffix.upper())
- if not skip_val:
- tabs = tab_to_col - len(str) / 8
- if value > 9:
- val_str = '%#x' % value
- else:
- val_str = '%d' % value
-
- str += '%s= %s' % ('\t' * tabs, val_str)
- print('\t%s,' % str)
-
-# Process a CSV file, e.g. from tabula
-def process_csv(name, fd):
- reader = csv.reader(fd)
-
- rows = []
-
- field = RegField()
- for row in reader:
- #print field.desc
- if not row[0]:
- field.desc.append(row[3])
- continue
- if field.bits:
- if field.bits != 'Bit':
- rows.append(field)
- #print row
- field = RegField(row)
-
- with Printer(name) as printer:
- for row in rows:
- #print field
- printer.output_regfield(row)
- #print
-
-fname = sys.argv[1]
-name = sys.argv[2]
-
-# Read output from pdftotext -layout
-if 1:
- with open(fname, 'r') as fd:
- process_file(name, fd)
-
-# Use tabula
-# It seems to be better at outputting text for an entire cell in one cell.
-# But it does not always work. E.g. GRF_GPIO7CH_IOMUX.
-# So there is no point in using it.
-if 0:
- with open(fname, 'r') as fd:
- process_csv(name, fd)
--
2.39.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v7 2/6] rockchip: doc: add mask ROM mode text
2026-08-15 13:05 [PATCH v7 0/6] doc: clean up README.rockchip Johan Jonker
2026-08-15 13:07 ` [PATCH v7 1/6] rockchip: scripts: remove rkmux.py Johan Jonker
@ 2026-08-15 13:07 ` Johan Jonker
2026-08-19 12:16 ` Quentin Schulz
2026-08-15 13:08 ` [PATCH v7 3/6] rockchip: doc: remove TODO Johan Jonker
` (3 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Johan Jonker @ 2026-08-15 13:07 UTC (permalink / raw)
To: u-boot; +Cc: kever.yang, sjg, trini, u-boot, eddie.cai.linux
Add text that explains how to get into mask ROM mode.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
Changed V6:
BootROM/Mask ROM swap
Changed V5:
reword
---
doc/board/rockchip/rockchip.rst | 31 ++++++++++++++++++++++++++-----
1 file changed, 26 insertions(+), 5 deletions(-)
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index de2df3046e28..7c911662b840 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -325,6 +325,27 @@ To build rk3588 boards:
make evb-rk3588_defconfig
make CROSS_COMPILE=aarch64-linux-gnu-
+Mask ROM mode
+-------------
+
+Mask ROM mode is the fallback mode of the boot ROM,
+in which it listens for USB commands 0x471/0x472.
+
+Options to get your board into Mask ROM mode:
+
+* Hold the recovery button, depending on firmware support or wiring,
+ while booting the board.
+* Remove any SD cards, removable eMMC or removable UFS modules.
+* Erase any storage media containing boot firmware.
+
+Methods of last resort (USE AT YOUR OWN RISK):
+
+Short the following pins briefly while powering the board, so the boot ROM
+cannot locate any boot firmware and falls back into Mask ROM mode:
+
+* NAND: connect pin 8 and 9 of the NAND flash with a needle.
+* eMMC: connect the clock line to ground.
+
Flashing
--------
@@ -443,8 +464,8 @@ Note:
3. Package the RK3066 image with U-Boot TPL/SPL on NAND
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-Unlike later SoC models the rk3066 BootROM doesn't have SDMMC support.
-If all other boot options fail then it enters into a BootROM mode on the USB OTG port.
+Unlike later SoC models the rk3066 boot ROM doesn't have SDMMC support.
+If all other boot options fail then it enters into a Mask ROM mode on the USB OTG port.
This method loads TPL/SPL on NAND with U-Boot and kernel on SD card.
SD Card
@@ -485,10 +506,10 @@ To write a U-Boot image to the SD card (assumed to be /dev/sda):
NAND
""""
-Bring device in BootROM mode:
+Bring device in Mask ROM mode:
-If bricked and no BootROM mode shows up then connect pin 8 and 9 of the NAND flash
-with a needle while reconnecting to the USB OTG port to a PC.
+If bricked and no Mask ROM mode shows up then connect pin 8 and 9
+of the NAND flash briefly with a needle while powering the board.
Show connected devices with:
--
2.39.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v7 3/6] rockchip: doc: remove TODO
2026-08-15 13:05 [PATCH v7 0/6] doc: clean up README.rockchip Johan Jonker
2026-08-15 13:07 ` [PATCH v7 1/6] rockchip: scripts: remove rkmux.py Johan Jonker
2026-08-15 13:07 ` [PATCH v7 2/6] rockchip: doc: add mask ROM mode text Johan Jonker
@ 2026-08-15 13:08 ` Johan Jonker
2026-08-15 13:08 ` [PATCH v7 4/6] rockchip: doc: remove README.rockchip Johan Jonker
` (2 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Johan Jonker @ 2026-08-15 13:08 UTC (permalink / raw)
To: u-boot; +Cc: kever.yang, sjg, trini, u-boot, eddie.cai.linux
Don't try to guess the future consensus. And don't add
a TODO if you don't have the intent to send an immediate
follow up. Remove the TODO in a constantly changing document.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
---
doc/board/rockchip/rockchip.rst | 7 -------
1 file changed, 7 deletions(-)
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 7c911662b840..5e16e860bfd5 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -559,13 +559,6 @@ config-flash.ini:
[OUTPUT]
PATH=RK30xxLoader_uboot.bin
-TODO
-----
-
-- Add Rockchip idbloader image building
-- Add Rockchip TPL image building
-- Document SPI flash boot
-- Add missing SoC's with it boards list
.. Jagan Teki <jagan@amarulasolutions.com>
.. Wednesday 28 October 2020 06:47:26 PM IST
--
2.39.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v7 4/6] rockchip: doc: remove README.rockchip
2026-08-15 13:05 [PATCH v7 0/6] doc: clean up README.rockchip Johan Jonker
` (2 preceding siblings ...)
2026-08-15 13:08 ` [PATCH v7 3/6] rockchip: doc: remove TODO Johan Jonker
@ 2026-08-15 13:08 ` Johan Jonker
2026-08-15 13:08 ` [PATCH v7 5/6] rockchip: doc: add back to ROM section Johan Jonker
2026-08-15 13:08 ` [PATCH v7 6/6] rockchip: doc: add notes section Johan Jonker
5 siblings, 0 replies; 12+ messages in thread
From: Johan Jonker @ 2026-08-15 13:08 UTC (permalink / raw)
To: u-boot; +Cc: kever.yang, sjg, trini, u-boot, eddie.cai.linux
Remove README.rockchip for info that's already in
rockchip.rst or no longer applicable.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
Changed V6:
squashed V5 patches 5, 6, 7 and 8 with this one
reword rkimage comment section
---
doc/README.rockchip | 677 --------------------------------------------
doc/README.rockusb | 1 -
tools/rkimage.c | 5 +-
tools/rksd.c | 2 -
tools/rkspi.c | 2 -
5 files changed, 4 insertions(+), 683 deletions(-)
delete mode 100644 doc/README.rockchip
diff --git a/doc/README.rockchip b/doc/README.rockchip
deleted file mode 100644
index 5a608ed0bce3..000000000000
--- a/doc/README.rockchip
+++ /dev/null
@@ -1,677 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2015 Google. Inc
-# Written by Simon Glass <sjg@chromium.org>
-
-U-Boot on Rockchip
-==================
-
-A wide range of Rockchip SoCs are supported in mainline U-Boot
-
-Warning
-=======
-This document is being moved to doc/board/rockchip, so information on it
-might be incomplete or outdated.
-
-Prerequisites
-=============
-
-You will need:
-
- - Firefly RK3288 board or something else with a supported RockChip SoC
- - Power connection to 5V using the supplied micro-USB power cable
- - Separate USB serial cable attached to your computer and the Firefly
- (connect to the micro-USB connector below the logo)
- - rkflashtool [3]
- - openssl (sudo apt-get install openssl)
- - Serial UART connection [4]
- - Suitable ARM cross compiler, e.g.:
- sudo apt-get install gcc-4.7-arm-linux-gnueabi
-
-Building
-========
-
-1. To build RK3288 board:
-
- CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
-
- (or you can use another cross compiler if you prefer)
-
-2. To build RK3308 board:
-
- See doc/board/rockchip/rockchip.rst
-
-3. To build RK3399 board:
-
- Option 1: Package the image with Rockchip miniloader:
-
- - Compile U-Boot
-
- => cd /path/to/u-boot
- => make nanopi-neo4-rk3399_defconfig
- => make
-
- - Get the rkbin
-
- => git clone https://github.com/rockchip-linux/rkbin.git
-
- - Create trust.img
-
- => cd /path/to/rkbin
- => ./tools/trust_merger RKTRUST/RK3399TRUST.ini
-
- - Create uboot.img
-
- => cd /path/to/rkbin
- => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img
-
- (Get trust.img and uboot.img)
-
- Option 2: Package the image with SPL:
-
- - Export cross compiler path for aarch64
-
- - Compile ATF
-
- => git clone https://github.com/TrustedFirmware-A/trusted-firmware-a.git
- => cd trusted-firmware-a
-
- (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-)
- => make realclean
- => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399
-
- (export bl31.elf)
- => export BL31=/path/to/trusted-firmware-a/build/rk3399/release/bl31/bl31.elf
-
- - Compile PMU M0 firmware
-
- This is optional for most of the rk3399 boards.
-
- => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git
- => cd rk3399-cortex-m0
-
- (export cross compiler path for Cortex-M0 PMU)
- => make CROSS_COMPILE=arm-cortex_m0-eabi-
-
- (export rk3399m0.bin)
- => export PMUM0=/path/to/rk3399-cortex-m0/rk3399m0.bin
-
- - Compile U-Boot
-
- => cd /path/to/u-boot
- => make orangepi-rk3399_defconfig
- => make
-
- (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get
- spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL
-
- If TPL enabled on the target, get tpl/u-boot-tpl-dtb.bin or tpl/u-boot-tpl.bin
- if CONFIG_TPL_OF_CONTROL not enabled)
-
-Writing to the board with USB
-=============================
-
-For USB to work you must get your board into ROM boot mode, either by erasing
-your MMC or (perhaps) holding the recovery button when you boot the board.
-To erase your MMC, you can boot into Linux and type (as root)
-
- dd if=/dev/zero of=/dev/mmcblk0 bs=1M
-
-Connect your board's OTG port to your computer.
-
-To create a suitable image and write it to the board:
-
- ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
- ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
- cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
-
-If all goes well you should something like:
-
- U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
- Card did not respond to voltage select!
- spl: mmc init failed with error: -17
- ### ERROR ### Please RESET the board ###
-
-You will need to reset the board before each time you try. Yes, that's all
-it does so far. If support for the Rockchip USB protocol or DFU were added
-in SPL then we could in principle load U-Boot and boot to a prompt from USB
-as several other platforms do. However it does not seem to be possible to
-use the existing boot ROM code from SPL.
-
-
-Writing to the eMMC with USB on ROC-RK3308-CC
-=============================================
-For USB to work you must get your board into Bootrom mode,
-either by erasing the eMMC or short circuit the GND and D0
-on core board.
-
-Connect the board to your computer via tyepc.
-=> rkdeveloptool db rk3308_loader_v1.26.117.bin
-=> rkdeveloptool wl 0x40 idbloader.img
-=> rkdeveloptool wl 0x4000 u-boot.itb
-=> rkdeveloptool rd
-
-Then you will see the boot log from Debug UART at baud rate 1500000:
-DDR Version V1.26
-REGFB: 0x00000032, 0x00000032
-In
-589MHz
-DDR3
- Col=10 Bank=8 Row=14 Size=256MB
-msch:1
-Returning to boot ROM...
-
-U-Boot SPL 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:04 +0800)
-Trying to boot from MMC1
-INFO: Preloader serial: 2
-NOTICE: BL31: v1.3(release):30f1405
-NOTICE: BL31: Built : 17:08:28, Sep 23 2019
-INFO: Lastlog: last=0x100000, realtime=0x102000, size=0x2000
-INFO: ARM GICv2 driver initialized
-INFO: Using opteed sec cpu_context!
-INFO: boot cpu mask: 1
-INFO: plat_rockchip_pmu_init: pd status 0xe b
-INFO: BL31: Initializing runtime services
-WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will rK
-ERROR: Error initializing runtime service opteed_fast
-INFO: BL31: Preparing for EL3 exit to normal world
-INFO: Entry point address = 0x600000
-INFO: SPSR = 0x3c9
-
-
-U-Boot 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:47 +0800)
-
-Model: Firefly ROC-RK3308-CC board
-DRAM: 254 MiB
-MMC: dwmmc@ff480000: 0, dwmmc@ff490000: 1
-rockchip_dnl_key_pressed read adc key val failed
-Net: No ethernet found.
-Hit any key to stop autoboot: 0
-Card did not respond to voltage select!
-switch to partitions #0, OK
-mmc1(part 0) is current device
-Scanning mmc 1:4...
-Found /extlinux/extlinux.conf
-Retrieving file: /extlinux/extlinux.conf
-151 bytes read in 3 ms (48.8 KiB/s)
-1: kernel-mainline
-Retrieving file: /Image
-14737920 bytes read in 377 ms (37.3 MiB/s)
-append: earlycon=uart8250,mmio32,0xff0c0000 console=ttyS2,1500000n8
-Retrieving file: /rk3308-roc-cc.dtb
-28954 bytes read in 4 ms (6.9 MiB/s)
-Flattened Device Tree blob at 01f00000
-Booting using the fdt blob at 0x1f00000
-## Loading Device Tree to 000000000df3a000, end 000000000df44119 ... OK
-
-Starting kernel ...
-[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd042]
-[ 0.000000] Linux version 5.4.0-rc1-00040-g4dc2d508fa47-dirty (andy@B150) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-209
-[ 0.000000] Machine model: Firefly ROC-RK3308-CC board
-[ 0.000000] earlycon: uart8250 at MMIO32 0x00000000ff0c0000 (options '')
-[ 0.000000] printk: bootconsole [uart8250] enabled
-
-Booting from an SD card
-=======================
-
-To write an image that boots from an SD card (assumed to be /dev/sdc):
-
- ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
- firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
- sudo dd if=out of=/dev/sdc seek=64 && \
- sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
-
-This puts the Rockchip header and SPL image first and then places the U-Boot
-image at block 16384 (i.e. 8MB from the start of the SD card). This
-corresponds with this setting in U-Boot:
-
- #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x4000
-
-Put this SD (or micro-SD) card into your board and reset it. You should see
-something like:
-
- U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
-
- Model: Radxa Rock 2 Square
- DRAM: 2 GiB
- MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
- *** Warning - bad CRC, using default environment
-
- In: serial
- Out: vop@ff940000.vidconsole
- Err: serial
- Net: Net Initialization Skipped
- No ethernet found.
- Hit any key to stop autoboot: 0
- =>
-
-The rockchip bootrom can load and boot an initial spl, then continue to
-load a second-stage bootloader (ie. U-Boot) as soon as the control is returned
-to the bootrom. Both the RK3288 and the RK3036 use this special boot sequence.
-The configuration option enabling this is:
-
- CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
-
-You can create the image via the following operations:
-
- ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
- firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
- cat firefly-rk3288/u-boot-dtb.bin >> out && \
- sudo dd if=out of=/dev/sdc seek=64
-
-Or:
- ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
- firefly-rk3288/spl/u-boot-spl-dtb.bin:firefly-rk3288/u-boot-dtb.bin \
- out && \
- sudo dd if=out of=/dev/sdc seek=64
-
-If you have an HDMI cable attached you should see a video console.
-
-For evb_rk3036 board:
- ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
- cat evb-rk3036/u-boot-dtb.bin >> out && \
- sudo dd if=out of=/dev/sdc seek=64
-
-Or:
- ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d \
- evb-rk3036/spl/u-boot-spl.bin:evb-rk3036/u-boot-dtb.bin out && \
- sudo dd if=out of=/dev/sdc seek=64
-
-Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
- debug uart must be disabled
-
-
-Booting from an SD card on RK3288 with TPL
-==========================================
-
-Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add
-new SPL features like Falcon mode or etc.
-
-So introduce TPL so-that adding new features to SPL is possible because now TPL should
-run minimal with code like DDR, clock etc and rest of new features in SPL.
-
-As of now TPL is added on Vyasa-RK3288 board.
-
-To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
-
- sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64 &&
- sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384
-
-Booting from an SD card on RK3188
-=================================
-
-For rk3188 boards the general storage onto the card stays the same as
-described above, but the image creation needs a bit more care.
-
-The bootrom of rk3188 expects to find a small 1kb loader which returns
-control to the bootrom, after which it will load the real loader, which
-can then be up to 29kb in size and does the regular ddr init. This is
-handled by a single image (built as the SPL stage) that tests whether
-it is handled for the first or second time via code executed from the
-boot0-hook.
-
-Additionally the rk3188 requires everything the bootrom loads to be
-rc4-encrypted. Except for the very first stage the bootrom always reads
-and decodes 2kb pages, so files should be sized accordingly.
-
-# copy tpl, pad to 1020 bytes and append spl
-tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out
-
-# truncate, encode and append u-boot.bin
-truncate -s %2048 u-boot.bin
-cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out
-
-Booting from an SD card on Pine64 Rock64 (RK3328)
-=================================================
-
-For Rock64 rk3328 board the following three parts are required:
-TPL, SPL, and the u-boot image tree blob.
-
- - Write TPL/SPL image at 64 sector
-
- => sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64
-
- - Write u-boot image tree blob at 16384 sector
-
- => sudo dd if=u-boot.itb of=/dev/mmcblk0 seek=16384
-
-Booting from an SD card on RK3399
-=================================
-
-To write an image that boots from an SD card (assumed to be /dev/sdc):
-
-Option 1: Package the image with Rockchip miniloader:
-
- - Create idbloader.img
-
- => cd /path/to/u-boot
- => ./tools/mkimage -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img
- => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img
-
- - Write idbloader.img at 64 sector
-
- => sudo dd if=idbloader.img of=/dev/sdc seek=64
-
- - Write trust.img at 24576
-
- => sudo dd if=trust.img of=/dev/sdc seek=24576
-
- - Write uboot.img at 16384 sector
-
- => sudo dd if=uboot.img of=/dev/sdc seek=16384
- => sync
-
-Put this SD (or micro-SD) card into your board and reset it. You should see
-something like:
-
-DDR Version 1.20 20190314
-In
-Channel 0: DDR3, 933MHz
-Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
-no stride
-ch 0 ddrconfig = 0x101, ddrsize = 0x20
-pmugrf_os_reg[2] = 0x10006281, stride = 0x17
-OUT
-Boot1: 2019-03-14, version: 1.19
-CPUId = 0x0
-ChipType = 0x10, 239
-mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
-mmc: ERROR: Card did not respond to voltage select!
-emmc reinit
-mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
-mmc: ERROR: Card did not respond to voltage select!
-emmc reinit
-mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
-mmc: ERROR: Card did not respond to voltage select!
-SdmmcInit=2 1
-mmc0:cmd5,20
-SdmmcInit=0 0
-BootCapSize=0
-UserCapSize=60543MB
-FwPartOffset=2000 , 0
-StorageInit ok = 45266
-SecureMode = 0
-SecureInit read PBA: 0x4
-SecureInit read PBA: 0x404
-SecureInit read PBA: 0x804
-SecureInit read PBA: 0xc04
-SecureInit read PBA: 0x1004
-SecureInit read PBA: 0x1404
-SecureInit read PBA: 0x1804
-SecureInit read PBA: 0x1c04
-SecureInit ret = 0, SecureMode = 0
-atags_set_bootdev: ret:(0)
-GPT 0x3380ec0 signature is wrong
-recovery gpt...
-GPT 0x3380ec0 signature is wrong
-recovery gpt fail!
-LoadTrust Addr:0x4000
-No find bl30.bin
-Load uboot, ReadLba = 2000
-hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35,
-
-Load OK, addr=0x200000, size=0x9c9c0
-RunBL31 0x10000
-NOTICE: BL31: v1.3(debug):370ab80
-NOTICE: BL31: Built : 09:23:41, Mar 4 2019
-NOTICE: BL31: Rockchip release version: v1.1
-INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
-INFO: Using opteed sec cpu_context!
-INFO: boot cpu mask: 0
-INFO: plat_rockchip_pmu_init(1181): pd status 3e
-INFO: BL31: Initializing runtime services
-INFO: BL31: Initializing BL32
-INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64)
-
-INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
-
-INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
-INFO: BL31: Preparing for EL3 exit to normal world
-INFO: Entry point address = 0x200000
-INFO: SPSR = 0x3c9
-
-
-U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530)
-
-Model: FriendlyARM NanoPi NEO4
-DRAM: 1022 MiB
-MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
-Loading Environment from MMC... *** Warning - bad CRC, using default environment
-
-In: serial@ff1a0000
-Out: serial@ff1a0000
-Err: serial@ff1a0000
-Model: FriendlyARM NanoPi NEO4
-Net: eth0: ethernet@fe300000
-Hit any key to stop autoboot: 0
-=>
-
-Option 2: Package the image with SPL:
-
- - Prefix rk3399 header to SPL image
-
- => cd /path/to/u-boot
- => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out
-
- - Write prefixed SPL at 64th sector
-
- => sudo dd if=out of=/dev/sdc seek=64
-
- - Write U-Boot proper at 16384 sector
-
- => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
- => sync
-
-Put this SD (or micro-SD) card into your board and reset it. You should see
-something like:
-
-U-Boot SPL board init
-Trying to boot from MMC1
-
-
-U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530)
-
-Model: Orange Pi RK3399 Board
-DRAM: 2 GiB
-MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
-Loading Environment from MMC... OK
-In: serial@ff1a0000
-Out: serial@ff1a0000
-Err: serial@ff1a0000
-Model: Orange Pi RK3399 Board
-Net: eth0: ethernet@fe300000
-Hit any key to stop autoboot: 0
-=>
-
-Option 3: Package the image with TPL:
-
- - Write tpl+spl at 64th sector
-
- => sudo dd if=idbloader.img of=/dev/sdc seek=64
-
- - Write U-Boot proper at 16384 sector
-
- => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
- => sync
-
-Put this SD (or micro-SD) card into your board and reset it. You should see
-something like:
-
-U-Boot TPL board init
-Trying to boot from BOOTROM
-Returning to boot ROM...
-
-U-Boot SPL board init
-Trying to boot from MMC1
-
-
-U-Boot 2019.07-rc1-00241-g5b3244767a (May 08 2019 - 10:51:06 +0530)
-
-Model: Orange Pi RK3399 Board
-DRAM: 2 GiB
-MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
-Loading Environment from MMC... OK
-In: serial@ff1a0000
-Out: serial@ff1a0000
-Err: serial@ff1a0000
-Model: Orange Pi RK3399 Board
-Net: eth0: ethernet@fe300000
-Hit any key to stop autoboot: 0
-=>
-
-Using fastboot on rk3288
-========================
-- Write GPT partition layout to mmc device which fastboot want to use it to
-store the image
-
- => gpt write mmc 1 $partitions
-
-- Invoke fastboot command to prepare
-
- => fastboot 1
-
-- Start fastboot request on PC
-
- fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
-
-You should see something like:
-
- => fastboot 1
- WARNING: unknown variable: partition-type:loader
- Starting download of 357796 bytes
- ..
- downloading of 357796 bytes finished
- Flashing Raw Image
- ........ wrote 357888 bytes to 'loader'
-
-Booting from SPI
-================
-
-To write an image that boots from SPI flash (e.g. for the Haier Chromebook or
-Bob):
-
- ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
- -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
- dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
- cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
- dd if=out.bin of=out.bin.pad bs=4M conv=sync
-
-This converts the SPL image to the required SPI format by adding the Rockchip
-header and skipping every second 2KB block. Then the U-Boot image is written at
-offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
-The position of U-Boot is controlled with this setting in U-Boot:
-
- #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
-
-If you have a Dediprog em100pro connected then you can write the image with:
-
- sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
-
-When booting you should see something like:
-
- U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
-
-
- U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
-
- Model: Google Jerry
- DRAM: 2 GiB
- MMC:
- Using default environment
-
- In: serial@ff690000
- Out: serial@ff690000
- Err: serial@ff690000
- =>
-
-Future work
-===========
-
-Immediate priorities are:
-
-- USB host
-- USB device
-- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
-- NAND flash
-- Boot U-Boot proper over USB OTG (at present only SPL works)
-
-
-Development Notes
-=================
-
-There are plenty of patches in the links below to help with this work.
-
-[1] https://github.com/rkchrome/uboot.git
-[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
-[3] https://github.com/linux-rockchip/rkflashtool.git
-[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
-
-rkimage
--------
-
-rkimage.c produces an SPL image suitable for sending directly to the boot ROM
-over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
-followed by u-boot-spl-dtb.bin.
-
-The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
-starts at 0xff700000 and extends to 0xff718000 where we put the stack.
-
-rksd
-----
-
-rksd.c produces an image consisting of 32KB of empty space, a header and
-u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
-most of the fields are unused by U-Boot. We just need to specify the
-signature, a flag and the block offset and size of the SPL image.
-
-The header occupies a single block but we pad it out to 4 blocks. The header
-is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
-image can be encoded too but we don't do that.
-
-The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
-or 0x40 blocks. This is a severe and annoying limitation. There may be a way
-around this limitation, since there is plenty of SRAM, but at present the
-board refuses to boot if this limit is exceeded.
-
-The image produced is padded up to a block boundary (512 bytes). It should be
-written to the start of an SD card using dd.
-
-Since this image is set to load U-Boot from the SD card at block offset,
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
-u-boot-dtb.img to the SD card at that offset. See above for instructions.
-
-rkspi
------
-
-rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
-resulting image is then spread out so that only the first 2KB of each 4KB
-sector is used. The header is the same as with rksd and the maximum size is
-also 32KB (before spreading). The image should be written to the start of
-SPI flash.
-
-See above for instructions on how to write a SPI image.
-
-Device tree and driver model
-----------------------------
-
-Where possible driver model is used to provide a structure to the
-functionality. Device tree is used for configuration. However these have an
-overhead and in SPL with a 32KB size limit some shortcuts have been taken.
-In general all Rockchip drivers should use these features, with SPL-specific
-modifications where required.
-
-GPT partition layout
-----------------------------
-
-Rockchip use a unified GPT partition layout in open source support.
-With this GPT partition layout, uboot can be compatilbe with other components,
-like miniloader, trusted-os, arm-trust-firmware.
-
-There are some documents about partitions in the links below.
-http://rockchip.wikidot.com/partitions
-
---
-Jagan Teki <jagan@amarulasolutions.com>
-27 Mar 2019
-Simon Glass <sjg@chromium.org>
-24 June 2015
diff --git a/doc/README.rockusb b/doc/README.rockusb
index 66437e17e46b..5b96467689b7 100644
--- a/doc/README.rockusb
+++ b/doc/README.rockusb
@@ -38,7 +38,6 @@ you want to write.
sudo rkdeveloptool wl <BeginSec> <File>
to flash U-Boot image use below command. U-Boot binary is made by mkimage.
-see doc/README.rockchip for more detail about how to get U-Boot binary.
sudo rkdeveloptool wl 64 <U-Boot binary>
diff --git a/tools/rkimage.c b/tools/rkimage.c
index 1c5540b1c3d1..34f563f6a169 100644
--- a/tools/rkimage.c
+++ b/tools/rkimage.c
@@ -3,7 +3,10 @@
* (C) Copyright 2015 Google, Inc
* Written by Simon Glass <sjg@chromium.org>
*
- * See README.rockchip for details of the rkimage format
+ * rkimage.c combines the TPL/SPL binaries into a single image, sets the
+ * magic value expected by the SoC in the first 4 bytes and RC4-encodes
+ * the result if needed. The output is typically used as payload
+ * for the Mask ROM, uploaded via USB OTG or stored on a boot medium.
*/
#include "imagetool.h"
diff --git a/tools/rksd.c b/tools/rksd.c
index 7d46a1b07b3a..bf1b3737b72a 100644
--- a/tools/rksd.c
+++ b/tools/rksd.c
@@ -2,8 +2,6 @@
/*
* (C) Copyright 2015 Google, Inc
* Written by Simon Glass <sjg@chromium.org>
- *
- * See README.rockchip for details of the rksd format
*/
#include "imagetool.h"
diff --git a/tools/rkspi.c b/tools/rkspi.c
index f2530f7bde34..63770b61effb 100644
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -2,8 +2,6 @@
/*
* (C) Copyright 2015 Google, Inc
* Written by Simon Glass <sjg@chromium.org>
- *
- * See README.rockchip for details of the rkspi format
*/
#include "imagetool.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v7 5/6] rockchip: doc: add back to ROM section
2026-08-15 13:05 [PATCH v7 0/6] doc: clean up README.rockchip Johan Jonker
` (3 preceding siblings ...)
2026-08-15 13:08 ` [PATCH v7 4/6] rockchip: doc: remove README.rockchip Johan Jonker
@ 2026-08-15 13:08 ` Johan Jonker
2026-08-19 12:49 ` Quentin Schulz
2026-08-15 13:08 ` [PATCH v7 6/6] rockchip: doc: add notes section Johan Jonker
5 siblings, 1 reply; 12+ messages in thread
From: Johan Jonker @ 2026-08-15 13:08 UTC (permalink / raw)
To: u-boot; +Cc: kever.yang, sjg, trini, u-boot, eddie.cai.linux
Add a back to ROM section to rockchip.rst
Correct Kconfig text.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
Changed V7:
Move under a 'Boot flow' heading
Remove "Some"
---
arch/arm/mach-rockchip/Kconfig | 16 ++++++++--------
doc/board/rockchip/rockchip.rst | 11 +++++++++++
2 files changed, 19 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 1a2e7847c9e7..c1dbcce1e27c 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -600,26 +600,26 @@ config ROCKCHIP_USB_UART
SoCs will enable this routing as a debug measure.
config SPL_ROCKCHIP_BACK_TO_BROM
- bool "SPL returns to bootrom"
+ bool "SPL returns to boot ROM"
default y if ROCKCHIP_RK3036
select ROCKCHIP_BROM_HELPER
select SPL_BOOTROM_SUPPORT
depends on SPL
help
- Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
- SPL will return to the boot rom, which will then load the U-Boot
- binary to keep going on.
+ Rockchip SoCs have the ability to load a second loader binary
+ after the SPL phase. If enabled, SPL will return to the boot ROM,
+ which will then load and execute the U-Boot binary.
config TPL_ROCKCHIP_BACK_TO_BROM
- bool "TPL returns to bootrom"
+ bool "TPL returns to boot ROM"
default y
select ROCKCHIP_BROM_HELPER if !ROCKCHIP_RK3066
select TPL_BOOTROM_SUPPORT
depends on TPL
help
- Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
- SPL will return to the boot rom, which will then load the U-Boot
- binary to keep going on.
+ Rockchip SoCs have the ability to load a second loader binary
+ after the TPL phase. If enabled, TPL will return to the boot ROM,
+ which will then load and execute a SPL binary.
config ROCKCHIP_COMMON_BOARD
bool "Rockchip common board file"
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 5e16e860bfd5..d5945e805ba8 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -560,5 +560,16 @@ config-flash.ini:
PATH=RK30xxLoader_uboot.bin
+Boot flow
+---------
+
+Back to ROM
+^^^^^^^^^^^
+
+Rockchip SoCs have the ability to load a second loader binary.
+If enabled, the TPL/SPL code will return to the boot ROM, which will then
+load and execute a SPL or U-Boot binary.
+
+
.. Jagan Teki <jagan@amarulasolutions.com>
.. Wednesday 28 October 2020 06:47:26 PM IST
--
2.39.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v7 5/6] rockchip: doc: add back to ROM section
2026-08-15 13:08 ` [PATCH v7 5/6] rockchip: doc: add back to ROM section Johan Jonker
@ 2026-08-19 12:49 ` Quentin Schulz
2026-08-20 10:40 ` Alexey Charkov
0 siblings, 1 reply; 12+ messages in thread
From: Quentin Schulz @ 2026-08-19 12:49 UTC (permalink / raw)
To: Johan Jonker
Cc: kever.yang, sjg, trini, u-boot, eddie.cai.linux, Jonas Karlman
Hi Johan,
Please incorporate Jonas's comments made on the v6:
https://lore.kernel.org/u-boot/1e47521b-c3f2-4c62-86eb-51866b911968@kwiboo.se/
This also applies to patches 2 and 4's content and commit titles/logs. I
won't repeat his review here.
On 8/15/26 3:08 PM, Johan Jonker wrote:
> Add a back to ROM section to rockchip.rst
> Correct Kconfig text.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changed V7:
> Move under a 'Boot flow' heading
> Remove "Some"
> ---
> arch/arm/mach-rockchip/Kconfig | 16 ++++++++--------
> doc/board/rockchip/rockchip.rst | 11 +++++++++++
> 2 files changed, 19 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> index 1a2e7847c9e7..c1dbcce1e27c 100644
> --- a/arch/arm/mach-rockchip/Kconfig
> +++ b/arch/arm/mach-rockchip/Kconfig
> @@ -600,26 +600,26 @@ config ROCKCHIP_USB_UART
> SoCs will enable this routing as a debug measure.
>
> config SPL_ROCKCHIP_BACK_TO_BROM
> - bool "SPL returns to bootrom"
> + bool "SPL returns to boot ROM"
> default y if ROCKCHIP_RK3036
> select ROCKCHIP_BROM_HELPER
> select SPL_BOOTROM_SUPPORT
> depends on SPL
> help
> - Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
> - SPL will return to the boot rom, which will then load the U-Boot
> - binary to keep going on.
> + Rockchip SoCs have the ability to load a second loader binary
If I'm not mistaken, it can go back to BROM more than once? I vaguely
recall the maximum supported number of images in the rk header to be 4
from a discussion we had with Jonas but cannot find a source anymore :/
Maybe we should reword this to "have the ability to go back after SPL to
BootROM and have it load and execute the next binary in the image
(typically U-Boot proper)"?
> + after the SPL phase. If enabled, SPL will return to the boot ROM,
> + which will then load and execute the U-Boot binary.
>
> config TPL_ROCKCHIP_BACK_TO_BROM
> - bool "TPL returns to bootrom"
> + bool "TPL returns to boot ROM"
> default y
> select ROCKCHIP_BROM_HELPER if !ROCKCHIP_RK3066
> select TPL_BOOTROM_SUPPORT
> depends on TPL
> help
> - Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
> - SPL will return to the boot rom, which will then load the U-Boot
> - binary to keep going on.
> + Rockchip SoCs have the ability to load a second loader binary
> + after the TPL phase. If enabled, TPL will return to the boot ROM,
> + which will then load and execute a SPL binary.
Maybe we should reword this to "have the ability to go back after TPL to
BootROM and have it load and execute the next binary in the image
(typically U-Boot SPL)"?
>
> config ROCKCHIP_COMMON_BOARD
> bool "Rockchip common board file"
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index 5e16e860bfd5..d5945e805ba8 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -560,5 +560,16 @@ config-flash.ini:
> PATH=RK30xxLoader_uboot.bin
>
>
> +Boot flow
> +---------
> +
> +Back to ROM
> +^^^^^^^^^^^
> +
> +Rockchip SoCs have the ability to load a second loader binary.
> +If enabled, the TPL/SPL code will return to the boot ROM, which will then
> +load and execute a SPL or U-Boot binary.
Maybe we should reword this to "have the ability to go, after a binary's
been already loaded and executed, back to BootROM and have it load and
execute the next binary in the image (typically SPL/U-Boot proper)".
@Jonas, does that make sense?
Cheers,
Quentin
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v7 5/6] rockchip: doc: add back to ROM section
2026-08-19 12:49 ` Quentin Schulz
@ 2026-08-20 10:40 ` Alexey Charkov
2026-08-20 12:53 ` Quentin Schulz
0 siblings, 1 reply; 12+ messages in thread
From: Alexey Charkov @ 2026-08-20 10:40 UTC (permalink / raw)
To: Quentin Schulz
Cc: Johan Jonker, kever.yang, sjg, trini, u-boot, eddie.cai.linux,
Jonas Karlman
Hi Quentin,
On Wed, Aug 19, 2026 at 4:49 PM Quentin Schulz <quentin.schulz@cherry.de> wrote:
>
> Hi Johan,
>
> Please incorporate Jonas's comments made on the v6:
> https://lore.kernel.org/u-boot/1e47521b-c3f2-4c62-86eb-51866b911968@kwiboo.se/
>
> This also applies to patches 2 and 4's content and commit titles/logs. I
> won't repeat his review here.
>
> On 8/15/26 3:08 PM, Johan Jonker wrote:
> > Add a back to ROM section to rockchip.rst
> > Correct Kconfig text.
> >
> > Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> > Reviewed-by: Simon Glass <sjg@chromium.org>
> > ---
> >
> > Changed V7:
> > Move under a 'Boot flow' heading
> > Remove "Some"
> > ---
> > arch/arm/mach-rockchip/Kconfig | 16 ++++++++--------
> > doc/board/rockchip/rockchip.rst | 11 +++++++++++
> > 2 files changed, 19 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> > index 1a2e7847c9e7..c1dbcce1e27c 100644
> > --- a/arch/arm/mach-rockchip/Kconfig
> > +++ b/arch/arm/mach-rockchip/Kconfig
> > @@ -600,26 +600,26 @@ config ROCKCHIP_USB_UART
> > SoCs will enable this routing as a debug measure.
> >
> > config SPL_ROCKCHIP_BACK_TO_BROM
> > - bool "SPL returns to bootrom"
> > + bool "SPL returns to boot ROM"
> > default y if ROCKCHIP_RK3036
> > select ROCKCHIP_BROM_HELPER
> > select SPL_BOOTROM_SUPPORT
> > depends on SPL
> > help
> > - Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
> > - SPL will return to the boot rom, which will then load the U-Boot
> > - binary to keep going on.
> > + Rockchip SoCs have the ability to load a second loader binary
>
> If I'm not mistaken, it can go back to BROM more than once? I vaguely
> recall the maximum supported number of images in the rk header to be 4
> from a discussion we had with Jonas but cannot find a source anymore :/
That's right, the RKNS image can have up to 4 entries. I've been
digging into RK3576 boot ROM quirks and can confirm from its behavior
that it checks for <= 4 when loading. I've also written up a separate
doc [1] on the behavior of the RK3576 specific ROM version, but I
don't know how well that generalizes to other SoC versions.
Another interesting part that I discovered there is that the ROM looks
for the image header at multiple offsets into each storage device.
This can potentially enable failsafe fallbacks to guard against a
failed write or a corrupted image (e.g. write known-good copies into
higher-numbered slots, and only then write the fresh idbloader.img at
sector 64).
[1] https://docs.flipper.net/one/hardware/rk3576/boot-rom#normal-boot-from-persistent-storage
> Maybe we should reword this to "have the ability to go back after SPL to
> BootROM and have it load and execute the next binary in the image
> (typically U-Boot proper)"?
>
> > + after the SPL phase. If enabled, SPL will return to the boot ROM,
> > + which will then load and execute the U-Boot binary.
> >
> > config TPL_ROCKCHIP_BACK_TO_BROM
> > - bool "TPL returns to bootrom"
> > + bool "TPL returns to boot ROM"
> > default y
> > select ROCKCHIP_BROM_HELPER if !ROCKCHIP_RK3066
> > select TPL_BOOTROM_SUPPORT
> > depends on TPL
> > help
> > - Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
> > - SPL will return to the boot rom, which will then load the U-Boot
> > - binary to keep going on.
> > + Rockchip SoCs have the ability to load a second loader binary
> > + after the TPL phase. If enabled, TPL will return to the boot ROM,
> > + which will then load and execute a SPL binary.
>
> Maybe we should reword this to "have the ability to go back after TPL to
> BootROM and have it load and execute the next binary in the image
> (typically U-Boot SPL)"?
>
> >
> > config ROCKCHIP_COMMON_BOARD
> > bool "Rockchip common board file"
> > diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> > index 5e16e860bfd5..d5945e805ba8 100644
> > --- a/doc/board/rockchip/rockchip.rst
> > +++ b/doc/board/rockchip/rockchip.rst
> > @@ -560,5 +560,16 @@ config-flash.ini:
> > PATH=RK30xxLoader_uboot.bin
> >
> >
> > +Boot flow
> > +---------
> > +
> > +Back to ROM
> > +^^^^^^^^^^^
> > +
> > +Rockchip SoCs have the ability to load a second loader binary.
> > +If enabled, the TPL/SPL code will return to the boot ROM, which will then
> > +load and execute a SPL or U-Boot binary.
>
> Maybe we should reword this to "have the ability to go, after a binary's
> been already loaded and executed, back to BootROM and have it load and
> execute the next binary in the image (typically SPL/U-Boot proper)".
On RK3576 in particular, both the boost.bin (which fixes SD card boot)
and the DDR init (the closed-source TPL) return to the boot ROM, and
then the boot ROM loads the SPL (and optionally its payload) into RAM
and executes it. So "a second loader binary" sounds too narrow. I
would say something like:
Rockchip SoCs have the ability to return control to the boot ROM after
any loaded binary has completed execution. In this case the boot ROM
loads and executes the next binary in the image, which for different
SoC versions can be the DRAM trainer, the SPL, or any other payload.
I wouldn't mention the U-Boot proper in the same row, as it normally
expects an FDT to work with, which the boot ROM won't provide (that's
the SPL's job).
Best regards,
Alexey
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v7 5/6] rockchip: doc: add back to ROM section
2026-08-20 10:40 ` Alexey Charkov
@ 2026-08-20 12:53 ` Quentin Schulz
0 siblings, 0 replies; 12+ messages in thread
From: Quentin Schulz @ 2026-08-20 12:53 UTC (permalink / raw)
To: Alexey Charkov
Cc: Johan Jonker, kever.yang, sjg, trini, u-boot, eddie.cai.linux,
Jonas Karlman
Hi Alexey,
On 8/20/26 12:40 PM, Alexey Charkov wrote:
> Hi Quentin,
>
> On Wed, Aug 19, 2026 at 4:49 PM Quentin Schulz <quentin.schulz@cherry.de> wrote:
>>
>> Hi Johan,
>>
>> Please incorporate Jonas's comments made on the v6:
>> https://lore.kernel.org/u-boot/1e47521b-c3f2-4c62-86eb-51866b911968@kwiboo.se/
>>
>> This also applies to patches 2 and 4's content and commit titles/logs. I
>> won't repeat his review here.
>>
>> On 8/15/26 3:08 PM, Johan Jonker wrote:
>>> Add a back to ROM section to rockchip.rst
>>> Correct Kconfig text.
>>>
>>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>>> Reviewed-by: Simon Glass <sjg@chromium.org>
>>> ---
>>>
>>> Changed V7:
>>> Move under a 'Boot flow' heading
>>> Remove "Some"
>>> ---
>>> arch/arm/mach-rockchip/Kconfig | 16 ++++++++--------
>>> doc/board/rockchip/rockchip.rst | 11 +++++++++++
>>> 2 files changed, 19 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
>>> index 1a2e7847c9e7..c1dbcce1e27c 100644
>>> --- a/arch/arm/mach-rockchip/Kconfig
>>> +++ b/arch/arm/mach-rockchip/Kconfig
>>> @@ -600,26 +600,26 @@ config ROCKCHIP_USB_UART
>>> SoCs will enable this routing as a debug measure.
>>>
>>> config SPL_ROCKCHIP_BACK_TO_BROM
>>> - bool "SPL returns to bootrom"
>>> + bool "SPL returns to boot ROM"
>>> default y if ROCKCHIP_RK3036
>>> select ROCKCHIP_BROM_HELPER
>>> select SPL_BOOTROM_SUPPORT
>>> depends on SPL
>>> help
>>> - Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
>>> - SPL will return to the boot rom, which will then load the U-Boot
>>> - binary to keep going on.
>>> + Rockchip SoCs have the ability to load a second loader binary
>>
>> If I'm not mistaken, it can go back to BROM more than once? I vaguely
>> recall the maximum supported number of images in the rk header to be 4
>> from a discussion we had with Jonas but cannot find a source anymore :/
>
> That's right, the RKNS image can have up to 4 entries. I've been
> digging into RK3576 boot ROM quirks and can confirm from its behavior
> that it checks for <= 4 when loading. I've also written up a separate
> doc [1] on the behavior of the RK3576 specific ROM version, but I
> don't know how well that generalizes to other SoC versions.
>
I think we need to split the docs between aarch32 and aarch64 at least.
I'm wondering whether we should have SoC-specific docs as well. We can
avoid docs duplication by making use of literalinclude directive.
I don't know if we should generalize the BootROM part as it's likely
going to be SoC-specific. E.g. RK3576 is the only (or one of very few)
Rockchip SoCs that has UFS support. It's also part of the RK35xx
subfamily that reads the SARADC channel 0 at boot to decide on which
boot media to try booting from. I'm assuming the secure boot part of it
may also be different. RK3399, PX30 and RK3588 all behave differently in
that regard so it wouldn't be far-fetched that SoCs in the same family
may also have different secure boot implementations.
> Another interesting part that I discovered there is that the ROM looks
> for the image header at multiple offsets into each storage device.
> This can potentially enable failsafe fallbacks to guard against a
> failed write or a corrupted image (e.g. write known-good copies into
> higher-numbered slots, and only then write the fresh idbloader.img at
> sector 64).
>
Yeah, this has been known for a few SoCs already. Barebox for example
uses this knowledge to do exactly what you suggested:
https://elixir.bootlin.com/barebox/v2026.07.0/source/arch/arm/mach-rockchip/bbu.c#L19
SPI on RK3399 for example looks at offset 0 and 64 (I know, because I
messed up a few times and flashed my image at offset 64 instead of (my)
expected offset 64 and it still booted TPL (and then broke because
U-Boot proper wasn't at the expected location IIRC).
I'm unsure whether the offsets are stable across SoCs.
It'd be nice to have a dump of the BootROM of all supported SoCs and
then get info from that, but that's something that's rarely done (and
likely even less so publicly shared).
> [1] https://docs.flipper.net/one/hardware/rk3576/boot-rom#normal-boot-from-persistent-storage
>
Thanks for sharing, I'm sure this will come in handy at some point :)
>> Maybe we should reword this to "have the ability to go back after SPL to
>> BootROM and have it load and execute the next binary in the image
>> (typically U-Boot proper)"?
>>
>>> + after the SPL phase. If enabled, SPL will return to the boot ROM,
>>> + which will then load and execute the U-Boot binary.
>>>
>>> config TPL_ROCKCHIP_BACK_TO_BROM
>>> - bool "TPL returns to bootrom"
>>> + bool "TPL returns to boot ROM"
>>> default y
>>> select ROCKCHIP_BROM_HELPER if !ROCKCHIP_RK3066
>>> select TPL_BOOTROM_SUPPORT
>>> depends on TPL
>>> help
>>> - Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
>>> - SPL will return to the boot rom, which will then load the U-Boot
>>> - binary to keep going on.
>>> + Rockchip SoCs have the ability to load a second loader binary
>>> + after the TPL phase. If enabled, TPL will return to the boot ROM,
>>> + which will then load and execute a SPL binary.
>>
>> Maybe we should reword this to "have the ability to go back after TPL to
>> BootROM and have it load and execute the next binary in the image
>> (typically U-Boot SPL)"?
>>
>>>
>>> config ROCKCHIP_COMMON_BOARD
>>> bool "Rockchip common board file"
>>> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
>>> index 5e16e860bfd5..d5945e805ba8 100644
>>> --- a/doc/board/rockchip/rockchip.rst
>>> +++ b/doc/board/rockchip/rockchip.rst
>>> @@ -560,5 +560,16 @@ config-flash.ini:
>>> PATH=RK30xxLoader_uboot.bin
>>>
>>>
>>> +Boot flow
>>> +---------
>>> +
>>> +Back to ROM
>>> +^^^^^^^^^^^
>>> +
>>> +Rockchip SoCs have the ability to load a second loader binary.
>>> +If enabled, the TPL/SPL code will return to the boot ROM, which will then
>>> +load and execute a SPL or U-Boot binary.
>>
>> Maybe we should reword this to "have the ability to go, after a binary's
>> been already loaded and executed, back to BootROM and have it load and
>> execute the next binary in the image (typically SPL/U-Boot proper)".
>
> On RK3576 in particular, both the boost.bin (which fixes SD card boot)
> and the DDR init (the closed-source TPL) return to the boot ROM, and
> then the boot ROM loads the SPL (and optionally its payload) into RAM
> and executes it. So "a second loader binary" sounds too narrow. I
> would say something like:
>
> Rockchip SoCs have the ability to return control to the boot ROM after
> any loaded binary has completed execution. In this case the boot ROM
> loads and executes the next binary in the image, which for different
> SoC versions can be the DRAM trainer, the SPL, or any other payload.
>
I don't like the "different SoC versions" part as it isn't necessarily
specific to the SoC as far as I understood. It depends on what's next in
the image. If you're returning from SPL, the next image is likely going
to be proper. From TPL, likely SPL but could be VPL as well (though
nothing does that at the moment). With the SD boost stuff for RK3576,
and dboot/rboot for some newer SoCs, likely TPL from what I understood.
> I wouldn't mention the U-Boot proper in the same row, as it normally
> expects an FDT to work with, which the boot ROM won't provide (that's
> the SPL's job).
On Rockchip, we have a u-boot.itb as after-SPL stage, which contains
TF-A, optionally OP-TEE OS, U-Boot proper (possibly compressed) and
device tree(s). I don't remember for sure which device tree is passed to
TF-A (as it's SPL loading and jumping to it, and SPL has a different FDT
than proper) but I think it's proper's as we read the device tree back
to insert in the kernel's FDT U-Boot's reserved memory nodes for at
least OP-TEE OS, which are inserted by OP-TEE OS in the FDT passed by
TF-A (passed by SPL).
I wouldn't focus too much on SPL_ROCKCHIP_BACK_TO_BROM as we only have
four boards selecting it: rock_defconfig (via a select in
ROCKCHIP_RK3188), phycore-rk3288_defconfig, popmetal-rk3288_defconfig
and rock2_defconfig. All rather ancient and I own none of them.
I would just omit U-Boot proper being loaded by BootROM as those boards
haven't seen any activity in the last few years aside from the switch to
OF_UPSTREAM Johan did. I'm assuming any new board will use
TPL_ROCKCHIP_BACK_TO_BROM so we should focus on documenting that.
Cheers,
Quentin
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v7 6/6] rockchip: doc: add notes section
2026-08-15 13:05 [PATCH v7 0/6] doc: clean up README.rockchip Johan Jonker
` (4 preceding siblings ...)
2026-08-15 13:08 ` [PATCH v7 5/6] rockchip: doc: add back to ROM section Johan Jonker
@ 2026-08-15 13:08 ` Johan Jonker
2026-08-19 13:03 ` Quentin Schulz
5 siblings, 1 reply; 12+ messages in thread
From: Johan Jonker @ 2026-08-15 13:08 UTC (permalink / raw)
To: u-boot; +Cc: kever.yang, sjg, trini, u-boot, eddie.cai.linux
Add a notes section for things that don't need
a chapter. Include some rk3036/rk3066 cases.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
doc/board/rockchip/rockchip.rst | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index d5945e805ba8..6dbff5b72d90 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -325,6 +325,14 @@ To build rk3588 boards:
make evb-rk3588_defconfig
make CROSS_COMPILE=aarch64-linux-gnu-
+Notes
+^^^^^
+
+* rk3036: SDMMC and the debug uart share the same iomux, so if
+ a SD card is the boot medium, the debug uart must be disabled.
+* rk3066: eMMC and NAND share the same iomux, so if in Mask ROM mode
+ and a NAND is the boot medium, clear the emmc_flash_sel bit in GRF_SOC_CON0.
+
Mask ROM mode
-------------
--
2.39.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v7 6/6] rockchip: doc: add notes section
2026-08-15 13:08 ` [PATCH v7 6/6] rockchip: doc: add notes section Johan Jonker
@ 2026-08-19 13:03 ` Quentin Schulz
0 siblings, 0 replies; 12+ messages in thread
From: Quentin Schulz @ 2026-08-19 13:03 UTC (permalink / raw)
To: Johan Jonker; +Cc: kever.yang, sjg, trini, u-boot, eddie.cai.linux
Hi Johan,
On 8/15/26 3:08 PM, Johan Jonker wrote:
> Add a notes section for things that don't need
> a chapter. Include some rk3036/rk3066 cases.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
> doc/board/rockchip/rockchip.rst | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index d5945e805ba8..6dbff5b72d90 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -325,6 +325,14 @@ To build rk3588 boards:
> make evb-rk3588_defconfig
> make CROSS_COMPILE=aarch64-linux-gnu-
>
> +Notes
> +^^^^^
> +
> +* rk3036: SDMMC and the debug uart share the same iomux, so if
> + a SD card is the boot medium, the debug uart must be disabled.
> +* rk3066: eMMC and NAND share the same iomux, so if in Mask ROM mode
> + and a NAND is the boot medium, clear the emmc_flash_sel bit in GRF_SOC_CON0.
> +
Use .. note:: admonitions (c.f.
https://www.sphinx-doc.org/en/master/usage/restructuredtext/directives.html#directive-note)
instead, so we don't have an additional section.
Something like:
"""
diff --git a/doc/board/rockchip/rockchip.rst
b/doc/board/rockchip/rockchip.rst
index 6dbff5b72d90..b7705b1df6f3 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -325,13 +325,13 @@ To build rk3588 boards:
make evb-rk3588_defconfig
make CROSS_COMPILE=aarch64-linux-gnu-
-Notes
-^^^^^
+.. note::
+ On RK3036, the SDMMC and the debug uart share the same iomux, so if
+ a SD card is the boot medium, the debug uart must be disabled.
-* rk3036: SDMMC and the debug uart share the same iomux, so if
- a SD card is the boot medium, the debug uart must be disabled.
-* rk3066: eMMC and NAND share the same iomux, so if in Mask ROM mode
- and a NAND is the boot medium, clear the emmc_flash_sel bit in
GRF_SOC_CON0.
+.. note::
+ On RK3066, the eMMC and NAND share the same iomux, so if in Mask ROM
mode
+ and a NAND is the boot medium, clear the emmc_flash_sel bit in
GRF_SOC_CON0.
Mask ROM mode
-------------
"""
(I didn't reword Mask ROM but please take into account Jonas's feedback
on the v6).
Where did you get the info for RK3066, it's not in the current
doc/README.rockchip. If it's something new, then keep it in a separate
patch like you've done here and add some more info in the commit log. If
it's something that already exists and I missed it, please tell me and
also squash with the patch that removes the text from other files if
applicable.
For the rk3036 part, please squash with patch 4.
Thanks!
Quentin
^ permalink raw reply related [flat|nested] 12+ messages in thread