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From: "Ravi Patel" <ravi.patel@samsung.com>
To: "'Krzysztof Kozlowski'" <krzk@kernel.org>
Cc: <jesper.nilsson@axis.com>, <mturquette@baylibre.com>,
	<sboyd@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <s.nawrocki@samsung.com>,
	<cw00.choi@samsung.com>, <alim.akhtar@samsung.com>,
	<linus.walleij@linaro.org>, <tomasz.figa@gmail.com>,
	<catalin.marinas@arm.com>, <will@kernel.org>, <arnd@arndb.de>,
	<ksk4725@coasia.com>, <kenkim@coasia.com>, <pjsin865@coasia.com>,
	<gwk1013@coasia.com>, <hgkim05@coasia.com>,
	<mingyoungbo@coasia.com>, <smn1196@coasia.com>,
	<shradha.t@samsung.com>, <inbaraj.e@samsung.com>,
	<swathi.ks@samsung.com>, <hrishikesh.d@samsung.com>,
	<dj76.yang@samsung.com>, <hypmean.kim@samsung.com>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-samsung-soc@vger.kernel.org>, <linux-arm-kernel@axis.com>,
	<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-gpio@vger.kernel.org>, <soc@lists.linux.dev>
Subject: RE: [PATCH v3 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support
Date: Mon, 1 Sep 2025 09:03:52 +0530	[thread overview]
Message-ID: <000001dc1af1$4026d700$c0748500$@samsung.com> (raw)
In-Reply-To: <20250829-attentive-watchful-guan-b79ccc@kuoka>



> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: 29 August 2025 13:26
...
> Subject: Re: [PATCH v3 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support
> 
> On Mon, Aug 25, 2025 at 05:14:34PM +0530, Ravi Patel wrote:
> >  config ARCH_AXIADO
> >  	bool "Axiado SoC Family"
> >  	select GPIOLIB
> > diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
> > index bdb9e9813e50..bcca63136557 100644
> > --- a/arch/arm64/boot/dts/exynos/Makefile
> > +++ b/arch/arm64/boot/dts/exynos/Makefile
> > @@ -1,4 +1,5 @@
> >  # SPDX-License-Identifier: GPL-2.0
> > +subdir-y += axis
> >  subdir-y += google
> >
> >  dtb-$(CONFIG_ARCH_EXYNOS) += \
> > diff --git a/arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h b/arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h
> > new file mode 100644
> > index 000000000000..70bd1dcac85e
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h
> > @@ -0,0 +1,36 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> 
> Does not match rest of licenses.
> 
> > +/*
> > + * Axis ARTPEC-8 SoC device tree pinctrl constants
> > + *
> > + * Copyright (c) 2025 Samsung Electronics Co., Ltd.
> > + *             https://www.samsung.com
> > + * Copyright (c) 2025  Axis Communications AB.
> > + *             https://www.axis.com
> > + */
> > +
> > +#ifndef __DTS_ARM64_SAMSUNG_EXYNOS_AXIS_ARTPEC_PINCTRL_H__
> > +#define __DTS_ARM64_SAMSUNG_EXYNOS_AXIS_ARTPEC_PINCTRL_H__
> > +
> > +#define ARTPEC_PIN_PULL_NONE		0
...
> > +#define ARTPEC_PIN_DRV_SR6		0xd
> > +
> > +#endif /* __DTS_ARM64_SAMSUNG_EXYNOS_AXIS_ARTPEC_PINCTRL_H__ */
> > diff --git a/arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi
> > new file mode 100644
> > index 000000000000..8d239a70f1b4
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi
> > @@ -0,0 +1,120 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> 
> This is Dual license, so why pincltr header is not?

Thanks for the review.
I will update the Dual license in pinctrl header in the next version.

Thanks,
Ravi

> 
> Best regards,
> Krzysztof




  reply	other threads:[~2025-09-01  4:02 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20250825120654epcas5p17bdbd92679d2b4c0f0c9bbb348163c0b@epcas5p1.samsung.com>
2025-08-25 11:44 ` [PATCH v3 00/10] Add support for the Axis ARTPEC-8 SoC Ravi Patel
2025-08-25 11:44   ` [PATCH v3 01/10] dt-bindings: clock: Add ARTPEC-8 clock controller Ravi Patel
2025-08-31 13:28     ` (subset) " Krzysztof Kozlowski
2025-08-25 11:44   ` [PATCH v3 02/10] clk: samsung: Add clock PLL support for ARTPEC-8 SoC Ravi Patel
2025-08-31 13:28     ` (subset) " Krzysztof Kozlowski
2025-08-25 11:44   ` [PATCH v3 03/10] clk: samsung: artpec-8: Add initial clock " Ravi Patel
2025-08-31 13:28     ` (subset) " Krzysztof Kozlowski
2025-08-25 11:44   ` [PATCH v3 04/10] dt-bindings: pinctrl: samsung: Add compatible " Ravi Patel
2025-08-31 13:25     ` Krzysztof Kozlowski
2025-09-01  3:41       ` Ravi Patel
2025-09-01  5:11         ` Krzysztof Kozlowski
2025-09-01  5:29           ` Ravi Patel
2025-09-01  6:31             ` Krzysztof Kozlowski
2025-08-25 11:44   ` [PATCH v3 05/10] pinctrl: samsung: Add ARTPEC-8 SoC specific configuration Ravi Patel
2025-08-29 10:11     ` Linus Walleij
2025-08-29 10:28       ` Krzysztof Kozlowski
2025-09-01  3:35         ` Ravi Patel
2025-08-25 11:44   ` [PATCH v3 06/10] dt-bindings: arm: Convert Axis board/soc bindings to json-schema Ravi Patel
2025-08-31 13:28     ` (subset) " Krzysztof Kozlowski
2025-08-25 11:44   ` [PATCH v3 07/10] dt-bindings: arm: axis: Add ARTPEC-8 grizzly board Ravi Patel
2025-08-25 11:44   ` [PATCH v3 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support Ravi Patel
2025-08-29  7:56     ` Krzysztof Kozlowski
2025-09-01  3:33       ` Ravi Patel [this message]
2025-08-25 11:44   ` [PATCH v3 09/10] arm64: dts: axis: Add ARTPEC-8 Grizzly dts support Ravi Patel
2025-08-25 11:44   ` [PATCH v3 10/10] arm64: defconfig: Enable Axis ARTPEC SoC Ravi Patel
2025-08-25 12:35   ` [PATCH v3 00/10] Add support for the Axis ARTPEC-8 SoC Krzysztof Kozlowski
2025-08-31 13:29     ` Krzysztof Kozlowski

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